JPS6311813B2 - - Google Patents

Info

Publication number
JPS6311813B2
JPS6311813B2 JP57018802A JP1880282A JPS6311813B2 JP S6311813 B2 JPS6311813 B2 JP S6311813B2 JP 57018802 A JP57018802 A JP 57018802A JP 1880282 A JP1880282 A JP 1880282A JP S6311813 B2 JPS6311813 B2 JP S6311813B2
Authority
JP
Japan
Prior art keywords
spurious
circuit
signal
voltage
attenuator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57018802A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58137335A (ja
Inventor
Noriaki Shioya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu General Ltd
Original Assignee
Fujitsu General Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu General Ltd filed Critical Fujitsu General Ltd
Priority to JP1880282A priority Critical patent/JPS58137335A/ja
Publication of JPS58137335A publication Critical patent/JPS58137335A/ja
Publication of JPS6311813B2 publication Critical patent/JPS6311813B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03JTUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
    • H03J1/00Details of adjusting, driving, indicating, or mechanical control arrangements for resonant circuits in general
    • H03J1/0008Details of adjusting, driving, indicating, or mechanical control arrangements for resonant circuits in general using a central processing unit, e.g. a microprocessor
    • H03J1/0091Details of adjusting, driving, indicating, or mechanical control arrangements for resonant circuits in general using a central processing unit, e.g. a microprocessor provided with means for scanning over a band of frequencies

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Noise Elimination (AREA)
JP1880282A 1982-02-10 1982-02-10 スプリアス判別方法 Granted JPS58137335A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1880282A JPS58137335A (ja) 1982-02-10 1982-02-10 スプリアス判別方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1880282A JPS58137335A (ja) 1982-02-10 1982-02-10 スプリアス判別方法

Publications (2)

Publication Number Publication Date
JPS58137335A JPS58137335A (ja) 1983-08-15
JPS6311813B2 true JPS6311813B2 (enrdf_load_stackoverflow) 1988-03-16

Family

ID=11981717

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1880282A Granted JPS58137335A (ja) 1982-02-10 1982-02-10 スプリアス判別方法

Country Status (1)

Country Link
JP (1) JPS58137335A (enrdf_load_stackoverflow)

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
NEWS FROM ROHDE AND SCHWARZ=1970 *
NEWS FROM ROHDE AND SCHWARZ=1972 *

Also Published As

Publication number Publication date
JPS58137335A (ja) 1983-08-15

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