JPS63113258U - - Google Patents
Info
- Publication number
- JPS63113258U JPS63113258U JP516687U JP516687U JPS63113258U JP S63113258 U JPS63113258 U JP S63113258U JP 516687 U JP516687 U JP 516687U JP 516687 U JP516687 U JP 516687U JP S63113258 U JPS63113258 U JP S63113258U
- Authority
- JP
- Japan
- Prior art keywords
- significant bit
- complement data
- bit
- outputted
- utility
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000000295 complement effect Effects 0.000 claims 2
- 230000005236 sound signal Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Signal Processing For Digital Recording And Reproducing (AREA)
Description
第１図は本考案のミユーテイング回路の構成を
示す図、第２図は同、各部の信号波形を示す図、
第３図は同、具体例の構成を示す図、第４図は従
来のミユーテイング動作を示す図である。
１……シフトレジスタ、２……制御回路。
FIG. 1 is a diagram showing the configuration of the muting circuit of the present invention, and FIG. 2 is a diagram showing the signal waveforms of each part of the same.
FIG. 3 is a diagram showing the configuration of a specific example of the same, and FIG. 4 is a diagram showing a conventional muting operation. 1...Shift register, 2...Control circuit.
Claims (1)
ビツトの２′コンプリメントデータ 〔Ｄｎ―１ Ｄｎ―２……Ｄ１ Ｄ０〕 で与えられるオーデイオ機器において、上記２′
コンプリメントデータの最上位ビツト〔Ｄｎ―１
〕を順次最下位ビツト側へシフトさせて、出力す
ることを特徴とするミユーテイング回路。[Scope of claim for utility model registration] The digital data corresponding to the audio signal is n
In an audio device given by bit 2' complement data [Dn-1 Dn-2...D1 D0], the above 2'
Most significant bit of complement data [Dn-1
] is sequentially shifted to the least significant bit side and outputted.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP516687U JPS63113258U (en) | 1987-01-17 | 1987-01-17 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP516687U JPS63113258U (en) | 1987-01-17 | 1987-01-17 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63113258U true JPS63113258U (en) | 1988-07-21 |
Family
ID=30786499
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP516687U Pending JPS63113258U (en) | 1987-01-17 | 1987-01-17 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63113258U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59172104A (en) * | 1983-03-22 | 1984-09-28 | Nec Corp | Digital data envelope controlling circuit |
-
1987
- 1987-01-17 JP JP516687U patent/JPS63113258U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59172104A (en) * | 1983-03-22 | 1984-09-28 | Nec Corp | Digital data envelope controlling circuit |
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