JPS63111788A - Ccd optical sensor - Google Patents

Abstract

PURPOSE:To realize a CCD optical sensor capable of improving picture quality and contriving low-noise output by providing 1st and 2nd sample-and-hold circuits and outputting a difference between the present picture element and the preceding picture element. CONSTITUTION:An output of the CCD optical sensor 10 is fed directly to an adder/subtracter circuit 9 and fed also to the 1st and 2nd sample hold circuits 6, 7. The sample hold circuits 6, 7 are connected to a changeover circuit 8, where the signal is switched and the result is given to the adder/subtracter circuit 9. Thus, the output of the preceding picture element is sampled by the 1st sample hold circuit 6 and the succeeding picture element output is sampled by the 2nd sample hold circuit 7, both of them are switched by the changeover circuit 8 and fed to the adder/subtracter circuit 9, where the difference from the present picture element is outputted and fed to a transmission system or a recording system as the output of the CCD optical sensor 10A.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to -dimensional and two-dimensional CCD optical sensors;
In particular, the present invention relates to a CCD optical sensor with a low-noise circuit.

[Conventional technology]

In recent years, demands for higher speed and level resolution in CCD optical sensors have increased, and data compression effects are required to overcome the limits of data transfer and data recording capacity.

Conventionally, as shown in FIG. 3, the output circuit of this type of CCD optical sensor connects a reset switch transistor 2 and a capacitor 3 that converts charge into voltage to the output of a CCD optical register 1, and further connects a buffer transistor 4. A transistor 5 as a constant current circuit is connected to the CC.
It constitutes the D optical sensor 10.

And the power supply voltage ■ through the reset switch transistor 2. A reset is applied, and the charge accumulated in the capacitor 3 is released. After that, the reset pulse φ
1 cancels the reset, and charges corresponding to the image signal are injected from the CCD optical register 1 into the capacitor 3 and converted into voltage.

Therefore, as shown in FIG. 4, the signal is divided into three levels: a reset period, a reference value output period, and a signal output period, and is output. Therefore, the image signal level is the difference between each value in the signal output period and the reference value output period.

[Problem that the invention seeks to solve]

In the conventional output circuit described above, the image signal level is the voltage difference between the level when the reset is released and the image signal output level, so for this series of signals, the image signal is as shown in Figure 5. requires an analog signal processing circuit shown in the diagram.

This circuit converts the output of the CCD optical sensor 10 into a preamplifier 22.
The signal is amplified to a level that is easy to process, passed through a coupling capacitor 23 and a buffer circuit 24, and clamped to the ground level by closing a switch 25 during the reference value output period. Furthermore, sample hold switch 2
7 and a sample-and-hold capacitor 28 to hold the signal level, and AD conversion is performed by an AD conversion circuit 30.

In the figure, 26 and 29 are buffer circuits.

Thereafter, the data is generally transmitted from the DPCM 31 through the transmission system 32 and converted by the DPCM decoding circuit 33 and the DA converting circuit 34 to become an output signal, or the data is recorded in the recording device 35.

In this case, the amount of data is large, so methods such as DPCM are being used to improve the efficiency of data volume, but the current DP
There are problems in that the CM 31 is installed after the AD conversion circuit 30, that all the analog processing circuits are single elements, and that the CM 31 is susceptible to noise due to the wiring of lines and printed circuit boards.

SUMMARY OF THE INVENTION An object of the present invention is to provide a CCD optical sensor that can reduce output noise and improve image quality.

[Means for solving problems]

The CCD optical sensor of the present invention has a first . It is configured to include a second sample hold circuit, a switching circuit for these circuits, and an addition/subtraction circuit, and can output a differential value with respect to the previous pixel.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention. In this figure, 10 is a CCD optical sensor, and as before, a CCD optical register 1 is connected to a reset switch 2. Capacitor 3. An output circuit composed of a buffer transistor 4 and a constant current circuit transistor 5 is provided.

In addition to this output circuit, the CCD optical sensor IOA here has a first sample hold circuit 6 and a second sample hold circuit 7 connected in parallel.
．． A switching circuit 8 for switching each of the second sample and hold circuits 6, 7 is connected.

Furthermore, the input end and this switching circuit 8 are connected to an addition/subtraction circuit 9, so that the value obtained by this addition/subtraction can be output as a CCD optical sensor signal.

According to this configuration, the output of the previous pixel is sampled by the first sample-hold circuit 6, and the output of the subsequent pixel is sampled by the second sample-hold circuit 6.
The pixel is sampled by the sample hold circuit 7, and each of these two values is switched by the switching circuit 8 and outputted to the addition/subtraction circuit 9, where both are processed, thereby outputting the difference between the two pixels. . Thereafter, this process is repeated and the differential values are sequentially output.

Therefore, the CCD light sensor IO with this output circuit
In A, as shown in FIG. 2, a preamplifier 12, a clamp circuit 13, a buffer circuit 14,
The D conversion circuit 15 is connected to the transmission system 16.
or the recording device 17.

In this case, since the output of the CCD photosensor IOA is a differential output with respect to the previous pixel, the circuit configuration includes the sample and hold switch 27 within the range shown by the broken line in FIG. Sample and hold capacitor 28 and buffer circuit 29
etc. can be made unnecessary.

〔Effect of the invention〕

As explained above, the present invention is provided with a circuit that outputs a differential output from the previous pixel in the CCD optical sensor, so by taking the differential output from the previous pixel, images with strong correlation between pixels In this case, the output level does not change significantly and there is no need to shorten the rise characteristics of the circuit.

Therefore, it is necessary to narrow the circuit band and increase the S/N ratio.
Improved image quality can be obtained. Furthermore, the circuits housed on the chip are superior in terms of reliability, and have the effect of making the circuits smaller.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a CCD optical sensor according to an embodiment of the present invention, FIG. 2 is a block diagram of an example of its application, FIG. 3 is a block diagram of a conventional CCD optical sensor, and FIG. 4 is a signal diagram thereof. FIG. 5 is a block diagram of an example of its application. DESCRIPTION OF SYMBOLS 1... CCD optical register, 2... Reset switch, 3... Capacitor, 4... Buffer transistor, 5... Constant current circuit transistor, 6... First
sample hold circuit, 7... second sample hold circuit, 8... switching circuit, 9... addition/subtraction circuit, 1
0.1OA... CCD optical sensor, 12... Preamplifier, 13... Clamp circuit, 14... Buffer circuit, 15... AD conversion circuit, 16... Transmission system, 17...
... Recording device, 22... Preamplifier, 23... Compling capacitor, 24... Buffer circuit, 25...
...Switch circuit, 26...Buffer circuit, 27...
・Sample and hold circuit, 28...Sample and hold capacitor, 29...Buffer circuit, 30...A
D conversion circuit, 31...DPCM, 32...transmission system,
33...DPCM decoding circuit, 34...DA conversion circuit, 35... Recording device.

Claims (1)

[Claims] (1) In one-dimensional and two-dimensional CCD optical sensors having a light receiving section, a register, an output circuit, etc., these circuits are switched and connected to first and second sample and hold circuits that sequentially hold signals from this optical sensor. A CCD optical sensor comprising a switching circuit and an addition/subtraction circuit for adding and subtracting signal values from the sample and hold circuit, and capable of outputting a differential value with respect to a previous pixel.