JP2994394B2 - Solid-state imaging device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state imaging device that compresses and records an electronic still image electronically captured and input by block coding.

[Related Art] Recently, instead of a still camera using a so-called silver halide film, an electronic still image signal electronically imaged using a solid-state imaging device such as a CCD is recorded on a floppy disk, a memory card, or the like, A solid-state imaging device that uses this recorded image for image display on a TV monitor or the like has attracted attention as an electronic still camera. According to this type of electronic still camera (solid-state imaging device), unlike recording of a still image using a silver halide film, the captured image (still image) can be easily monitored without performing film development processing or the like. It has excellent features such as being able to be used directly for image data communication in news organizations and the like.

When recording a still image signal that is electronically captured using a solid-state imaging device, the data amount is considerably enormous. For example, for each pixel constituting a still image,
Even if it is assumed that the pixel information is color-separated into the three primary colors of R, G, and B, and that each color component is converted into 8-bit digital data, the amount of data is extremely enormous. Become. Therefore, conventionally, it has been considered to compress data by performing a predetermined encoding process on an electronic still image signal electronically captured and input, and to provide the data for recording.

As an effective technique for such data compression, there is block coding for compressing the electronic still image data in units of predetermined coding blocks. The block coding of this image is performed, for example, in “Transactions of the Institute of Electronics, Information and Communication Engineers A Vol. J71-AN”.
o.2 pp.481-487 (1988.2) ”, the image is divided into small blocks, and each block is subjected to an orthogonal transformation (for example, discrete cosine transformation, etc.) independently to obtain the data. Performs compression.

[Problems to be Solved by the Invention] Conventionally, when block coding is performed on an electronic still image, generally, an electronic still image signal captured and input by a solid-state imaging device is temporarily stored in a buffer memory, and then, After being stored in the buffer memory, the captured image is selectively read out from the buffer memory for each predetermined coding block unit, and the above-described block coding by the orthogonal transform is sequentially performed. For this reason, there is a problem in increasing the speed of the encoding (data compression) processing, and it is unavoidable that the hardware configuration including its control circuit unit becomes complicated because a buffer memory is required. There was a problem.

The present invention has been made in view of such circumstances, and an object of the present invention is to provide a solid-state imaging device that can efficiently block-code and compress data of an electronic still image to be captured and input. Is to do.

Means for Solving the Problems The present invention relates to a solid-state imaging device that encodes an electronic still image signal to be imaged for each predetermined coding block and compresses data, and in particular, an imaging surface of the solid-state imaging device. The region is divided into blocks corresponding to the above-mentioned coded block units, and the image signal is read out for each of these divided blocks to perform block coding.

In other words, the imaging surface of the solid-state imaging device is made to correspond to a predetermined coding block unit so that an image signal can be read out from the imaging surface of the solid-state imaging device for each predetermined block unit that is symmetrical in encoding. Divide the block,
The image signal is read out for each block by a readout circuit, so that block encoding can be performed without temporarily storing the image signal in a buffer memory.

[Operation] According to the solid-state imaging device of the present invention configured as described above, an image signal can be read directly from an imaging surface for each block area to be subjected to block encoding. In addition, it is possible to directly perform a block encoding process on an image signal read from an imaging surface.
As a result, the processing speed can be increased and the hardware configuration can be simplified.

[Embodiment] Hereinafter, a solid-state imaging device according to an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a schematic configuration diagram of a main part of a solid-state imaging device according to a first embodiment of the present invention, and shows a schematic plan configuration of the solid-state imaging device. For example, a solid-state imaging device made of a CCD or the like is provided with its imaging surface positioned at an imaging position of a subject image input via an imaging optical system, photoelectrically converts the subject image, and outputs the light amount (image surface illuminance). By accumulating the signal charges corresponding to (1), the subject image is electronically captured and input. An electronic still image that is read out (transferred and output) according to the subject image stored in the imaging surface of the solid-state imaging device and input and captured and subjected to a predetermined encoding process to perform data compression. The signal is recorded on a predetermined recording medium such as a floppy disk or a memory card. As an encoding process for this data compression, a block encoding method such as discrete cosine transform is adopted.

The feature of the present device is that, as shown in FIG. 1, an imaging surface 2 forming a predetermined pixel array of a solid-state imaging device 1 is
The block is divided vertically and horizontally in correspondence with a predetermined coding block unit (area) which is a unit of the above-described block coding,
For example, imaging unit blocks A1, A2,
AA6, B1, B2, BB6, C1, C2, CC6, D1, D2, 〜D6. A transfer line for transferring the signal charges in the vertical direction in line units corresponding to the vertical imaging unit blocks in order to individually read out the captured image signals (signal charges) therefrom from each of the imaging unit blocks. Buffers R1, R2, to R6 and horizontal transfer lines H1, H2, to H6 for transferring the signal charges in a horizontal direction by one line from each of these transfer line buffers R1, R2, to R6. It is characterized by.

The signal charges transferred from these horizontal transfer lines H1, H2, to H6 respectively are, for example, block selection gates G1, G2, to
The signal is sent to the common horizontal transfer line H via G6 and guided to the processor P.

Here, as described above, the horizontal direction of the paper (on the drawing) is defined as the horizontal direction, and the vertical direction is defined as the vertical direction. ) Can be defined.

Here, as described above, the imaging surface divided into blocks is formed by arranging a plurality of light receiving units PD corresponding to pixels in a matrix as shown in FIG. It has a structure in which a plurality of vertical transfer lines VT provided alongside the pixels (light receiving portions) PD are connected via transfer gates HG. The vertical transfer line VT is formed so as to be continuously connected in the vertical direction from the plurality of imaging unit blocks to the transfer line buffer.

The light receiving units PD corresponding to the pixels photoelectrically convert the light applied thereto, and accumulate signal charges corresponding to the amounts of light to form pixel signals. The signal charges (pixel signals) stored in the respective light receiving units PD are transferred collectively to a vertical transfer line VT adjacent thereto through a transfer gate HG which is opened in response to a horizontal transfer gate pulse. The signal charges batch-transferred to each of the vertical transfer lines VT are transferred in the vertical direction by one pixel in response to a vertical transfer pulse applied to the vertical transfer line VT.

FIG. 3 is a diagram showing the operation timing of the present element configured as described above. The signal readout process, which is a feature of the present element, will be described with reference to this timing chart.

Along with the shutter release operation of the solid-state imaging device (electronic still camera), the solid-state imaging device is driven in a state where the aperture control (adjustment of the incident light amount) according to the light amount of the subject image is performed, so that the image is formed on the imaging surface thereof. Signal charges corresponding to the image plane illuminance of the subject image are accumulated in the light receiving unit PD in pixel units. After the accumulation (exposure) of the signal charge, the read control is performed at the timing shown in FIG. 3 to read the signal charge.

To read out the signal charges, first, a horizontal transfer gate pulse is applied to the transfer gate HG of each imaging unit block described above to transfer the signal charges stored in each pixel (light receiving portion) PD to the vertical transfer line VT. , According to a vertical transfer pulse group φV applied to the vertical transfer line VT at a predetermined cycle.
This is performed by transferring the signal charges in the unit block in the vertical direction. By the vertical transfer pulse group φV, the imaging unit blocks A1, A2,.
Are transferred to the transfer line buffers R1, R2, to R6, respectively, and the signal charges of the imaging unit blocks B1, B2, to B6 are transferred to the imaging unit blocks A1, A2, to A6, and the imaging unit block C, respectively.
The signal charges of 1, C2, to C6 are changed to the imaging unit blocks B1, B2, to B6.
Then, the signal charges of the imaging unit blocks D1, D2, to D6 are transferred to the imaging unit blocks C1, C2, to C6, respectively.

In this state, the timings of the transfer line buffers R1, R2,.
1, φR2, to φR6 are given in order, and each transfer line buffer R1, R
The signal charges of the imaging unit blocks which are respectively transferred to R2 to R6 are vertically transferred one line at a time in block units. The horizontal transfer lines H1, H2,... Provided corresponding to the transfer line buffers R1, R2,.
H6, the horizontal transfer pulse groups φH1 and φH are provided correspondingly and synchronously with the vertical transfer pulse groups φR1, φR2, to R6.
2 to φH6, the signal charges transferred from the transfer line buffers R1, R2, to R6 to the horizontal transfer lines H1, H2, to H6 in a horizontal direction over one line in synchronization with the vertical transfer pulse. Forward. The signal charges transferred in the horizontal direction over this one line are sent from the block selection gates G1, G2, to G6 to the processor P via the common horizontal transfer line H.

Therefore, in this example, first, the imaging unit block A1 transferred to the transfer line buffer R1 according to the vertical transfer pulse group φR1 and the horizontal transfer pulse group φH1 synchronized therewith.
Is transferred to the processor P over its entirety. Thereafter, according to the vertical transfer pulse group φR2 and the horizontal transfer pulse group φH2, the signal charge of the imaging unit block A2 transferred to the transfer line buffer R2 is transferred to the processor P, and further, the vertical transfer pulse group φR3 and the horizontal transfer pulse group The signal charge of the imaging unit block A3 transferred to the transfer line buffer R3 according to φH3, the signal of the imaging unit block A6 transferred to the transfer line buffer R6 according to the vertical transfer pulse group φR6 and the horizontal transfer pulse group φH6. The electric charges are sequentially transferred to the processor P in the imaging unit block unit.

As described above, the signal charges of the imaging unit blocks A1, A2, to A6 transferred to the transfer line buffers R1, R2, to R6 are transferred and output in block units by the first vertical transfer pulse group φV. Vertical transfer pulse group φV
Is applied. By the application of the second vertical transfer pulse group φV, the signal charges of the imaging unit blocks B1, B2, to B6 that have been transferred to the imaging unit blocks A1, A2, to A6 are transferred to the transfer line buffers R1, R2, to R6. The signal charges respectively transferred and transferred to the respective imaging unit blocks are respectively transferred to the next-stage imaging unit blocks. Then, in this state, the imaging unit blocks B1, transferred to the transfer line buffers R1, R2, to R6 by the vertical transfer pulse groups φR1, φR2, to φR6 and the horizontal transfer pulse groups φH1, φH2, to φH6 described above, respectively. The signal charges from B2 to B6 are sequentially transferred and output to the processor P in block units as described above.

By repeating such signal charge transfer control, the signal charges from the imaging unit blocks D1, D2, to D6 are transferred and output in block units, and an electronic still image of a subject image captured and input by the solid-state imaging device 1 is output. End the reading.

Thus, according to the present element configured as described above, the imaging surface of the solid-state imaging device 1 is divided into blocks corresponding to the block units of the block coding for compressing the electronic still image signal. The signal charges, which are the captured image signals there, can be read out collectively for each block, so that the pixel signals (signals corresponding to the signal charge amounts) read out from the solid-state image pickup device 1 can be used as they are, by a predetermined method. Block encoding processing can be performed. Therefore, it is not necessary to prepare a buffer memory as in the conventional device, temporarily store the captured image signal in this buffer memory, and then selectively read out the image signal for each predetermined block unit and use it for block encoding. The hardware configuration can be made very simple. In addition, the processing speed can be increased as much as the time for temporarily storing the captured image signal in the buffer memory can be saved. Further, the transfer control of the signal charge described above can be easily realized by the selective application of the transfer clock pulse in the vertical and horizontal directions and the switching control thereof, so that the control system becomes complicated. The effect that there is no such thing is produced.

In the above-described embodiment, the signal charges of the plurality of imaging unit blocks divided and set in a matrix are controlled to be transferred in the same direction in block units, and are serially output. Charges may be output in parallel in units of rows or columns.

FIG. 4 is a schematic diagram showing a main part of a solid-state imaging device according to a second embodiment of the present invention for realizing the parallel output. The apparatus of this embodiment is configured to transfer each signal charge of a plurality of imaging unit blocks divided into a matrix of the solid-state imaging device 1 alternately in a column unit in a reverse direction, and to form a column of each imaging unit block. The horizontal transfer lines H are respectively provided to the transfer line buffers R1, R2,.
Processors P are provided separately through 1, H2, to H6.

According to the element of the embodiment configured as described above, the reading order of the signal charges is different depending on the column of the imaging unit block, but there is no hindrance to the block coding. Further, by determining the order of decoding and reproducing the electronic still image signal recorded after data compression in association with the reading order of the signal charges, it is possible to avoid the problem of the reading order.

If the signal charges are read out in parallel by adopting such a configuration, the time required for the reading can be shortened. In other words, the time required for the readout of the captured image signal can be reduced with a sufficient time margin. Reading can be performed.
As described above, the direction of reading (transferring) of the signal charges is alternately reversed in units of block columns, thereby simplifying the layout structure of a plurality of cells on the solid-state imaging device 1, and The effects such as the simplification of the structure can be achieved.

The processor P shown in FIGS. 1 and 4 may have only the function of an output amplifier for converting signal charges into voltage outputs, or may additionally have an analog / digital conversion or code. It may have a function of the conversion process.

Next, a third embodiment of the solid-state imaging device according to the present invention will be described. FIG. 5 is a schematic diagram of a main part of the element of this embodiment. In the element of this embodiment, the pixels of each imaging unit block on the imaging surface which is divided into blocks corresponding to the coding block are configured using non-destructive read cells. Then, the horizontal / vertical block selection circuits 4 and 5 cause the horizontal scanning circuit S
H1, SH2, to SH6 and the vertical scanning circuits SV1, SV2, to SV4 are selectively driven to select and specify an imaging unit block,
Under the control of the selectively driven horizontal scanning circuit SHn and vertical scanning circuit SVm, non-destructive read cells corresponding to the pixels of the imaging unit block selected and designated thereby are sequentially and selectively selected in the row direction and the column direction. , And the signal charges stored therein are sequentially and selectively read.

The non-destructive readout cells 6 forming the pixels of the imaging unit block are provided in a matrix corresponding to the pixels, for example, as shown in FIG. 6, and the shift register 7 forming the horizontal scanning circuit SHn and the vertical scanning circuit SVm. , 8 to output the signal charges stored therein.

As the solid-state imaging device in which the nondestructive readout cell 6 is configured as a pixel, for example, an electrostatic induction transistor [SIT] configured with a gate capacitor as illustrated in FIG. 7A is defined as a pixel. A pixel composed of a SIT image sensor or a MOS transistor as shown in FIG.
It is realized as an MD [Charge Modulation Device] image sensor or an AMI [Amplifided MOS Intelligent Imager] in which an amplification circuit is incorporated in a pixel as shown in FIG.

According to the element of the present embodiment configured as described above, for example, as shown in the operation timing of FIG. 8, the vertical scanning circuit SV1 generates a vertical scanning pulse φSV1 for scanning one unit of imaging unit block in the vertical direction. The output is repeated six times, and over this period, the horizontal scanning pulses φSH1, φSH2, to φSH6 are sequentially output from the horizontal scanning circuits SH1, SH2, to SH6 in synchronization with the vertical scanning pulse φSV1. 5, the accumulated charges in the non-destructive readout cells 6 forming the pixels of the imaging unit blocks A1, A2, to A6 on the first row are sequentially and serially read out for each imaging unit block.

Thereafter, the vertical scanning circuit SV2 is selected, and the vertical scanning circuit S2 is selected.
From V2, a vertical scanning pulse φSV2 for scanning the imaging unit block in the vertical direction is repeatedly output six times, and over this period, the horizontal scanning circuits SH1, SH2,... Are synchronized with the vertical scanning pulse φSV2. Horizontal scanning pulses φSH1, φS in order from SH6
By outputting H2, .about..phi.SH6, the accumulated charges of the nondestructive readout cells 6 forming the pixels of the imaging unit blocks B1, B2, EB6 in the second row are sequentially read out serially for each imaging unit block. .

Thus, the vertical scanning pulses φSV1, φSV2, to φSV4
Are sequentially switched selectively, and the horizontal scanning pulses φSH1, φSH2, to φSH6 are sequentially applied in synchronization with this, so that the image signal captured by the solid-state imaging device 1 is non-destructively output for each imaging unit block. Are sequentially read out serially. Therefore, even when the present element is configured as described above, the same effects as those of the above-described embodiments can be obtained.

Note that the present invention is not limited to the above-described embodiment. For example, the number of divided blocks on the imaging surface of the solid-state imaging device is
What is necessary is just to determine based on the size (the whole pixel area) of the imaging surface and the size (encoding object and pixel area) which is a unit of block encoding. As a method of block coding, not only orthogonal coding by discrete cosine transform described above, but also various conventionally proposed methods can be appropriately used. The reading order of the captured image signals from the plurality of divided imaging unit blocks may be determined according to the element specifications. In addition, the present invention may be variously modified and implemented without departing from the gist thereof. can do.

[Effects of the Invention] As described above, according to the solid-state imaging device of the present invention, an image signal electronically captured by a solid-state imaging device such as a CCD is converted into a predetermined imaging unit serving as a block coding unit. Since the image signals are sequentially read out for each block, the image signals are temporarily stored in the buffer memory, and the signal read out from the solid-state imaging device can be directly subjected to the block coding processing without converting the arrangement of the signal series. It becomes possible. As a result, not only the buffer memory is not required, but also the control circuit section is not required, and the hardware configuration can be greatly simplified. In addition, by adopting the configuration of parallel reading, the effect on the reading speed can be greatly eased, and a great effect can be obtained in practical use, such as high-speed processing of a captured image signal.

[Brief description of the drawings]

FIG. 1 shows an embodiment of a solid-state imaging device according to the present invention. FIG. 1 is a schematic diagram of a main portion of the first embodiment, and FIG. 2 is a configuration example of an imaging unit block in the device of the embodiment. FIG. 3 is a diagram showing an operation timing of signal reading in the device of the embodiment, and FIG. 4 is a diagram showing a second embodiment according to the present invention.
FIG. 5 is a schematic diagram of a main part of a device according to a third embodiment of the present invention, FIG. 5 is a schematic diagram of a main part of a device according to a third embodiment of the present invention, and FIG. FIG. 7 is a diagram showing a configuration example, FIG. 7 is a diagram showing a configuration example of a nondestructive read cell,
FIG. 8 is a diagram showing an operation timing of signal reading in the device of the embodiment. DESCRIPTION OF SYMBOLS 1 ... Solid-state image sensor, such as CCD, 2 ... Image pick-up surface, 4 ... Horizontal block selection circuit, 5 ... Vertical block selection circuit, 6
... Non-destructive readout cell, 7 ... Horizontal scanning circuit, 8 ... Vertical scanning circuit, A1, A2, ~~ A6, B1, B2, ~ B6, C1, C2, ~ C6, D1,
D2, to D6: imaging unit block, R1, R2, to R6: transfer line buffer.

Claims (4)

(57) [Claims] An imaging surface divided into blocks corresponding to a predetermined coding block unit, and a signal readout circuit for reading an image signal for each block unit divided by the imaging surface are provided. A transfer line buffer that transfers signal charges from the block on the imaging surface in units of lines, and a transfer line that transfers signal charges for one line from the transfer line buffer, And a block selection gate for selecting the block. 2. An imaging surface divided into blocks corresponding to a predetermined coding block unit, and a signal readout circuit for transmitting an image signal for each block unit divided by the imaging surface. A plurality of transfer line buffers for transferring signal charges from the block on the imaging surface in units of lines, and the plurality of signal lines for transferring one line of signal charges from the transfer line buffer. A solid-state imaging device, comprising: a horizontal transfer line provided corresponding to the transfer line of (1), and a block selection gate for selecting a horizontal transfer line for transmitting the signal charges after the transfer. 3. An imaging surface divided into blocks corresponding to a predetermined coding block unit, and a signal readout circuit for reading out an image signal for each block unit divided on the imaging surface. And a signal readout circuit, comprising: a horizontal block selection circuit and a vertical block selection circuit for selecting a block from which signal charges are read out of the blocks on the imaging surface. 4. An imaging surface divided into blocks corresponding to predetermined coding block units, a signal readout circuit for reading image signals for each of the block units divided on the imaging surface, A processor that performs analog-to-digital conversion and encoding processing on the image signal read by the signal reading circuit.