JPS63110797A - 多層回路板 - Google Patents
多層回路板Info
- Publication number
- JPS63110797A JPS63110797A JP12727987A JP12727987A JPS63110797A JP S63110797 A JPS63110797 A JP S63110797A JP 12727987 A JP12727987 A JP 12727987A JP 12727987 A JP12727987 A JP 12727987A JP S63110797 A JPS63110797 A JP S63110797A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- impurities
- core
- lines
- cores
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000011810 insulating material Substances 0.000 claims 1
- 239000012535 impurity Substances 0.000 description 30
- 238000003475 lamination Methods 0.000 description 17
- 239000000758 substrate Substances 0.000 description 17
- 239000012212 insulator Substances 0.000 description 14
- 229920002120 photoresistant polymer Polymers 0.000 description 14
- 239000000463 material Substances 0.000 description 10
- 239000004020 conductor Substances 0.000 description 7
- 238000000034 method Methods 0.000 description 7
- 238000009413 insulation Methods 0.000 description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- 238000000576 coating method Methods 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 4
- 239000010949 copper Substances 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 239000011248 coating agent Substances 0.000 description 3
- 239000004593 Epoxy Substances 0.000 description 2
- 239000000654 additive Substances 0.000 description 2
- 230000000996 additive effect Effects 0.000 description 2
- 238000013459 approach Methods 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000010030 laminating Methods 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 229920006267 polyester film Polymers 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 230000005855 radiation Effects 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 1
- 238000003848 UV Light-Curing Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000001311 chemical methods and process Methods 0.000 description 1
- 238000012993 chemical processing Methods 0.000 description 1
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 238000001723 curing Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 238000005553 drilling Methods 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 230000009477 glass transition Effects 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4673—Application methods or materials of intermediate insulating layers not specially adapted to any one of the previous methods of adding a circuit layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0137—Materials
- H05K2201/0154—Polyimide
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0183—Dielectric layers
- H05K2201/0195—Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/06—Lamination
- H05K2203/066—Transfer laminating of insulating material, e.g. resist as a whole layer, not as a pattern
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US92242286A | 1986-10-23 | 1986-10-23 | |
| US922422 | 1986-10-23 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63110797A true JPS63110797A (ja) | 1988-05-16 |
| JPH0231875B2 JPH0231875B2 (enExample) | 1990-07-17 |
Family
ID=25447017
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12727987A Granted JPS63110797A (ja) | 1986-10-23 | 1987-05-26 | 多層回路板 |
Country Status (2)
| Country | Link |
|---|---|
| EP (1) | EP0264617A1 (enExample) |
| JP (1) | JPS63110797A (enExample) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4854038A (en) * | 1988-03-16 | 1989-08-08 | International Business Machines Corporation | Modularized fabrication of high performance printed circuit boards |
| DE10126002A1 (de) * | 2000-06-24 | 2002-01-31 | Rotra Leiterplatten Produktion | Mehrlagen-Leiterplatten-Verbundkörper und Verfahren zu dessen Herstellung |
| AT412681B (de) * | 2002-04-22 | 2005-05-25 | Hueck Folien Gmbh | Substrate mit unsichtbaren elektrisch leitfähigen schichten |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5049654U (enExample) * | 1973-09-04 | 1975-05-15 | ||
| JPS51131652U (enExample) * | 1975-04-17 | 1976-10-23 |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4180608A (en) * | 1977-01-07 | 1979-12-25 | Del Joseph A | Process for making multi-layer printed circuit boards, and the article resulting therefrom |
-
1987
- 1987-05-26 JP JP12727987A patent/JPS63110797A/ja active Granted
- 1987-09-15 EP EP87113464A patent/EP0264617A1/en not_active Ceased
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5049654U (enExample) * | 1973-09-04 | 1975-05-15 | ||
| JPS51131652U (enExample) * | 1975-04-17 | 1976-10-23 |
Also Published As
| Publication number | Publication date |
|---|---|
| EP0264617A1 (en) | 1988-04-27 |
| JPH0231875B2 (enExample) | 1990-07-17 |
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