JPS6295821A - Ion implanting method - Google Patents

Abstract

PURPOSE:To enable a highly precise ion implantation by a method wherein a mask, consisting of a first layer having a small ion energy loss and a second layer having a large ion energy loss, is used as an ion implanting mask. CONSTITUTION:After an SiO2 layer 15 has been grown on a P-type silicon substrate 14 by performing a wet oxidizing method, photoresist film 16 and a tungsten film 17 are deposited thereon. Then, after a photoresist has been deposited, exposing and developing processes are performed, and a resist pattern 18 is formed. Subsequently, an ion implanting mask consisting of a three-layer pattern of layers 15, 16 and 17 is formed by performing a reactive ion etching on the layers 15, 16 and 17 using the pattern 18 as a mask. Then, an ion implanted layer 19 is formed by implanting boric ion using said three-layer pattern as a mask.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to an ion implantation method performed during the manufacture of semiconductor devices. The present invention relates to an ion implantation method suitable for performing ion implantation with low energy (acceleration voltage is about 500 KeV or higher).

[Background of the invention]

In a conventional ion implantation method for manufacturing a semiconductor device, when implanting ions into a desired part of the semiconductor device, a photoresist film, silicon dioxide (hereinafter abbreviated as SIO), etc. is used as a mask, and the necessary : Ions are implanted only in that part. However, materials such as photoresist films and 5iot films have a small ion energy loss, so in order to have a sufficient masking effect against high-energy ion implantation, there is a practical limit. It is necessary to form a film that is even thicker than the above.

This point will be explained in more detail. Boron ion (hereinafter referred to as B
Taking implantation as an example, a photoresist film, 5
When using xOt film etc. as a mask, generally B+
In order to completely prevent this and function as a complete ion implantation mask, the ion implantation energy must be set to X (KeV) and the minimum thickness of the required mask material to be set to Y (μ
m), the following relationship is obtained.

Y=X/85 ・・・・・・・・・・・・
(1) For example, in order to implant B1 with 50Ke, a mask material with a thickness of 0.6 μm is required. (1
) formula does not take into account process roughness, so if the normally required 10% margin is considered for both film thickness and ion implantation energy, the actual required film thickness of the mask material Ha, this is also 20 inches more and 0.7
2 μm (=0.6×1.2).

Taking this into account, the film thickness required for a higher energy ion implantation mask is approximately 14 μm (1000/85×1.2) for IMeV, for example. Approximately unrealistic film thicknesses are required.

In other words, it is practically impossible to process a film with a thickness of 10 μm or more to a width of 1 μm or less with a precision of about 0.1 μm; If it is large, a portion will appear at the end of the pattern where ions are not implanted due to the shadow of the mask film. To explain this point in more detail, as shown in Fig. 2, an ion beam 1 with a finite ion beam diameter a is placed at a distance R from the scanning system 2, and a wafer 3 with a radius r is If you type:
The width ΔX of the shadow when the thickness of the mask film 4 is d around :,'L −/% is expressed by the following equation.

ΔX = d r/R (2
) On the other hand, the penumbra blur ΔX' caused by having a finite beam diameter a is expressed by the following equation (3).

ΔX'=ar/R・・・・・・・・・・・・・・・ (
3) Here, a=:tmX r=6on, a=3crn
When ΔX and ΔX' are calculated by substituting the values used in a normal ion implantation device, values of 0.7 μm and 0.35 μm are obtained, respectively, for a film thickness of 14 μm.

The dimensional accuracy of this implantation area is required to be about 1710 of the minimum dimension, so for example, if the minimum dimension is 1 μm,
ΔX and ΔX' must be approximately 0.1 μm. Therefore, the film thickness of the mask material needs to be at most 2 μm or less. However, such suitable mask materials or combinations have not been available in the prior art.

[Purpose of the invention]

The object of the present invention is to provide a semiconductor device as described above! High-energy ion implantation used during manufacturing (acceleration voltage is approximately 500Ke)
This was done in order to solve the problems of the conventional technology in the case of high-energy ion implantation (V or higher), and to provide a method that allows high-precision ion implantation by reducing the thickness of the ion implantation mask even in high-energy ion implantation. be.

[Summary of the invention]

In order to achieve the above object, the present invention uses a material that causes a large energy loss of implanted ions as a mask material for ion implantation, and uses a method of reducing the film thickness of the mask material. More specifically, when the implanted ions have high energy, as shown in a typical example in FIG.
It has at least a two-layer structure consisting of 2 and a lower layer 13,
The upper layer 12 is made of a material with large electronic energy loss such as tungsten or molybdenum, and the lower layer 13 is made of a material that does not cause channeling and has low energy consumption, such as an organic material such as resist or an inorganic material such as 5iot or phosphosilicate glass. A material with a large nuclear energy loss is used on the energy side, and at least a two-layer structure is created by combining such materials64). By doing so, the following effects can be obtained. .

(1) At least a high energy loss material is used on the side where the ion energy is high, and the energy is absorbed mainly through electronic energy loss, so channeling does not occur and the ion distribution does not become abnormal. . Therefore, for example, a high energy loss material that tends to cause channeling on the low ion energy side, such as tungsten or molybdenum, can be used, and the processing accuracy as a mask material can be sufficiently high.

(2) On the side where the ion energy is low,
Since an organic material such as a resist, an amorphous material such as SIO, or phosphosilicate glass is used, abnormal distribution such as channeling can be prevented from occurring.

By combining two or more of the above materials, it is possible to realize an ion implantation mask that is sufficiently thin for practical use and that enables highly accurate patterning.

The thickness of the film to be used as a mask will be explained in more detail. S
Materials such as iO2, Regis) PSG have an ion-blocking ability expressed by the formula (1), but heavy metals such as tungsten and molybdenum are inhibited by boron ions when the film thickness of the mask is t1 and the acceleration energy is E. On the other hand, approximately t=0.9x, l ・・・・・・・・・
... (4) Also, for phosphorus ions, t=o, 4sxJ'g...
・・・・・・ (5) In case of arsenic, t=o, 3zxJE ・・・・・・・・・
... An ion implantation mask with a film thickness expressed by (6) is required. Here, the units of E and t are MeV%
It is μm. Therefore, for example, in order to completely block IMeV boron ions, even if a 10% process margin is included, it will be about 1.0 μm1, and in the case of phosphorus ions, it will be about 0.0 μm.
In the case of a 5 .mu.m layer, a heavy metal film thickness of only 0.35 .mu.m is required. Also, in the case of 2 M e V, the film thicknesses are approximately 1.4 μm, 0.7 μm, and 0.52 μm, respectively.

However, materials such as tungsten and molybdenum
Since so-called channeling is likely to occur, it cannot be a perfect mask, especially in the low energy region of heavy mass ions where nuclear energy loss becomes dominant. This critical energy depends on the mass of the ion; for example, for boron, 10
~20KeV.

It is about 100 KeV for phosphorus and about 300 KeV for arsenic. Therefore, it is necessary to block the energy below this level using an amorphous material. The film thickness required for each ion as an amorphous material such as 5IO1, resist, or PSG is 0.1 μm.

They are approximately 0, 2 tt m, and 0.3 tt m.

By considering equations (4) to (6) and the required film thickness, the acceleration energy of each ion and the required mask film thickness can be calculated.

It goes without saying that for other ions, if the film thickness required as a mask can be known experimentally, it can be calculated in the same way. According to the inventor's experiments, the film thickness t necessary for the ion implantation mask is approximately inversely proportional to the square root of the implanted ion mass M. Therefore, t oc 1/V”M
・・・・・・・・・・・・ (7) From equation (7), for example, when implanting silicon ions at IMeV, since the mass of silicon is 28, it is approximately 0.53 μm.
It requires a heavy metal mask of 100 µm and an amorphous mask of 0.2 μm underneath.

Example 1 FIG. 3 shows an embodiment of the present invention.

Figure 3(a) shows P type, (100) plane, 10・Ω”ff
After growing a 0.4 μm thick Si layer 15 on a silicon substrate 14 of 1000 t:' by wet oxidation, a photoresist (AZ1350J) film 16 (trade name: manufactured by Shippley Co., Ltd.) was formed on top of it. A tungsten (hereinafter abbreviated as W) film 17 was formed to a thickness of 1.5 μm by spin coating, baked at 100 C for 20 minutes, and then deposited thereon to a thickness of 0.5 μm by sputtering. Third
Figure (b) shows an additional photoresist (AZ1350) on the structure.
A resist pattern 18 is shown in which a J film is deposited to a thickness of 0.5 μm, exposed and developed according to a predetermined pattern. FIG. 3(C) shows that the W layer 17, the lower resist layer 16 and the Sin layer 15 on the structure are sequentially etched by reactive ion etching (hereinafter abbreviated as R and IE) using the uppermost resist pattern 18 as a first mask. An ion implantation mask consisting of a three-layer pattern of a Sin layer 15, a resist layer 16, and a tungsten layer 17 is formed. The resist pattern 18 is the lower resist layer 16
removed when processing. Using the above three-layer pattern as a mask, boron ions (hereinafter referred to as “B”, !: abbreviated)
The acceleration energy IMeV is 5×101! crn-" implantation to form a B+ ion implantation layer 19 in the silicon substrate 14. At this time, the B0 ions are W-
The ion implantation layer 19 could be completely stopped by using a mask consisting of three layers of resist 5ho, and the ion implantation layer 19 could be formed only on the exposed silicon substrate portion where the mask layer was not present.

In this embodiment, the ion implantation was performed after the Sin1 layer 15 formed on the surface of the silicon substrate 14 was removed by R and IE, but the ion implantation could also be performed with the 8i0° layer 15 remaining. Out. Said B
9. The implantation layer 19 includes a W layer 17 forming the mask,
After removing the photoresist layer 16, it can be used as a p, C-MOS well by applying annealing.

Further, in this embodiment, the W layer 17 and the resist layer 16 are
The dimensional accuracy was approximately 0.
．． We were able to obtain a good value of 1 μm. In addition, etching is not limited to RIE, and by using other anisotropic processing means such as μ-wave plasma, optically excited plasma, etc., it is possible to obtain the same or higher dimensional accuracy.

Embodiment 2 This embodiment shows a method of forming a mask pattern by a so-called list-off method.

Figure 4(a) shows P type, (100) plane, 10Ω'ffi
A field oxide film 20 with a thickness of 1 μm is grown on a silicon substrate 14 by the so-called LOCO8 method, and then a photoresist pattern 21 with a thickness of 1.5 μm is formed on the portion of the substrate into which ions are to be implanted. Figure 4Φ
) shows a state in which a 0.5 μm thick S r Ot layer 22 and a 0.5 μm thick W layer 23 were formed on the substrate 14 having the pattern 21 by a photoexcitation method. Each layer consists of monosilane (Si&) and nitrous oxide (N,0)
and a mixed gas of tungsten hexafluoride (WFa) and hydrogen (Hl) were used as raw materials and were formed by irradiating light from a xenon lamp. FIG. 4(C) shows how the resist pattern 21 is removed by the Stew layer 2 thereon by the lift-off method.
2. After removing the W layer 23 as well, arsenic ions (As") are implanted into the substrate 14 at 2 MeV and 5 x 10"cm-" to form an AS+ implanted layer 24 in the substrate 14. Figure 4(d) shows the pre-S formed by the photoexcitation method.
in.

After removing layer 22 and W layer 23, 950C in nitrogen
, by heat treatment for 30 minutes, the AS0 implantation layer 24 is used as a buried layer of a bipolar transistor,
Pace 25, Emitter 26, Collector 27 in the usual way
This shows the state in which a normal bipolar transistor is formed.

Example 3 In this example, CVD-
? 17 shows a case where a metal layer is deposited to form an ion implantation mask.

FIG. 5(a) shows the silicon substrate 14, field oxide film 20, gate oxide film 36, gate 28, gate 29, drain 30, PSG film 31, AI wiring 32, and protective film 33.
In a MOSFET consisting of
A layer 34 of IQ (trade name; manufactured by Hitachi Chemical Co., Ltd.) was spin-coated to a thickness of 2 μm and baked at 200C, and then a W layer 35 was formed on it at a substrate temperature of 350C using a mixed gas of WFa and Hl as a raw material gas. This shows a state in which the film has been deposited to a thickness of 1 μm. Fifth
In Figure (b), the portions of the W layer 35 and the PIQ layer 34 to be ion-implanted are removed using a normal ring 2 film and RIE, and B9 ions are implanted at IX at 1.5 MeV.
10"m' implantation, and an ion implantation layer 37 is formed in the channel portion of the MO8FET. In this way, in this example, the threshold voltage V-T of the MOSFET is
It will be possible to control it after the cable is completed.

In this case as well, since the W film 35 and polyimide film 34 are used as masks for ion implantation, the channel portion can be doped with ions very accurately.

Example 4 This example shows a method of forming an impurity doped layer after forming an isolation section.

FIG. 6(a) shows that a groove with a width of 1 μm and a depth of 3 μm is formed on a silicon substrate 14 with a P-type (Zoo) surface of 10Ω”07g by reactive sputter etching, and then a groove with a thickness of 0.7 μm is formed by CVD. A state in which a 5in2 film 39 is deposited to fill the trench is shown.

FIG. 6 (03) shows a state in which a 1 μm thick tungsten film 4o is deposited on the CVD Sin film 39 by sputtering.

FIG. 6(C) shows the tungsten films 4o and 8iQ.

The film 30 is processed using the photoresist 42 as a mask, and the tungsten film 4° and 5i in the ion implantation area are processed.
The nt film 39 is removed and P ions are irradiated with IX at 2 MeV.
1 o”crn-” and 1×1σ” at 500 KeV
This figure shows the state in which an n-type diffusion layer 41 is formed by crrl-' implantation.

By such a method, an n-type well could be formed with high precision. Furthermore, P-type wells can be formed with high precision as well. In this 18th example, the isolation is groove type, but it goes without saying that the normal LOCO8 structure can also be used.

In this case, as the underlying amorphous material, Cv
DSiO! Needless to say, if an organic material such as P IQ or photoresist is used, the SiOt film for element isolation can be left as is.

〔Effect of the invention〕

As shown in the above actual mff1J, according to the present invention, the acceleration voltage, which could not be achieved in terms of illuminance with the prior art, is approximately 50
Since it becomes possible to implant high-energy ions of 0 KeV or more into a desired portion directly inside the semiconductor device, the technical effects are significant.

In the above description, tungsten and molybdenum are shown as films with high energy loss, but films of many other materials can be used.

That is, in addition to tungsten and molybdenum, various metals having a specific gravity of about 5 or more, such as gold, platinum, zirconium, cobalt, iron, tantalum, and nickel, or their silicides can be used.

If the specific gravity is less than about 5, the film must be thicker, which is not preferable.

[Brief explanation of drawings]

FIG. 1 is a diagram for explaining the principle of the present invention, FIG. 2 is a diagram for explaining the state of ion implantation by an ion implantation device, and FIGS. 3 to 1 are diagrams showing embodiments of the present invention. 1... Ion beam, 2... Deflection play), 3, 11.
14... Substrate, 4.12.13.15.16.17,
22.23゜34.35,39.40...Ion implantation mask, 20...Field oxide film, 18.21.
...Resist pattern, 19.24.37...Ion implantation layer, 36...Gate oxide film, 25...Base, 26...Emitter, 27...Collector, 28...
・Gate, 29... Source 1,, full ta 2nd ward 3rd ward ((L) 4th z

Claims (1)

[Claims] When implanting high-energy ions into a predetermined region in a semiconductor substrate, at least a first layer with a small ion energy loss and a second layer with a large ion energy loss formed on the first layer are used as a mask for the ion implantation. An ion implantation method characterized by using a mask having a predetermined pattern consisting of two layers.