JPS6295325U - - Google Patents
Info
- Publication number
- JPS6295325U JPS6295325U JP18621685U JP18621685U JPS6295325U JP S6295325 U JPS6295325 U JP S6295325U JP 18621685 U JP18621685 U JP 18621685U JP 18621685 U JP18621685 U JP 18621685U JP S6295325 U JPS6295325 U JP S6295325U
- Authority
- JP
- Japan
- Prior art keywords
- input matching
- microwave
- local signal
- signal input
- inductance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims description 6
- 230000009977 dual effect Effects 0.000 claims description 4
- 239000004065 semiconductor Substances 0.000 claims description 2
- 239000000758 substrate Substances 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Junction Field-Effect Transistors (AREA)
- Microwave Amplifiers (AREA)
- Networks Using Active Elements (AREA)
Description
第１図はこの考案の一実施例を示すパターン図
、第２図はｐｎ接合容量の電圧依存性を示す図、
第３図は従来のモノリシツタ・マイクロ波・デユ
アルゲートＦＥＴミキサを示すパターン図である
。
図において、１はデユアルゲートＦＥＴ、３は
第１ゲート電極、４は第２ゲート電極、５はドレ
イン電極、６ａはマイクロ波入力整合インダクタ
ンス、６ｂはローカル信号入力整合インダクタン
ス、７ａはマイクロ波入力整合ｐｎ接合容量、７
ｂはローカル信号入力整合ｐｎ接合容量、８ａは
マイクロ波入力容量制御電極、８ｂはローカル信
号入力容量制御電極、９ａはマイクロ波入力回路
、９ｂはローカル信号入力回路、１０は半導体基
板、１３は中間周波数信号出力回路である。なお
、各図中同一符号は同一または相当部分を示す。
Fig. 1 is a pattern diagram showing an example of this invention, Fig. 2 is a diagram showing the voltage dependence of pn junction capacitance,
FIG. 3 is a pattern diagram showing a conventional monolithic microwave dual gate FET mixer. In the figure, 1 is a dual gate FET, 3 is a first gate electrode, 4 is a second gate electrode, 5 is a drain electrode, 6a is a microwave input matching inductance, 6b is a local signal input matching inductance, and 7a is a microwave input matching pn junction capacitance, 7
b is a local signal input matching pn junction capacitor, 8a is a microwave input capacitance control electrode, 8b is a local signal input capacitance control electrode, 9a is a microwave input circuit, 9b is a local signal input circuit, 10 is a semiconductor substrate, 13 is an intermediate This is a frequency signal output circuit. Note that the same reference numerals in each figure indicate the same or corresponding parts.
Claims (1)
ートおよび第２ゲート電極の各々に接続されたマ
イクロ波入力整合インダクタンスおよびローカル
信号入力整合インダクタンスと、この各々の入力
整合インダクタンスに接続されたマイクロ波入力
整合ｐｎ接合容量およびローカル信号入力整合ｐ
ｎ接合容量と、この各々の入力整合ｐｎ接合容量
に接続されたマイクロ波入力容量制御電極および
ローカル信号入力容量制御電極と、前記マイクロ
波入力整合インダクタンスおよび前記マイクロ波
入力整合ｐｎ接合容量に接続されたマイクロ波入
力回路と、前記ローカル信号入力整合インダクタ
ンスおよび前記ローカル信号入力整合ｐｎ接合容
量に接続されたローカル信号入力回路と、前記デ
ユアルゲートＦＥＴのドレイン電極に接続された
中間周波数信号出力回路とを同一半導体基板上に
形成したことを特徴とするモノリシツク・マイク
ロ波・デユアルゲートＦＥＴミキサ。 a dual gate FET, a microwave input matching inductance and a local signal input matching inductance connected to each of the first gate and second gate electrodes of the FET, and a microwave input matching pn connected to each of the input matching inductances; Junction capacitance and local signal input matching p
an n-junction capacitor, a microwave input capacitance control electrode and a local signal input capacitance control electrode connected to the respective input matching pn junction capacitors, and a microwave input matching inductance and a microwave input matching pn junction capacitor connected to the microwave input matching inductance and the microwave input matching pn junction capacitor. a local signal input circuit connected to the local signal input matching inductance and the local signal input matching pn junction capacitor, and an intermediate frequency signal output circuit connected to the drain electrode of the dual gate FET. A monolithic microwave dual-gate FET mixer characterized by being formed on the same semiconductor substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18621685U JPS6295325U (en) | 1985-12-03 | 1985-12-03 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18621685U JPS6295325U (en) | 1985-12-03 | 1985-12-03 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6295325U true JPS6295325U (en) | 1987-06-18 |
Family
ID=31135570
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18621685U Pending JPS6295325U (en) | 1985-12-03 | 1985-12-03 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6295325U (en) |
-
1985
- 1985-12-03 JP JP18621685U patent/JPS6295325U/ja active Pending
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