JPS629264Y2 - - Google Patents

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Publication number
JPS629264Y2
JPS629264Y2 JP1980035222U JP3522280U JPS629264Y2 JP S629264 Y2 JPS629264 Y2 JP S629264Y2 JP 1980035222 U JP1980035222 U JP 1980035222U JP 3522280 U JP3522280 U JP 3522280U JP S629264 Y2 JPS629264 Y2 JP S629264Y2
Authority
JP
Japan
Prior art keywords
side wall
plate
plates
semiconductor devices
bottom plate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1980035222U
Other languages
Japanese (ja)
Other versions
JPS56137453U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1980035222U priority Critical patent/JPS629264Y2/ja
Publication of JPS56137453U publication Critical patent/JPS56137453U/ja
Application granted granted Critical
Publication of JPS629264Y2 publication Critical patent/JPS629264Y2/ja
Expired legal-status Critical Current

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Description

【考案の詳細な説明】 この考案は特に半導体装置の保管治具に関する
ものである。
[Detailed Description of the Invention] This invention particularly relates to a storage jig for semiconductor devices.

従来、一般的な半導体装置の組立途中の保管方
法として、第1図に示すように底板3の上に半導
体装置1をのせ、しかもこれらを段重ねするため
のスペーサ2を介して、2段、3段と重ねて保管
する保管治具を使用していた。
Conventionally, as a general method for storing semiconductor devices during assembly, semiconductor devices 1 are placed on a bottom plate 3 as shown in FIG. A storage jig was used to store items in three layers.

しかしながら、この治具を用いると上下方向に
無駄な空間が出来てしまうため、空間使用効率が
極めて小さいという欠点があつた。
However, when this jig is used, there is a waste of space in the vertical direction, so the space usage efficiency is extremely low.

この考案の目的は、半導体装置を保管する空間
の使用効率を大きくした治具を提供することであ
る。
The purpose of this invention is to provide a jig that increases the efficiency of use of space for storing semiconductor devices.

本考案の半導体装置の保管治具は例えば、両側
壁を有し、前記両側壁の内側において高さ方向に
一定間隔で台形状の仕切り板を有することを特徴
とする。
For example, the semiconductor device storage jig of the present invention is characterized in that it has both side walls, and trapezoidal partition plates are provided at regular intervals in the height direction inside the both side walls.

次に、この考案の実施例を図面を用いて説明す
る。第2図aに示すように、この考案の構造は保
管されている半導体装置1の両側に側壁4を有
し、しかも、この側壁4には高さ方向に半導体装
置1の大きさに対応した一定間隔で、台形状の仕
切り板5を有している。さらに、この側壁4を支
えるものとして底板6を有し、図にはないが上板
を有して構成されている。
Next, an embodiment of this invention will be described using the drawings. As shown in FIG. 2a, the structure of this invention has side walls 4 on both sides of the semiconductor device 1 being stored, and in addition, this side wall 4 has a wall corresponding to the size of the semiconductor device 1 in the height direction. It has trapezoidal partition plates 5 at regular intervals. Furthermore, it has a bottom plate 6 to support this side wall 4, and has an upper plate (not shown).

半導体装置1は、前記台形状の仕切り板5上に
配置して保管する。配置は上下方向および奥行き
方向である。
The semiconductor device 1 is placed and stored on the trapezoidal partition plate 5. The arrangement is in the vertical direction and the depth direction.

また、第2図bは左右方向にも拡張した場合の
保管治具構造を示す。
Further, FIG. 2b shows the structure of the storage jig when it is expanded also in the left and right directions.

この考案は、半導体装置を保持する仕切り板の
形状を半導体装置の形状に合わせた台形状とする
ことで、半導体装置どうしを接触させないで、し
かもデツドスペースを極力排除した空間使用効率
の高い保管治具である。
This idea is a storage jig with high space efficiency that prevents semiconductor devices from coming into contact with each other and eliminates dead space as much as possible by making the shape of the partition plate that holds the semiconductor devices into a trapezoid shape that matches the shape of the semiconductor devices. It is.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の半導体装置の保管治具を示す側
面図、第2図aはこの考案の第1の実施例の保管
治具を示す斜視図、第2図bは、この考案の第2
の実施例の保管治具を示す斜視図である。 尚、図において、1……半導体装置、2……ス
ペーサ、3……底板、4……側壁、5……台形状
の仕切り板、6……底板。
FIG. 1 is a side view showing a conventional storage jig for semiconductor devices, FIG. 2a is a perspective view showing a storage jig according to the first embodiment of this invention, and FIG.
It is a perspective view showing a storage jig of an example. In the drawings, 1... semiconductor device, 2... spacer, 3... bottom plate, 4... side wall, 5... trapezoidal partition plate, 6... bottom plate.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 複数の半導体装置を所定の間隔をおいて積み重
ねる1個の保管治具であつて、底板と、該底板に
接続しかつ垂直にたてられた1枚の第1の側壁板
と、該底板に接続し該第1の側壁板と所定の間隔
をあけて該第1の側壁板と平行となるよう垂直に
たてられた1枚の第2の側壁板とを有し、該半導
体装置の形状に合わせた複数の台形状の仕切板が
それぞれ前記両側壁板に接続し、高さ方向に所定
の間隔をあけて連立しており、1つの仕切板の上
面の高さはその直上に位置する他の仕切板の前記
両側壁板に接続する場所よりも高く突出してお
り、これら仕切板に直接接してそれぞれの半導体
装置を載置することによつてこの半導体装置を保
管することを特徴とする保管治具。
A storage jig for stacking a plurality of semiconductor devices at predetermined intervals, comprising a bottom plate, a first side wall plate connected to the bottom plate and erected vertically, and a first side wall plate connected to the bottom plate. a second side wall plate connected to the first side wall plate and vertically erected parallel to the first side wall plate with a predetermined interval therebetween; A plurality of trapezoidal partition plates corresponding to the above-mentioned side wall plates are respectively connected to the above-mentioned side wall plates and stand in a row at a predetermined interval in the height direction, and the height of the top surface of one partition plate is located directly above it. The device is characterized in that it protrudes higher than the locations of other partition plates connected to the side wall plates, and the semiconductor devices are stored by placing each semiconductor device in direct contact with these partition plates. Storage jig.
JP1980035222U 1980-03-18 1980-03-18 Expired JPS629264Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1980035222U JPS629264Y2 (en) 1980-03-18 1980-03-18

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1980035222U JPS629264Y2 (en) 1980-03-18 1980-03-18

Publications (2)

Publication Number Publication Date
JPS56137453U JPS56137453U (en) 1981-10-17
JPS629264Y2 true JPS629264Y2 (en) 1987-03-04

Family

ID=29630851

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1980035222U Expired JPS629264Y2 (en) 1980-03-18 1980-03-18

Country Status (1)

Country Link
JP (1) JPS629264Y2 (en)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51161076U (en) * 1975-06-14 1976-12-22
JPS5756557Y2 (en) * 1977-11-21 1982-12-04

Also Published As

Publication number Publication date
JPS56137453U (en) 1981-10-17

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