JPS6290578A - Frequency measuring system - Google Patents

Frequency measuring system

Info

Publication number
JPS6290578A
JPS6290578A JP23194285A JP23194285A JPS6290578A JP S6290578 A JPS6290578 A JP S6290578A JP 23194285 A JP23194285 A JP 23194285A JP 23194285 A JP23194285 A JP 23194285A JP S6290578 A JPS6290578 A JP S6290578A
Authority
JP
Japan
Prior art keywords
frequency
signals
group
circuit
bandpass filter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP23194285A
Other languages
Japanese (ja)
Other versions
JPH0367584B2 (en
Inventor
Kenji Kimori
木森 憲司
Hironori Takeda
武田 浩徳
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP23194285A priority Critical patent/JPS6290578A/en
Publication of JPS6290578A publication Critical patent/JPS6290578A/en
Publication of JPH0367584B2 publication Critical patent/JPH0367584B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Measuring Frequencies, Analyzing Spectra (AREA)

Abstract

PURPOSE:To count at a high speed and with a high accuracy the number of a plurality of high frequency input pulses inputted at the same time by branching high frequency input signals with different frequencies in two by a directional coupler and detecting the upper order of magnitude of the input frequency by an arithmetic and logic circuit from the fact that one of the branched signals passes a BPF. CONSTITUTION:High frequency input signals 1 pulse-modulated by a first BPF group 4 of the titled system are received and the maximum or minimum frequency is selected by an arithmetic sequence circuit 18 from the detecting signals selected by the BPF group 4. The signals 1 branched by a directional coupler 12 are applied to a second BPF group 15 via a delay circuit 13 and a changeover switch group 14 and only selected frequency signals are selectively passed by the BPF group 15. The passes signals are branched in two by another directional coupler 17 and applied to the low and high accuracy correlators 7-2 and 7-3, respectively, of the measuring circuit of a correlator system. The lower digits of the frequency of the output signals of the BPF group 15 is measured by the circuit 18 with high and low accuracies respectively.

Description

【発明の詳細な説明】 〔概要〕 パルス変調された高周波入力信号の周波数計測において
、時間的に同時に入力した複数波の入力に対してもその
最低または最高周波数を選び、かつ帯域濾波器計測方式
と相関器計測方式を組み合わせることにより装置のコン
パクト化と計測精度の向上を図ったものである。
[Detailed Description of the Invention] [Summary] In frequency measurement of a pulse-modulated high-frequency input signal, the lowest or highest frequency is selected even for multiple input waves that are temporally input simultaneously, and a bandpass filter measurement method is used. By combining this and the correlator measurement method, we aim to make the device more compact and improve measurement accuracy.

〔産業上の利用分野〕[Industrial application field]

本発明は周波数測定装置に係り、特にパルス変調された
マイクロ波帯の高周波入力から瞬時に周波数を検出する
周波数計測方式に関する。
The present invention relates to a frequency measuring device, and more particularly to a frequency measuring method for instantaneously detecting a frequency from a pulse-modulated microwave band high-frequency input.

〔従来の技術〕[Conventional technology]

従来の周波数計測方式には、帯域濾波器群(フィルター
バンク)方式と相関器(コリレータ)方式の2種類があ
る。
There are two types of conventional frequency measurement methods: a filter bank method and a correlator method.

第2図は帯域濾波器群(フィルターバンク)方式の概略
ブロック図を示す。図において、1は高周波入力信号、
2は増幅器、3は分配器で入力信号をn(IMの出力端
子にインピーダンス整合を保ちながら電力分配を行う機
能を有する。
FIG. 2 shows a schematic block diagram of a filter bank system. In the figure, 1 is a high frequency input signal,
2 is an amplifier, and 3 is a divider, which has the function of distributing the power of the input signal to the output terminal of the IM while maintaining impedance matching.

4は第1の帯域濾波器群(本図の場合筒2の帯域濾波器
群は存在しない)でn個の帯域濾波器で構成され、各帯
域濾波器の通過帯域周波数は同一で通過帯域中心周波数
が連続しており、計測可能の周波数範囲において通過不
能の周波数帯域が出来ないように配置されている。
4 is the first bandpass filter group (in this figure, the bandpass filter group of cylinder 2 does not exist), which is composed of n bandpass filters, and the passband frequency of each bandpass filter is the same and the passband center is the same. The frequencies are continuous, and the arrangement is such that there is no impassable frequency band within the measurable frequency range.

5は検波器群でn個の検波器から構成され、各帯域濾波
器の出力を検波して計測回路6に入力する。計測回路6
は検波器5の出力に対応して高周波入力信号の周波数を
換算し、デジタル値で出力する機能を有する。
A detector group 5 is composed of n detectors, and detects the output of each bandpass filter and inputs it to the measurement circuit 6. Measurement circuit 6
has a function of converting the frequency of a high-frequency input signal corresponding to the output of the wave detector 5 and outputting it as a digital value.

以上の構成において、高周波のパルス入力信号が受信さ
れると瞬時にしてその周波数を計測できる。
In the above configuration, when a high frequency pulse input signal is received, its frequency can be instantaneously measured.

第3図は相関器方式のブロック図を示す。図において、
第2図との同一部分には同一符号を付している。7は相
関器群で例えば3個の相関器7−1゜7−2 、7−3
から構成され、それぞれの相関器には遅延時間の異なる
遅延回路7−11.7−21.7−31が付設されてい
る。
FIG. 3 shows a block diagram of the correlator scheme. In the figure,
The same parts as in FIG. 2 are given the same reference numerals. 7 is a correlator group, for example, three correlators 7-1, 7-2 and 7-3.
Each correlator is provided with delay circuits 7-11.7-21.7-31 having different delay times.

8は処理回路群でそれぞれ相関器7−1.7−2.7−
3に対応して接続され、それぞれの処理回路は各相関器
の出力電圧をサンプルホールドする回路と、その出力を
A/D変換する回路とから構成されている。9は演算回
路を示す。
8 is a group of processing circuits, each having a correlator 7-1.7-2.7-
3, and each processing circuit is composed of a circuit that samples and holds the output voltage of each correlator, and a circuit that A/D converts the output. 9 indicates an arithmetic circuit.

以上の構成において、高周波パルス入力信号1が受信さ
れると、各相関器はその高周波入力信号と付設された遅
延回路の出力との位相差を遅延時間の逆数に対応する周
期で電圧値に変換して出力する。すなわち、短い遅延時
間で計測周波数の上位桁を検出し、長い遅延時間で計測
周波数の下位桁を検出することができる。
In the above configuration, when the high frequency pulse input signal 1 is received, each correlator converts the phase difference between the high frequency input signal and the output of the attached delay circuit into a voltage value at a period corresponding to the reciprocal of the delay time. and output. That is, the higher digits of the measurement frequency can be detected with a short delay time, and the lower digits of the measurement frequency can be detected with a long delay time.

各遅延時間に対応して検出された電圧は処理回路群8に
よってサンプルホールドされると共に、そのホールドさ
れた電圧をA/D変換して演算回路9に入力される。
The voltages detected corresponding to each delay time are sampled and held by the processing circuit group 8, and the held voltages are A/D converted and input to the arithmetic circuit 9.

演算回路9では遅延時間に対応する計測周波数の桁範囲
毎にデジタル電圧の周波数変換の演算を行い計測周波数
の総合値を出力する。
The arithmetic circuit 9 calculates frequency conversion of the digital voltage for each digit range of the measurement frequency corresponding to the delay time, and outputs the total value of the measurement frequency.

〔本発明が解決しようとする問題点〕[Problems to be solved by the present invention]

帯域濾波4群方式は高速処理が可能である利点がある反
面、周波数計測精度が低く、計測精度を向上させるため
には多数の帯域濾波器が必要となり、装置が膨大になる
欠点がある。
Although the four-group bandpass filter method has the advantage of being capable of high-speed processing, it has the disadvantage of low frequency measurement accuracy and the need for a large number of bandpass filters to improve measurement accuracy, resulting in an enormous amount of equipment.

相関器方式は装置の小型化が可能であり、広帯域にわた
って計測が可能である利点がある反面、測定周波数の下
位桁は相関器出力が微弱であるため誤差を伴なう欠点が
あり、かつ環境変化にも弱く、周波数の異なる複数のパ
ルス入力信号を時間的に同時に受信した場合には計測不
能となる欠点がある。
Although the correlator method has the advantage of allowing the equipment to be miniaturized and can measure over a wide band, it has the disadvantage that the correlator output is weak at the lower digits of the measurement frequency, resulting in errors, and It has the disadvantage that it is sensitive to changes and cannot be measured when a plurality of pulse input signals with different frequencies are received at the same time.

本発明は上記従来の欠点に鑑みて創作されたもので、時
間的に同時に周波数の異なる複数のパルス信号が入力し
た場合でも高速高精度の計測が可能で、かつ装置の小型
化が可能な周波数計測方式の提供を目的とするものであ
る。
The present invention was created in view of the above-mentioned drawbacks of the conventional technology, and it is possible to perform high-speed, high-precision measurement even when multiple pulse signals with different frequencies are input at the same time, and to reduce the size of the device. The purpose is to provide a measurement method.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は第1図に示すように、パルス変調された高周波
入力信号1を受信する第1の帯域濾波器群4と、該第1
の帯域濾波器群4の検出信号から最低または最高周波数
信号を選択する演算制御回路18と、前記最低または最
高周波数信号のみを選択的に通過せしめる第2の帯域濾
波器群15とで構成されると共に、該第2の帯域濾波器
群15の出力する周波数の下位桁の精/粗計測を行う相
関器群7を備え、前記高周波入力信号1を1個の受信パ
ルスにて周波数計測を行うようにしたことを特徴とする
The present invention, as shown in FIG.
It is composed of an arithmetic control circuit 18 that selects the lowest or highest frequency signal from the detection signals of the bandpass filter group 4, and a second bandpass filter group 15 that selectively passes only the lowest or highest frequency signal. It also includes a correlator group 7 that performs precise/coarse measurement of the lower digits of the frequency output from the second bandpass filter group 15, so that the frequency of the high frequency input signal 1 is measured using one received pulse. It is characterized by the following.

〔作用〕[Effect]

周波数の異なる複数の高周波入力信号1が受信されると
方向性結合器12にて2分岐され、その一方は帯域濾波
器4を通過することにより演算制御回路18で入力周波
数の上位桁数が検知され、その最低または最高周波数を
選択する。演算制御回路1日はその選択信号により連動
スイッチ14を駆動し、選択信号の周波数のみを通過せ
しめる帯域濾波器群15の選択回路を形成する。これに
よって計測する周波数が識別されたことになる。
When a plurality of high-frequency input signals 1 with different frequencies are received, they are split into two by a directional coupler 12, one of which is passed through a bandpass filter 4, and the upper digits of the input frequency are detected by an arithmetic control circuit 18. and select its lowest or highest frequency. The arithmetic control circuit 1 drives the interlocking switch 14 according to the selection signal, and forms a selection circuit for the bandpass filter group 15 that allows only the frequency of the selection signal to pass. This means that the frequency to be measured has been identified.

他方、前記方向性結合器12にて2分岐された他方の高
周波入力信号1は遅延回路13により連動スイッチ14
が駆動されるまでの処理時間を遅延させた後帯域濾波器
15の選択回路を通過することにより計測すべきパルス
の周波数のみが分離抽出された形で、方向性結合器17
を介して中位桁測定用の相関器7−2と下位桁測定用の
相関器7−3にそれぞれ分岐入力される。
On the other hand, the other high frequency input signal 1 branched into two by the directional coupler 12 is sent to the interlocking switch 14 by the delay circuit 13.
After delaying the processing time until the directional coupler 17 is driven, only the frequency of the pulse to be measured is separated and extracted by passing through the selection circuit of the bandpass filter 15.
The signal is branched into a correlator 7-2 for measuring the middle digits and a correlator 7-3 for measuring the lower digits.

演算制御回路18は帯域濾波器4で検知した上位桁の入
力周波数と、中位桁測定用の相関器7−2と下位桁測定
用の相関器7−3とが出力する値を演算して総合測定周
波数を出力する。
The arithmetic control circuit 18 calculates the input frequency of the upper digit detected by the bandpass filter 4 and the values output by the correlator 7-2 for measuring the middle digit and the correlator 7-3 for measuring the lower digit. Outputs the total measurement frequency.

〔実施例〕〔Example〕

以下本発明の実施例を図面によって詳述する。 Embodiments of the present invention will be described in detail below with reference to the drawings.

なお、構成、動作の説明を理解し易くするために全図を
通じて同一部分には同一符号を付してその重複説明を省
略する。
Note that, in order to make the explanation of the configuration and operation easier to understand, the same parts are given the same reference numerals throughout all the figures, and repeated explanation thereof will be omitted.

第1図は本発明実施例のブロック図を示す。図において
、10と12は2分岐型の方向性結合器、11と16は
増幅器を示す。高周波入力信号1は方向性結合器10で
2分岐され、その一方は増幅器11を介して方向性結合
器12に入力され、ここで2分岐された高周波入力信号
1の一方は第2図にて説明した帯域濾波層群方式の回路
を経て演算制御回路18に入力される。
FIG. 1 shows a block diagram of an embodiment of the invention. In the figure, 10 and 12 are two-branch type directional couplers, and 11 and 16 are amplifiers. The high frequency input signal 1 is split into two by the directional coupler 10, one of which is input to the directional coupler 12 via the amplifier 11, where one of the two split high frequency input signals 1 is shown in FIG. The signal is input to the arithmetic control circuit 18 via the bandpass filter layer group type circuit described above.

19は検波器で高周波パルス入力信号1の受信の有無を
検知し、演算制御回路18を駆動する作用をなす。演算
制御回路18は検波器群5の出力信号が複数の場合はそ
の内の最低または最高周波数のみを選択し、その信号で
連動切換スイッチ群14を駆動し、第2の帯域濾波器群
15の内から前記選択周波数を通過せしめる帯域濾波器
を選択し、その通過回路を作る。
A detector 19 detects whether or not the high-frequency pulse input signal 1 is received, and serves to drive the arithmetic control circuit 18. When there are multiple output signals from the detector group 5, the arithmetic control circuit 18 selects only the lowest or highest frequency among them, drives the interlocking changeover switch group 14 with that signal, and controls the output of the second bandpass filter group 15. A bandpass filter that allows the selected frequency to pass is selected from among them, and a pass circuit thereof is created.

13は演算制御回路18が検波器群5の出力信号を選択
し、その信号で連動切換スイッチ群14を駆動するまで
の処理時間だけ遅らせる遅延回路を示す。
Reference numeral 13 denotes a delay circuit that delays the processing time until the arithmetic control circuit 18 selects the output signal of the detector group 5 and drives the interlocking switch group 14 with the selected signal.

この結果、方向性結合器12で2分岐された他方の高周
波入力信号は選択された第2の帯域濾波器群15の内の
1個を軽損失で通過し、その損失と次段の方向性結合器
17の挿入損失を補償する増幅器1Gを介して第3図で
説明した相関器方式の測定回路に人力される。
As a result, the other high-frequency input signal branched into two by the directional coupler 12 passes through one of the selected second bandpass filters 15 with a light loss, and the loss and the directionality of the next stage are reduced. The signal is input to the correlator-type measuring circuit described in FIG. 3 via the amplifier 1G that compensates for the insertion loss of the coupler 17.

ここで高周波入力信号工の周波数の上位桁は第2の帯域
濾波器群15の選択により既に判明しているので中位桁
測定用の相関器7−2と下位桁測定用の相関器7−3と
に対して方向性結合器17を介して入力する。相関器7
−2と7−3との出力をそれぞれ処理する処理回路群8
の記載は省略している。
Here, since the upper digits of the frequency of the high frequency input signal are already known by the selection of the second band filter group 15, the correlator 7-2 for measuring the middle digits and the correlator 7-2 for measuring the lower digits. 3 through the directional coupler 17. Correlator 7
Processing circuit group 8 that processes the outputs of -2 and 7-3, respectively.
The description is omitted.

演算制御回路18は第1の帯域濾波器群4の出力選択信
号から高周波入力信号lの周波数の上位tiテを、相関
器7−2から中位桁を、相関器7−3がら下位桁をそれ
ぞれ演算して組み合わせ測定周波数の総合値を出力する
The arithmetic control circuit 18 obtains the upper digit of the frequency of the high frequency input signal l from the output selection signal of the first bandpass filter group 4, the middle digit from the correlator 7-2, and the lower digit from the correlator 7-3. Each is calculated and the total value of the combined measurement frequency is output.

〔本発明の効果〕[Effects of the present invention]

以上詳細に説明したように本発明の周波数計測方式によ
れば、時間的に同時に入力した周波数の異なる複数の高
周波パルス入力信号に対しても1個の受信パルスで高速
高精度の計測が可能で、かつ装置の小型化が図れる効果
がある。
As explained in detail above, according to the frequency measurement method of the present invention, it is possible to perform high-speed, high-precision measurement with a single received pulse even for multiple high-frequency pulse input signals of different frequencies that are input simultaneously in time. , and the device can be made smaller.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明実施例のブロック図、 第2図は従来の帯域濾波層群方式のブロック図、第3図
は従来の相関器方式のブロック図を示す。 図において、1は高周波人力信号、4は第1の帯域濾波
器群、7は相関器群、15は第2の帯域濾波器群、18
は演算制御回路をそれぞれ示す。 C口Fめ千を或’7F’;皮i47.zす7・ロック図
61表/1オ旧噴を眉ミ谷戊ぐ7゛ロ17凹ff13 
 図
FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is a block diagram of a conventional bandpass filter layer group method, and FIG. 3 is a block diagram of a conventional correlator method. In the figure, 1 is a high-frequency human input signal, 4 is a first bandpass filter group, 7 is a correlator group, 15 is a second bandpass filter group, 18
indicate arithmetic control circuits, respectively. C mouth F me a thousand or '7F'; skin i47. zsu 7・Lock diagram 61 table/1 O old blowout eyebrows valley 7゛ro 17 concaveff13
figure

Claims (1)

【特許請求の範囲】 パルス変調された高周波入力信号(1)を受信する第1
の帯域濾波器群(4)と、 該第1の帯域濾波器群(4)の検出信号から最低または
最高周波数信号を選択する演算制御回路(18)と、前
記選択周波数信号のみを選択的に通過せしめる第2の帯
域濾波器群(15)とで構成されると共に、該第2の帯
域濾波器群(15)の出力する周波数の下位桁の精/粗
計測を行う相関器群7を備え、前記高周波入力信号(1
)を1個の受信パルスにて周波数計測を行うようにした
ことを特徴とする周波数計測方式。
[Claims] A first receiving a pulse modulated high frequency input signal (1).
a bandpass filter group (4), an arithmetic control circuit (18) that selects the lowest or highest frequency signal from the detection signals of the first bandpass filter group (4), and selectively selects only the selected frequency signal. It is composed of a second bandpass filter group (15) that allows the signal to pass, and also includes a correlator group 7 that performs precise/coarse measurement of the lower digits of the frequency output from the second bandpass filter group (15). , the high frequency input signal (1
) is characterized in that the frequency is measured using one received pulse.
JP23194285A 1985-10-16 1985-10-16 Frequency measuring system Granted JPS6290578A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23194285A JPS6290578A (en) 1985-10-16 1985-10-16 Frequency measuring system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23194285A JPS6290578A (en) 1985-10-16 1985-10-16 Frequency measuring system

Publications (2)

Publication Number Publication Date
JPS6290578A true JPS6290578A (en) 1987-04-25
JPH0367584B2 JPH0367584B2 (en) 1991-10-23

Family

ID=16931476

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23194285A Granted JPS6290578A (en) 1985-10-16 1985-10-16 Frequency measuring system

Country Status (1)

Country Link
JP (1) JPS6290578A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04269359A (en) * 1991-01-04 1992-09-25 Artco Inc Carbureter discharge device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04269359A (en) * 1991-01-04 1992-09-25 Artco Inc Carbureter discharge device

Also Published As

Publication number Publication date
JPH0367584B2 (en) 1991-10-23

Similar Documents

Publication Publication Date Title
GB1507748A (en) Apparatus for recording signals produced by telluric and magnetic field detectors
US3617900A (en) Digital frequency detecting system
Ables et al. A 1024− channel digital correlator
US4321549A (en) Switching quadrature detector
US3921171A (en) Ultra-wide band monopulse radar receiver
JPS6290578A (en) Frequency measuring system
US5255000A (en) Transmission signal direction finding apparatus and method
US3518557A (en) Circuit for detection of sine and cosine pulses
CN116449099B (en) Spectrum analysis circuit
JPH0479632A (en) Bit phase synchronizing circuit
SU1068841A1 (en) Device for measuring complex parameters of reciprocal and non-reciprocal uhf four-terminal networks
SU737960A1 (en) Device for discriminating maximum input signal
JP2644121B2 (en) Radar equipment
RU2723983C1 (en) Frequency meter of microwave signals on delay lines with negative time of group delay
SU1242840A1 (en) Meter of voltages ratio
JPH02170075A (en) High frequency signal direction detector
SU851215A1 (en) Electron paramagnetic resonance spestrometer
SU1702541A1 (en) Device for detection of interference band centers
SU1057972A1 (en) Device for pattern recognition
SU822289A1 (en) Device for comparing information charges
SU828059A1 (en) Multi-channel flow detector
JPS62289782A (en) Sweep type esm device
JPH01224683A (en) Azimuth detecting and receiving device
SU754328A1 (en) Device for measuring parameters of microwave elements
JPS57175943A (en) Electron spin resonance device

Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees