JPS6288391A - Semiconductor light emitting device - Google Patents

Abstract

PURPOSE:To implement a structure, which can be manufactured readily, by forming one electrode of a semiconductor light emitting part, whose both sides are surrounded by a high resistance layer, on the upper surface of said semiconductor light emitting part, and forming another electrode on a conductive region at the same surface of a part other than the semiconductor light emitting part by way of a conductive semiconductor layer beneath the semiconductor light emitting part. CONSTITUTION:A semiconductor light emitting part comprises an N-InP buffer layer 32, an InGaAsP active layer 33, a P-InP clad layer 34 and a P-InGaAsP cap layer 35, both sides of which are surrounded by a high resistance InP layer 39. Laser oscillation is carried out in the active layer in these layers. The N-InP buffer layer 32 is not cut by the high resistance layer 39 but connected to a conductive N-InP region 40 on the outside of the high resistance layer 39 surrounding the light emitting part. A negative electrode 38 is provided on the conductive region 40. A positive electrode 37 is provided on the P- InGaAsP cap layer 35 of the light emitting part. The electrodes are formed on the same surface of a planar structure.

Description

[Detailed Description of the Invention] [Summary] A semiconductor light emitting section having an electrode on the upper surface and surrounded by high resistance layers on both sides is provided, and is in contact with a conductive semiconductor layer below the semiconductor light emitting section, In addition, the semiconductor light emitting device has a planar structure in which another electrode is provided on the other conductive region exposed on the upper surface.

[Industrial application field] The present invention relates to an improved structure of a semiconductor light emitting device.

Semiconductor lasers made of compound semiconductors such as InGaAs P have become important as light sources for optical communication systems.

However, like early alloy transistors, these laser elements have a structure in which electrodes are taken out from both the front and back sides.
This is not a very preferable method from the viewpoint of improving the degree of integration and reducing parasitic capacitance. Therefore, as with recent ICs, there is a demand for a planar structure in which both positive and negative electrodes are formed on the same surface.

[Problems that conventional techniques and inventions try to solve
A buried heterostructure with an InP substrate and an InGaAs P active layer has been developed as a light source for optical communication systems in the 1 μm wavelength band, where chromatic dispersion is at its minimum.
:BH) laser (La5er) is known, and a schematic sectional view thereof is shown in FIG.

In the figure, 1 is an n-InP substrate, 2 is an n-1nP buffer layer, 3 is an n-1nGaAsP active layer, and 4 is a p-type
-TnP cladding layer; 5 is p-1nGaAsP cap layer;

6 is an insulating film, 7 is ten electrodes (positive electrode), 8 is one electrode (negative electrode), and 9 is a buried layer. The buried layer 9 has a multilayer structure consisting of a p-InP buried layer and an n-1nP buried layer, and with such buried layers provided on both sides, local laser oscillation is performed from the central active layer. It will be done.

However, the problem with this laser is that there is a parasitic capacitance that impairs high-speed operation, and the parasitic capacitance is of two types: the capacitance due to the buried pn junction (indicated by an x mark) and the capacitance due to the electrode structure. Therefore, recently, in order to reduce this parasitic capacitance, a laser structure has been proposed in which the buried layer 9 does not have a multilayer structure consisting of both pn and pn layers, but instead uses a high-resistance layer (or semi-insulating layer) as the buried layer.

FIG. 5 shows an example of the structure of a laser provided with the high-resistance buried layer 10, and in this structure, the parasitic capacitance due to the buried layer is extremely small. In FIG. 5, the same members as in FIG. 4 are given the same reference numerals.

Furthermore, FIG. 6 shows another example of the structure of a laser in which a high-resistance buried layer 10' is provided. The active layer remains. According to the measurement results, while the parasitic capacitance of the laser shown in FIG. 4 was 50 to 100 pF, the parasitic capacitance of this structure is reduced to about topp. Furthermore, this example has a structure in which the surface can be easily flattened (Japanese Patent Application No. 60-57870).
(see issue).

Thus, the laser structure shown in FIGS.
The capacitance of the n-junction can be reduced.

However, there is no change in the capacitance due to the electrodes, e.g.
In the structure shown in FIG. 6, the capacitance of the insulating film 6 and the diode capacitance exist in series between the electrodes, as indicated by dotted lines in the figure.

Therefore, a planar structure has recently been proposed to reduce the capacitance due to this electrode structure.
This is a structure in which electrodes 7 and 8 are provided. In this way, parasitic capacitance due to the electrode structure can be reduced (IEEE J, Quan
tum El, ectron, Vol-QB21. No
, 2 Feb pp 121-138.1985).

However, the structure shown in FIG. 7 is difficult to manufacture because it is necessary to form electrodes on a surface with a step, and is not a very desirable structure from the viewpoint of reliability.

In addition, as another example of planar structure, TJS (Tra
nsvers Junction 5 tripe) has been announced (8 pplied Physics
Letter 33 (1), 1. July
pp38.

1978: Institute of Electronics and Communication Engineers Descriptive Research Report OQ 878-
23pp91).

Figure 8 shows a schematic cross section of the TJS type semiconductor laser, and this structure is an example of a GaAs laser in which a p-type diffusion layer 12 in which zinc (Zn) or the like is diffused is provided, and one electrode is taken out from the surface of the p-type diffusion layer 12. It is. In the figure, 21 is a semi-insulating GaAS substrate, 22 is an n-GaAI 8S buffer layer, 23 is an n-GaAs active layer, and 24 is an n-GaAI
The 8S cladding layer is an n-GaAs cap layer.

The Zn diffusion type has the disadvantage that diffusion control is very important.

The present invention solves the problems of such a laser structure, and
This paper proposes a semiconductor laser structure that can operate at higher speeds.

[Means for solving the problem] The purpose is to have a semiconductor light-emitting part surrounded by high-resistance layers on both sides on an insulating substrate, which is in contact with a conductive semiconductor layer below the semiconductor light-emitting part. A conductive region is exposed on another surface outside the semiconductor light emitting device, and positive and negative electrodes are provided on the same surface on the conductive W4 region and on the semiconductor light emitting device. Ru.

[Operation] That is, one electrode of the semiconductor light emitting part surrounded by high resistance layers on both sides is formed on the upper surface of the semiconductor light emitting part, and the other electrode is formed on the same surface of the part outside the semiconductor light emitting part. , it is formed on a conductive region through a conductive semiconductor layer below the semiconductor light emitting part.

In this case, the structure becomes planar, has less parasitic capacitance, and is easy to manufacture.

[Example] Hereinafter, embodiments will be described in detail with reference to the drawings.

FIG. 1 shows a cross-sectional view of a semiconductor laser according to the present invention, in which 31 is a semi-insulating 1nP substrate, 32 is an n-InP haphazard layer, 33 is an InGaAs P active layer, and 34 is a p-
InP clad layer, 35 is p-1nGaAs P cap layer.

36 is an insulating film, 37 is a raw electrode, 38 is one electrode, and 39 is a high resistance InP layer.

The semiconductor light emitting section is surrounded by high resistance InP layers 39 on both sides.
-TnP buffer layer 32 + InGaAs P active layer 3
3. p-InPn tick 5 34. p-1nGaA
It consists of one layer 35 of the sP can, of which laser oscillation is performed from the active layer. In addition, the n-1nP haphazard layer 32 is not cut by the high-resistance layer 39, but is connected to the conductive n-1nP region 40 on the outside of the high-resistance layer 39 surrounding the light emitting part, and is formed on the conductive region 40. One electrode 38 is provided at one end.

In addition, as shown in the figure, p -1nGaAs P of the light emitting part
An electrode 37 is provided on the can 1 layer 35,
This results in a planar structure in which the electrodes are formed on the same surface.

With such a structure, since it is planar, a plurality of them can be lined up to form an integrated circuit, and the light emitting part is surrounded by the high resistance layer 39, there is no pn junction, and the electrode capacitance is reduced. Additionally, parasitic capacitance is significantly reduced, facilitating high-speed operation.

Next, the outline of the formation method will be explained with reference to step-by-step cross-sectional views shown in FIG. 2 (al to tel). First, as shown in FIG. Layer 32. TnGaAs P active layer 33. p-
1nP cladding layer 34. A p-1nGaAs P-can 1 layer 35 is sequentially grown. The growth method may be any of the well-known vapor phase epitaxy (VPE), liquid phase epitaxy (LPE), and organic metal vapor phase epitaxy (MOCVD).

Next, as shown in FIG. 2fbl, a 5i02 film 41 is deposited and patterned to serve as a mask, and the exposed growth layer is etched to form grooves 42, 42'.
form. At this time, a Br-based etching solution is used for etching.

Next, as shown in fcl of the figure, a high resistance InP layer 39 is formed by the chloride VPE method to bury the trench 42. The chloride VPE method uses an In source of approximately 80%
The substrate 31 is heated to 0°C and placed in a heating zone of 670°C. Then, when PCl and +H2 gas are introduced, InCl and P (phosphorus) are generated according to the following reaction formula.

4 PCIa + 6 H2→P4 +12HCI4I
n+P4 → 41nP 41nP+4HC1 → 41nC10P4 +2H2 Then, the temperature decreases in the growth zone on the substrate 31, and high purity TnP grows according to the following equation.

41nCI jP4-4. InP + 4 HCI This high purity InP is a high resistance layer. Incidentally, this chloride VPE method is also explained in the above-mentioned Japanese Patent Application No. 60-57870.

Next, as shown in FIG. 2 (dl), after removing the St○2 film 41, a new 5i02 film 43 is deposited and buttersonized, and etching is performed using this as a mask to form a44.Next, As shown in the figure (Ill), doping is performed using H2S gas or the like using the VPE method described above, and a conductive n-InP region 40 is selectively grown in the trench 44, thereby burying the trench 44.

After that, the 5i02 film 43 is removed and the insulating film 36. Live electrode 37. - Form the electrode 38 to complete the cross-sectional structure as shown in FIG.

Furthermore, FIG. 3 shows a cross-sectional view of another semiconductor laser according to the present invention, in which a conductive n-InP region 40 is overlapped in one part of a high-resistance 1nP buried layer 39. This structure allows the laser element to be miniaturized. In this figure, the same members as in FIG. 1 are given the same symbols, and the method of forming them is the same as the structure in FIG. 1.

[Effects of the Invention] As is clear from the description of the embodiments above, according to the present invention, a planar light emitting device with small parasitic capacitance can be obtained.
This will contribute to the development of optical communications by increasing the integration of multiple high-speed light emitting devices.

[Brief explanation of drawings]

FIG. 1 is a sectional view of a laser according to the present invention, and FIG. 2 (al.
~f8+ is a sectional view in the order of its formation process, FIG. 3 is a sectional view of another example of the laser according to the present invention, and FIGS. 4 to 8 are sectional views of a conventional laser. In the figure, 31 is a semi-insulating InP substrate, 32 is an n-1nP buffer layer, 33 is an n-1nGaAsP active layer, and 34 is a p-1
nP cladding layer, 35 p-1nGaAs P cap layer, 36 insulating film, 37.38 electrode, 39 high resistance InP
Layer 40 represents a conductive n-InP region. Contradiction pHl; The Scarecrow's Old City Map Figure 1 The Invention I; Figure 4: Cross-sectional view of Asahi BI-I Koren C-Piece buried layer 1
5 Figure 7 = L - ↑ Arrival discussion - Surveillance round Figure 7 A T, T5 Mizokai's Shisu' trace traces Figure 8 Figure 6

Claims (1)

[Claims] A semiconductor light-emitting section surrounded by high-resistance layers on both sides is provided on an insulating substrate, and a conductive region in contact with a conductive semiconductor layer below the semiconductor light-emitting section is formed on a surface other than the semiconductor light-emitting section. A semiconductor light emitting device characterized in that positive and negative electrodes are exposed and provided on the same plane on the conductive region and the semiconductor light emitting section.