JPS6285013U - - Google Patents
Info
- Publication number
- JPS6285013U JPS6285013U JP1985176809U JP17680985U JPS6285013U JP S6285013 U JPS6285013 U JP S6285013U JP 1985176809 U JP1985176809 U JP 1985176809U JP 17680985 U JP17680985 U JP 17680985U JP S6285013 U JPS6285013 U JP S6285013U
- Authority
- JP
- Japan
- Prior art keywords
- bias
- avalanche photodiode
- photodiode
- circuit
- bias circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
Landscapes
- Amplifiers (AREA)
- Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
- Optical Communication System (AREA)
Description
第１図は本考案実施例のアバランシエフオトダ
イオードのバイサス回路図、第２図は従来の一例
を示すバイアス回路図である。
１……高電圧発生回路、２……トランジスタ、
３，１１……ダイオード、４，５……抵抗器、６
……アバランシエフオトダイオード、７……コン
デンサ、８……抵抗器、９……増幅器、１０……
カソード端子（ＤＣバイアス印加点）。
FIG. 1 is a bias circuit diagram of an avalanche photodiode according to an embodiment of the present invention, and FIG. 2 is a bias circuit diagram showing a conventional example. 1...High voltage generation circuit, 2...Transistor,
3, 11...Diode, 4, 5...Resistor, 6
...Avalanche photodiode, 7...Capacitor, 8...Resistor, 9...Amplifier, 10...
Cathode terminal (DC bias application point).
Claims (1)
接地されたアバランシエフオトダイオードにＤＣ
バイアス電圧を印加するアバランシエフオトダイ
オードのバイアス回路において、前記ＤＣバイア
ス印加点に、さらにベースとコレクタにＤＣ正電
圧が印加きれたトランジスタのエミツタがダイオ
ードを介して接続されていることを特徴とするア
バンシエフオトダイオードのバイアス回路。 DC from the high voltage generation circuit is passed through a resistor to an avalanche photodiode whose anode is grounded.
A bias circuit for an avalanche photodiode that applies a bias voltage is characterized in that the DC bias application point is further connected to the emitter of a transistor to which a DC positive voltage has been applied to the base and collector via a diode. Bias circuit for avancier photodiode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985176809U JPS6285013U (en) | 1985-11-19 | 1985-11-19 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985176809U JPS6285013U (en) | 1985-11-19 | 1985-11-19 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6285013U true JPS6285013U (en) | 1987-05-30 |
Family
ID=31117415
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1985176809U Pending JPS6285013U (en) | 1985-11-19 | 1985-11-19 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6285013U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0250534A (en) * | 1988-08-11 | 1990-02-20 | Nec Corp | Apd bias voltage control circuit |
-
1985
- 1985-11-19 JP JP1985176809U patent/JPS6285013U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0250534A (en) * | 1988-08-11 | 1990-02-20 | Nec Corp | Apd bias voltage control circuit |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS6285013U (en) | ||
| JPS6335118U (en) | ||
| JPS61147413U (en) | ||
| JPH01175310U (en) | ||
| JPS6221551U (en) | ||
| JPH0172715U (en) | ||
| JPS62203536U (en) | ||
| JPS6381514U (en) | ||
| JPS62139122U (en) | ||
| JPS61171430U (en) | ||
| JPS63171073U (en) | ||
| JPS61103715U (en) | ||
| JPS58108518U (en) | power circuit | |
| JPS6280418U (en) | ||
| JPS62154491U (en) | ||
| JPS62129875U (en) | ||
| JPS62134116U (en) | ||
| JPS6129524U (en) | grounded base amplifier | |
| JPS60134320U (en) | Amplifier circuit coupled to differential amplifier circuit | |
| JPS61113488U (en) | ||
| JPH0415310U (en) | ||
| JPS6383948U (en) | ||
| JPS59114617U (en) | power amplifier circuit | |
| JPH02123127U (en) | ||
| JPS63106210U (en) |