JPS6282349A - Ultrasonic image picture device - Google Patents

Abstract

PURPOSE:To speed up arithmetic processing without using any expensive element by repeating operation in which moving image data is inputted to respective low-speed arithmetic units for each image portion, successively and processed and generated aperture composite images are outputted successively. CONSTITUTION:An ultrasonic wave signal received by receiving elements of a vibrator array 1 is passed through a transmission/reception switch 2, and a preamplifier 4, processed by A/D conversion and serial/parallel conversion 5, and then inputted to an aperture composite signal processing circuit 6. The processing circuit 6 consists of plural slow-speed arithmetic units, moving image data outputted by a conversion circuit 5 is inputted, for each image portion, to the respective slow-speed arithmetic units successively, and generated aperture composite image data are outputted from the respective low-speed arithmetic units. Those image data are sent through a digital scan converter 7 and displayed 8 as an image of the object. Consequently, large-capacity storage and the improvement of an arithmetic processing speed are realized by utilizing inexpensive storage elements which have such merits that operation stability is good and power consumption is small.

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to an ultrasonic imaging device that irradiates an object with ultrasonic waves and obtains a reflected image thereof.

(Prior art) Conventionally, this type of a-f wave imaging device transmits and receives ultrasonic waves using a plurality of Mi sound wave transmitting/receiving transducers, and performs aperture synthesis processing on the received ultrasonic signals to identify the target object. An ultrasonic diagnostic apparatus that obtains a reflected image is known. this is,
An ultraf-wave transmitter/receiver that transmits ultrasonic waves to an object such as a human body and receives reflected waves from the object.
As shown in the figure, a large number (for example, 64) of ultrasonic transducers l
It is equipped with a probe consisting of an array of transducers arranged in a row. Each transducer 1 in the transducer array is composed of a piezoelectric element that vibrates and generates an ultrasonic wave when a pulse signal of a predetermined frequency generated by a pulse generator is applied, and generates a voltage when it receives an ultrasonic wave. has been done.

The above-mentioned ultrasonic diagnostic apparatus uses a known transducer switching device (not shown) to switch each transducer l arranged in a straight line to a transmitting element that transmits ultrasonic waves toward an object or from the object. The receiving elements that receive reflected ultrasound waves are sequentially switched to transmit and receive ultrasound waves, and the received signals are amplified and A/Ded in order to obtain a reflected image of the object through aperture synthesis processing from the ultrasound waves received by the receiving elements. It is equipped with an aperture synthesis processing circuit that converts and stores it as one screen of input data, and then performs predetermined arithmetic processing to obtain image data.The processing circuit performs the above operations to obtain a moving image. I try to repeat this several times to several dozen times per second.

(Problems to be Solved by the Invention) However, since the aperture synthesis processing circuit is required to store a large amount of data and execute calculations at high speed, it is difficult to achieve this goal at low cost. was the problem. In other words, when a high-speed arithmetic element is used to speed up processing, there are problems such as extremely high cost and poor operational stability. On the other hand, there is a method that increases the processing speed by parallelizing the arithmetic elements, but in this case, it is necessary to read out the data of multiple shifts from the memory 2g elements at the same time. On the other hand, current inexpensive storage elements are not designed to read a large amount of data at the same time.

(Means for Solving the Problems) The present invention has been made in view of such conventional problems, and in order to speed up arithmetic processing without using expensive elementary f-. A transducer array consisting of transducers for transmitting and receiving ultrasonic waves; a switching device that sequentially switches the transducers in the transducer array to transmit and receive tllll sound waves; In an ultrasonic imaging device equipped with an aperture synthesis processing circuit that obtains reflection image data of an object from sound waves through aperture synthesis processing, the aperture synthesis processing circuit uses a large number of low-speed calculation units each operating independently, and The video data generated in the process is sequentially input one image at a time to each low-speed arithmetic unit and subjected to arithmetic processing.
The configuration is such that the operation of sequentially outputting the aperture composite image generated by the calculation processing from each low-speed calculation unit is performed repeatedly.

(Embodiments) Hereinafter, embodiments of the present invention shown in the accompanying drawings will be described.

:f'IJ1 In the diagram, 1 is a transducer array that transmits and receives ultrasonic waves, 2 is a transducer switcher, 3 is a pulse generator (pulser), 4 is an amplifier (preamplifier), and 5 is A/D conversion and series/parallel The ultrasonic signal received by the receiving element of the transducer array 1 is amplified, A/D converted, and serial/parallel converted, and is input to the aperture synthesis signal processing circuit 6 .

The conversion circuit 5 performs serial/parallel conversion from 90 hits to 10 bytes in order to store the A/D converted signal in the data storage section of the aperture synthesis signal processing circuit 6 described below.

The open [1 composite value processing circuit 6 is composed of a plurality of (10 in this case) low-speed arithmetic units that each operate independently, and the moving image data output from the conversion circuit 5 is processed by each low-speed arithmetic unit. One image at a time is sequentially input and subjected to arithmetic processing, and aperture composite image data generated by the arithmetic processing is output from each low-speed arithmetic unit. Those image data.

The image is sent to a display device (monitor) 8 via a digital scan converter 7 and displayed as an image of the object.

Note that the above-mentioned pulser 3, preamplifier 4, conversion circuit 5, and aperture synthesis signal processing circuit 6 are controlled by control signals from the system controller 9.

FIG. 2 is a block diagram showing the configuration of each calculation unit of the aperture synthesis signal processing circuit 6. As shown in FIG. In the figure, 11 is an input eight buffer, 12 is a data storage unit, 13a and 13b are data selectors, 14a and 14b are accumulators, 15a and 15b are ROMs, 16 is an adder, 17ii is a logarithmic converter, and 18 is an output amplifier. ,1
9 is a control section.

FIG. 3 shows the address structure of the data storage section 12. As this data storage unit, an inexpensive 256-bit DR is recommended.
AM is used. Therefore, one period (3
90°) per 1/8 sampling period (e.g. 35
．． 7 n5ec) is transferred to normal DRAM.
Since it is not possible to read 8 data in a cycle time of
n5ec) so that 10/kuito can be predicted at the same time. At this time, the same data as bytes 1 and 2 of the next (after 128) address is written in weight 9 and byte 10.

That is, 2 bytes of data out of 10 bytes overlap, due to the 90° sampling E4H.

Generally, the received signal is converted to L in the conversion circuit 5 described above.
At the sampling period shown below, A/D conversion is performed in parallel into n pieces of data per column (some of which overlap with other columns), and each n piece of data is sent from the large buffer 11 of each low-speed processing unit. One image is input to the storage unit 12.

Then, by reading n pieces of data at the same time during arithmetic processing after the input operation is completed, data at the imaging point of the received signal and at a point 90° out of phase 8 can be obtained at the same time.

Here, 90° sampling means increasing the signal processing speed by 1-
At the same time as the signal to be sampled,
This means that a signal with a 0° phase lag is also sampled, and by calculating the square root sum of both signals, the envelope of the sampled signal can be obtained.

In the illustrated embodiment, 90° sampling is performed by always integrating data two samples below the 0° sampling process. For example, in FIG. 3, when adding D-, F of address O with O0 sampling, it is necessary to add Dl, 9 with 90° sampling. Similarly, when DI and II, Dl and 1° are required. Therefore, by adding 2 bytes of data to each address, the 0° sampling data and the 90° sampling data are always read simultaneously.

During calculation, 10 read out from the data storage unit 12
Among the bytes, the data selector 13a selects the data for O0 sampling, and the data selector 13b selects the data for 90° sampling. The data selection method by the pair of data selectors 13a and 13b is as follows.

To explain with reference to FIG. 4, each data selector 13a
, 13b are composed of electronic switches that each select one data from eight data. When numbers (1) to (10) are attached to the 10 bytes of data output from the data storage section 12, each switch Connect as shown in the figure. The pair of electronic switches are switched to connect to the same position among the eight switch positions by a signal from the control unit 19. For example, when the switch 13a is connected to the data (1
), the switch 13b selects data (3). Furthermore, when the switch 13a selects data (2), the switch 13b selects data (4). Generally, the number of the output data of the switch 13b is larger by 2 than the output data of the switch 13a.

As described in 1111, each data corresponds to one cycle (3 cycles) of the received signal.
60 degrees) at a sampling period of 1/8, adjacent data have a phase difference of 45 degrees. Therefore, when the data in the data storage section 12 is input to the data selectors 13a and 13b in FIG.
The numbers of the output data of L3a and the output data of data selector L3b are different by two, and it is possible to obtain data with a phase difference of 90°.

The 0° and 90° sampling data selectively taken out by the data selectors 13a and 13b in this manner are integrated by the subsequent 7 cumulators 14a and 14b, and then stored in the 2nd ROM 15a.

The value is squared by tsb, and the adder 16 adds the two to obtain the 25J sum of the two.

By extracting the 11th root from the square root ROM 17, a video signal represented by the envelope of the received signal is obtained.

The output buffer 18 temporarily stores the video signal taken out from the Oriental Root ROM 17 and sends it to the digital scan converter 7 after storing the data for the plan side.

Although the illustrated embodiment has been described above, the present invention is not limited to diagnostic devices, but can be widely applied to imaging devices such as underwater sonar.

(Effects of the Invention) As described above, the present invention includes a transducer array formed by arranging a plurality of ultrasonic transducer transducers, and a transducer array that sequentially switches the transducers in the transducer array to transmit and receive ultrasonic waves. In an ultrasonic imaging apparatus equipped with an aperture synthesis processing circuit that obtains reflected image data of an object by aperture synthesis processing from ultrasonic waves received by vibration r- in a transducer array, the aperture synthesis processing circuit A large number of low-speed calculation units, each of which operates independently, are prepared, and the continuously generated video data is input one image at a time for each low-speed calculation two-step operation, and arithmetic processing is performed. Since it is configured to sequentially output the generated aperture synthesis processing from each low-speed processing unit, it uses an inexpensive memory element that has the advantage of good operational stability and low mental energy consumption. , it is possible to achieve the effect of realizing an improvement in memory and calculation processing speed. Furthermore, after A/D converting the signal received by the oscillator at a predetermined sampling period, it is parallel-converted into n pieces of overlapping data of k pieces each, and these data are sent to each low-speed arithmetic unit once every n pieces of data. By inputting and storing images, and reading out n pieces of data at the same time during arithmetic processing after the input operation is completed, data at the imaging point of the received signal and at a point delayed by 90 degrees in phase can be obtained at the same time. With this configuration, the calculation processing for obtaining the video signal can be further accelerated.

[Brief explanation of drawings]

FIG. 1 is a diagram showing an embodiment of the present invention, FIG. 2 is a block diagram showing the configuration of each calculation unit of the aperture synthesis signal processing circuit,
FIG. 3 is an address configuration diagram of a memory element, FIG. 4 is an explanatory diagram of the operation of a data selector, and FIG. 5 is a diagram showing a transducer arrangement of an ultrasonic transceiver. 1-111 transducer array, 2-1 transmitting/receiving switch, 3-111 pulse generator, 4-111 pre-amplifier, 5----A/D and serial/parallel converter, 6- ---
Aperture synthesis signal processing circuit. 7---Tagital scan converter, 8---
Monitor, 9-11 system controller, 1i---one person buffer. 12---Data storage section. 13a, 13b---Data selector, L4a, 14
b---Accumulator, 15a, 15b---2
Multiplication ROM, 16---one adder. 17---Square root ROM 18---Tuff to one output. Figure 3 Figure 4 Figure 5 1 Slope moving

Claims (2)

[Claims] (1) A transducer array consisting of a plurality of ultrasonic transducer transducers arranged, a switching means for sequentially switching the transducers in the transducer array to transmit and receive ultrasonic waves, and a In an ultrasonic imaging device equipped with an aperture synthesis processing circuit that obtains a reflected image of a target object from ultrasonic waves by aperture synthesis processing, the aperture synthesis processing circuit is composed of a plurality of low-speed calculation units each operating independently, The operation of sequentially inputting continuously generated moving image data one image at a time to each low-speed calculation unit, performing calculation processing, and sequentially outputting the aperture composite image generated by the calculation processing from each low-speed calculation unit is repeated. An ultrasonic imaging device characterized by: (2) Conversion means is provided for A/D converting the signal received by the vibrator at a predetermined sampling period, and then converting the signal into parallel data into k overlapping n pieces of data, and the low-speed arithmetic unit converts the signal into parallel data. It has a storage means for inputting data for one image every n pieces, and when performing arithmetic processing after completing the input operation, n
2. The ultrasonic imaging apparatus according to claim 1, wherein the ultrasound imaging apparatus is configured to simultaneously obtain data at a visualization point of the received signal and a point delayed in phase by 90 degrees from the visualization point of the received signal by reading out the data simultaneously.