JPS6281103U - - Google Patents
Info
- Publication number
- JPS6281103U JPS6281103U JP16948485U JP16948485U JPS6281103U JP S6281103 U JPS6281103 U JP S6281103U JP 16948485 U JP16948485 U JP 16948485U JP 16948485 U JP16948485 U JP 16948485U JP S6281103 U JPS6281103 U JP S6281103U
- Authority
- JP
- Japan
- Prior art keywords
- program
- information exchange
- selection
- programs
- output device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Programmable Controllers (AREA)
Description
第１図は本考案に係る汎用プログラム入出力装
置の好適な実施例を示すブロツク図、第２図は第
１図に示す装置の外観説明図、第３図は本実施例
の装置のアドレス領域を示す説明図、第４図は基
準回路情報を用いて書込み記憶されるラダー線図
、第５図は実施例の選択プログラムの動作を示す
フローチヤート図、第７図は他の実施例を示す説
明図である。
１４…キーボード、１６…シーケンス表示部、
１８…コメント表示部、２２…システムプログラ
ムＲＯＭ、２４…ＣＰＵ、２６…プログラム書込
みメモリとしてのＲＡＭ、１００―０…選択プロ
グラム用メモリとしての情報交換ＲＯＭ、１００
―１，１００―２，…１００―ｎ…変換プログラ
ム用メモリとしての情報交換ＲＯＭ。
FIG. 1 is a block diagram showing a preferred embodiment of the general-purpose program input/output device according to the present invention, FIG. 2 is an explanatory diagram of the external appearance of the device shown in FIG. 1, and FIG. 3 is an address area of the device of this embodiment. FIG. 4 is a ladder diagram written and stored using reference circuit information, FIG. 5 is a flowchart showing the operation of the selection program of the embodiment, and FIG. 7 is another embodiment. It is an explanatory diagram. 14...Keyboard, 16...Sequence display section,
18... Comment display section, 22... System program ROM, 24... CPU, 26... RAM as program writing memory, 100-0... Information exchange ROM as memory for selected program, 100
-1,100-2,...100-n... Information exchange ROM as memory for conversion program.
補正 昭６１．２．５
図面の簡単な説明を次のように補正する。
明細書２１頁１３行「第７図は」を「第６図及
び第７図は」に訂正する。Amendment February 5, 1981 The brief description of the drawing is amended as follows. On page 21, line 13 of the specification, "Fig. 7" is corrected to "Fig. 6 and 7."
Claims (1)
ラに対しプログラムの入出力を行う汎用プログラ
ム入出力装置であつて、 予め統一設定された基準回路情報から成るプロ
グラムが書込み記憶されるプログラム書込みメモ
リと、 プログラム書込みメモリに記憶されている基準
回路情報を各プログラマブル・コントローラに対
応するＰＣ情報に変換又は逆変換する複数の情報
交換プログラムが記憶された変換プログラム用メ
モリと、 前記複数の情報交換プログラムのうち任意の１
つを選択する選択プログラムが記憶された選択プ
ログラム用メモリと、 所定の選択操作により前記選択プログラムに従
つて情報交換プログラムのいずれか１を選択設定
する演算回路と、 を含み、情報交換プログラムの選択により任意の
プログラマブル・コントローラとの間でプログラ
ムの入出力を行うことを特徴とする汎用プログラ
ム入出力装置。 (2) 実用新案登録請求の範囲第(1)項記載の装置
において、 変換プログラム用メモリは、各情報交換プログ
ラムがその識別テーブルと共に書込まれた複数の
バンクを含み、 選択プログラムは、所定の選択操作により各バ
ンクの認識テーブルを指定することにより情報交
換プログラムの選択を行うよう形成されて成るこ
とを特徴とする汎用プログラム入出力装置。 (3) 実用新案登録請求の範囲(2)記載の装置にお
いて、選択プログラムは、認識テーブルをバンク
別に順次表示させて情報交換プログラムの選択を
行わせることを特徴とする汎用プログラム入出力
装置。[Claims for Utility Model Registration] (1) A general-purpose program input/output device that inputs and outputs programs to programmable controllers of different models, in which a program consisting of reference circuit information set uniformly in advance is written and stored. a program writing memory; a conversion program memory storing a plurality of information exchange programs for converting or inversely converting reference circuit information stored in the program writing memory into PC information corresponding to each programmable controller; Any one of the information exchange programs
a selection program memory storing a selection program for selecting one of the information exchange programs; and an arithmetic circuit for selecting and setting one of the information exchange programs according to the selection program by a predetermined selection operation, and selecting the information exchange program. A general-purpose program input/output device characterized in that it inputs and outputs programs to and from any programmable controller. (2) In the device described in claim (1) of the utility model registration, the conversion program memory includes a plurality of banks in which each information exchange program is written together with its identification table, and the selection program is a predetermined one. A general-purpose program input/output device characterized in that it is configured to select an information exchange program by specifying a recognition table for each bank through a selection operation. (3) The general-purpose program input/output device according to claim (2), wherein the selection program sequentially displays recognition tables bank by bank to select an information exchange program.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16948485U JPH0431601Y2 (en) | 1985-11-01 | 1985-11-01 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16948485U JPH0431601Y2 (en) | 1985-11-01 | 1985-11-01 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6281103U true JPS6281103U (en) | 1987-05-23 |
| JPH0431601Y2 JPH0431601Y2 (en) | 1992-07-29 |
Family
ID=31103332
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16948485U Expired JPH0431601Y2 (en) | 1985-11-01 | 1985-11-01 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0431601Y2 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04139504A (en) * | 1990-09-30 | 1992-05-13 | Mazda Motor Corp | Software producer for sequencer |
| WO1993006536A1 (en) * | 1991-09-19 | 1993-04-01 | Fanuc Ltd | Method of displaying message from pc |
| JPH06318105A (en) * | 1993-12-28 | 1994-11-15 | Mazda Motor Corp | Software generating device for sequencer |
-
1985
- 1985-11-01 JP JP16948485U patent/JPH0431601Y2/ja not_active Expired
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04139504A (en) * | 1990-09-30 | 1992-05-13 | Mazda Motor Corp | Software producer for sequencer |
| WO1993006536A1 (en) * | 1991-09-19 | 1993-04-01 | Fanuc Ltd | Method of displaying message from pc |
| JPH06318105A (en) * | 1993-12-28 | 1994-11-15 | Mazda Motor Corp | Software generating device for sequencer |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0431601Y2 (en) | 1992-07-29 |
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