JPS6279293U - - Google Patents
Info
- Publication number
- JPS6279293U JPS6279293U JP17103685U JP17103685U JPS6279293U JP S6279293 U JPS6279293 U JP S6279293U JP 17103685 U JP17103685 U JP 17103685U JP 17103685 U JP17103685 U JP 17103685U JP S6279293 U JPS6279293 U JP S6279293U
- Authority
- JP
- Japan
- Prior art keywords
- diagram showing
- display device
- code
- memory
- utility
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 8
- 102100029968 Calreticulin Human genes 0.000 description 1
- 101100326671 Homo sapiens CALR gene Proteins 0.000 description 1
Description
第１図はこの考案の一実施例によるデイスプレ
イ装置を示すブロツク図、第２図は表示画面構成
を示す図、第３図は表示画面とビデオメモリアド
レス対応図、第４図は表示画面上でのセルの割付
けを示す図、第５図はセルに対応するメモリアド
レスとロウアドレスの関係図、第６図はこの考案
におけるロウアドレスとＣＰＵのウエイト及びコ
ードメモリのリードライト制御の状態図、第７図
は従来のデイスプレイ装置におけるＣＰＵのウエ
イト時間を示した図、第８図は従来のデイスプレ
イ装置のブロツク図である。
図中、１はＣＲＴＣ、２はＣＰＵ、４はビデオ
メモリ、５はキヤラクタジエネレータ、２１は制
御回路、２２はコードメモリ。なお、図中同一符
号は同一又は相当部分を示す。
Fig. 1 is a block diagram showing a display device according to an embodiment of this invention, Fig. 2 is a diagram showing the display screen configuration, Fig. 3 is a diagram showing the correspondence between the display screen and video memory addresses, and Fig. 4 is a diagram showing the display screen configuration. 5 is a diagram showing the relationship between memory addresses and row addresses corresponding to cells, FIG. 6 is a state diagram of row addresses, CPU waits, and code memory read/write control in this invention, and FIG. FIG. 7 is a diagram showing the wait time of the CPU in a conventional display device, and FIG. 8 is a block diagram of the conventional display device. In the figure, 1 is a CRTC, 2 is a CPU, 4 is a video memory, 5 is a character generator, 21 is a control circuit, and 22 is a code memory. Note that the same reference numerals in the figures indicate the same or equivalent parts.
Claims (1)
イ装置において、表示１行分のコードメモリを持
つことを特徴とするデイスプレイ装置。 A raster scan type code fresh display device, characterized in that it has a code memory for one display line.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17103685U JPS6279293U (en) | 1985-11-07 | 1985-11-07 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17103685U JPS6279293U (en) | 1985-11-07 | 1985-11-07 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6279293U true JPS6279293U (en) | 1987-05-21 |
Family
ID=31106302
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17103685U Pending JPS6279293U (en) | 1985-11-07 | 1985-11-07 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6279293U (en) |
-
1985
- 1985-11-07 JP JP17103685U patent/JPS6279293U/ja active Pending
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