JPS627782B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a separately excited inverter circuit that achieves high efficiency by eliminating periods in which a pair of push-pull connected power transistors are simultaneously conductive.

Figure 1 shows a conventional separately excited inverter circuit.
1 is an oscillator that generates a 5KHz square wave output with a duty of 50%. 11 is an invert gate, 12 and 13 are base resistors, and 14 and 15 are a pair of push-pull connected power transistors whose emitters are commonly connected and connected to the negative pole of a DC power source 2 such as a battery. 30 is a transformer consisting of a primary winding 34 and a secondary winding 35, both terminals 32 and 33 of the primary winding 34 are connected to the collectors of each power transistor 14 and 15, and an intermediate terminal 31 is connected to the positive terminal of the DC power supply 2. It is connected to the. Further, the secondary winding 35 is connected to a load 40.

The operation of the above-described structure will be explained with reference to FIG. First, Figure 2A shows the output waveform of oscillator 1,
Figure B is the base voltage waveform of the power transistor 14, Figure 2C is the collector current waveform of the power transistor 14, and Figure 2D is the power transistor 15 waveform.
FIG. 2E shows the collector current waveform of the power transistor 15. Looking at FIGS. 2C and 2E, it can be seen that in the hatched portions of each output waveform, both power transistors 14 and 15 are conductive and collector current flows. The cause of this is that each power transistor 1
Even if the current supplied to the base side of each power transistor 14, 15 is cut off, the base side of each power transistor 14, 15 is
This is because the power transistors 14 and 15 are simultaneously rendered conductive for a short period of time because the electric charge accumulated as a junction capacitance at the junction between the emitters cannot be immediately shut off due to discharge.

Therefore, there is a drawback that not only the conversion efficiency of the inverter circuit deteriorates, but also that the power transistor may be damaged due to the heat generated by the power transistor if the heat sink is small.

In addition, in order to eliminate the above-mentioned drawbacks, there is a method in which the input pulse widths applied to the bases of the power transistors are shortened by the time during which they are simultaneously conductive. However, the circuit that generates the pulse widths becomes complicated, and the charge This is not a good idea because the amount of accumulation varies depending on the variation in power transistors, the type, the current value flowing through the power transistors, etc.

The present invention has been made in view of the above points, and is designed to ensure that the other power transistor is cut off until the electric charge accumulated at the base-emitter junction of one power transistor is completely discharged. The purpose is to hold.

Therefore, in the present invention, in a separately excited inverter circuit having first and second power transistors connected in a push-pull manner, even if an operation command signal is input to the base side of the first power transistor, the second power transistor
a first inhibition circuit that maintains a cutoff state of the first power transistor until the electric charge accumulated at the junction between the base and emitter of the power transistor is completely discharged; and a base of the first power transistor. - A technical measure is adopted in which a second inhibiting circuit is provided to maintain the cut-off state of the second power transistor until the electric charge accumulated in the junction between the emitters is completely discharged.

The present invention will be explained below with reference to an embodiment shown in the drawings. FIG. 3 shows an inverter circuit according to the present invention, which is used, for example, for a converter of an ignition timing control circuit of an on-vehicle internal combustion engine. First, an oscillator 1, a DC power supply 2, an invert gate 11, base resistors 12 and 13, push-pull connected power transistors 14 and 15, a transformer 30, and a load 40 are equivalent to those with the same symbols shown in FIG. . The feature of the present invention is that a first inhibiting circuit 50 and a second inhibiting circuit 60 are provided between the power transistors 14 and 15 which are connected in a push-pull manner.
Until the electric charge accumulated in the junction between the base and emitter of one of the power transistors 4 and 15 completes discharge, the inhibition circuit is used to control the other power transistor so that it does not conduct. This is to prevent power transistors 14 and 15 from becoming conductive at the same time.

The first inhibition circuit 50 consists of a transistor 51 and a base resistor 52. The input side of the base resistor 52 is connected to the base of the second power transistor 15, and the collector-emitter of the transistor 51 is connected to the base of the first power transistor 14. Each is connected to the base and emitter. In other words, the first inhibiting circuit 50 becomes conductive when the base side of the second power transistor 15 is at a high potential.
The first power transistor 14 is forcibly cut off. Further, the second inhibition circuit 60 includes a transistor 61 and a base resistor 62, and the base resistor 62 is connected to the base of the first power transistor 14, and the transistor 61 is connected to the base of the first power transistor 14.
The collector and emitter of the second power transistor are connected to the base and emitter of the second power transistor, respectively. In other words, the second inhibiting circuit 60 becomes conductive when the base side of the first power transistor 14 is at a high potential, and the second inhibiting circuit 60 becomes conductive to the second power transistor 15.
is configured to forcibly shut down. In addition, in this example, the terminal 31 of the primary winding of the transformer 30
and 32, or each number of windings n ₁ between terminals 31 and 33,
Both n ₂ are 20 turns, and the number of turns in the secondary winding n ₃ is 2000.
The DC power supply is 12V.

Next, the operation of the above configuration will be explained using the signal waveform diagram of FIG. 4. First, it is assumed that immediately before time _t0 , the output of the oscillator 1 is at a low level as shown in FIG. 4F, and the output of the invert gate 11 is at a high level as shown in FIG. 4G. At this time, power transistor 15 is cut off and the other power transistor is conductive. Also, the first prohibition circuit 50
The transistor 51 is cut off, and the second inhibit circuit 6
0 transistor 61 is conductive. Therefore, under the influence of the inductance load of the primary winding 34, a collector current _i1 gradually increases as shown in FIG. has been done.

Then, at time t ₀ , the output of oscillator 1 becomes the fourth
The signal changes from a low level to a high level as shown in FIG. 4F, and the output of the invert gate 11 also changes from a high level to a low level as shown in FIG. 4G. However, at that moment, charge is accumulated in the junction between the base and emitter of the power transistor 14 as a junction capacitance, and this charge is accumulated in the base resistor 62 of the second inhibition circuit 60 and the base and emitter of the transistor 61. The power transistor 14 and the transistor 61 remain conductive for only a short time τ shown in FIG.
Collector current _i1 continues to flow through. Also at this time,
The base side of the power transistor 15 tries to reach a high potential due to the high level output of the oscillator 1, but since the transistor 61 is conductive, it absorbs the current flowing into the base side of the power transistor 15, forcing the power transistor 15 to It is being blocked.

After a time τ, when the charge accumulated between the base and emitter of the power transistor 14 completes discharging, the power transistor 14 and the transistor 61 are cut off at time _t1 , and at the same time, the other power transistor 15 is turned on. Figure 4 I
Collector current i ₂ gradually begins to flow as shown in . At this time, the base side of the power transistor 15 is connected to the fourth
As shown in Figure J, the first inhibition circuit 50 is at a high potential.
transistor 51 is conductive, and one power transistor 14 is forcibly cut off.

Thereafter, at time _t2 , the output of the oscillator 1 changes from a high level to a low level, and the base side of one power transistor 14 attempts to reach a high potential, but at that moment, the base and emitter of the other power transistor 15 Since the power transistor 15 and the transistor 51 of the first inhibition circuit 50 are conductive due to the charges accumulated during the period, the power transistor 14 maintains the cut-off state. Then, at time _t3 after time τ, when the charge accumulated between the base and emitter of power transistor 15 completes discharging, both transistors 1
5 and 51 are cut off, the other power transistor 14 and the transistor 61 of the second inhibition circuit 60 are turned on, and the operation is repeated in the same manner as described above.

In this way, in this embodiment, in an inverter circuit that controls the energization state of the primary winding 34 of the transformer 30 using a pair of push-pull connected power transistors, the charge accumulated between the base and emitter of one power transistor is By using this structure, one of the inhibiting circuits is activated, and this inhibiting circuit switches and controls the operating state of the other power transistor, thereby ensuring that the pair of power transistors become conductive at the same time. can be prevented. In addition, each prohibition circuit 50,
The transistors 51 and 61 in 60 only need to absorb the base current of each power transistor 14 and 15, and it is sufficient to use transistors with small power capacity.

In this embodiment, NPN type transistors are used as the power transistors 14 and 15, but PNP type transistors may be used instead, and in that case, the inhibition circuits 50 and 6
Transistors 51 and 61 in 0 are from NPN type.
It can be used instead of the PNP type. Further, the specific structure of the prohibition circuits 50 and 60 is not limited to that of this embodiment, and may be a circuit structure in which two or more transistors are combined.In short, the base potential of one power transistor is detected and the other is detected. Any configuration that can control the base potential (or current) of the power transistor may be used.

As described above, in the present invention, in a separately excited inverter circuit having first and second power transistors connected in a push-pull manner, the input part is connected to the base of one power transistor, and the output part is connected to the base of the other power transistor. Since the structure is connected to the base and the emitter, the structure of the inhibiting circuit is very simple, which has the effect of reducing the size of the device.

Further, according to the present invention, while one power transistor is on, an output signal is generated at the base and emitter of the other power transistor to cut off this power transistor. This has the effect of reliably maintaining the cut-off state. In particular, the present invention amplifies and uses the charge accumulated in the base of one power transistor and cuts off the other power transistor until this charge is discharged, so when the power transistor is cut off or switched on and on. Simultaneous conduction of both power transistors in the vicinity can be reliably prevented.
Efficient operation is possible. Moreover, the moment the base potential of one power transistor drops below a predetermined value and changes from the on state to the cutoff state, the output signal of the inhibition circuit immediately cancels the cutoff state of the other power transistor. This has the effect of being able to immediately shift from the cut-off state to the on-state.

[Brief explanation of the drawing]

FIG. 1 is an electric circuit diagram of a conventional separately excited inverter circuit, FIG. 2 is a signal waveform diagram for explaining the operation of the circuit in FIG. 1, and FIG. 3 is an electric circuit diagram showing an embodiment of the circuit of the present invention. FIG. 4 is a signal waveform diagram for explaining the operation of the circuit of the present invention. 1... Oscillator, 2... DC power supply, 14, 15...
...Power transistor, 30...Transformer, 50
...First prohibition circuit, 60...Second prohibition circuit.

Claims (1)

[Claims] 1. A device comprising first and second power transistors connected in a push-pull manner, a DC power supply, and a transformer,
A common connection terminal to which the first terminals of the first and second power transistors are commonly connected is connected to one power supply terminal of the DC power supply, and the other power supply terminal of the DC power supply is connected to the primary winding of the transformer. a common terminal, each second terminal of the first and second power transistors is separately connected to one or the other of both terminals of the primary winding, and
In a separately excited inverter circuit in which a base portion of a power transistor is controlled by an external signal, a first power transistor is connected to a base of the second power transistor.
and a first output part connected to the base and emitter of the first power transistor,
When the base potential of the second power transistor inputted from the first input section is equal to or higher than a predetermined value, an output signal is generated from the first output section to cut off the first power transistor; a first inhibiting circuit that inputs and amplifies the charge accumulated in the base of the second power transistor from the first input section and cuts off the first power transistor until the charge is discharged; A second power transistor is connected to the base of the first power transistor.
and a second output part connected to the base and emitter of the second power transistor,
When the base potential of the first power transistor inputted from the second input section is equal to or higher than a predetermined value, an output signal is generated from the second output section to cut off the second power transistor; and a second inhibiting circuit that inputs and amplifies the charge accumulated in the base of the first power transistor from the second input section and shuts off the second power transistor until the charge is discharged. A separately excited inverter circuit characterized by: