JPS6276805A - High frequency gain control circuit - Google Patents

High frequency gain control circuit

Info

Publication number
JPS6276805A
JPS6276805A JP21631685A JP21631685A JPS6276805A JP S6276805 A JPS6276805 A JP S6276805A JP 21631685 A JP21631685 A JP 21631685A JP 21631685 A JP21631685 A JP 21631685A JP S6276805 A JPS6276805 A JP S6276805A
Authority
JP
Japan
Prior art keywords
output
gain control
high frequency
balance
balanced
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21631685A
Other languages
Japanese (ja)
Inventor
Shigeaki Morita
森田 重明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to JP21631685A priority Critical patent/JPS6276805A/en
Publication of JPS6276805A publication Critical patent/JPS6276805A/en
Pending legal-status Critical Current

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  • Control Of Amplification And Gain Control (AREA)

Abstract

PURPOSE:To obtain the AGC (automatic gain control) effect by changing the balance of a balance type high frequency amplifier in a direction to be balanced by an AM detection output. CONSTITUTION:Inputs to a differential amplifier are inputted in the same polarity, and a bias voltage of a transistor (TR) 1 canceling the output side to oppose the outputs is lowered and a bias voltage of a TR 2 is increased. In increasing the input to a TR 3 at a positive voltage, the internal voltage of the TR 3 is decreased, the operation of the TR 3 approaches the operating point of the TR 1 so as to be balanced. Thus, the output of the differential amplifier is decreased, the detection output is reduced to make the output flat.

Description

【発明の詳細な説明】 この発明はラジオ等の高周波増幅器について電界強度の
強弱による出力の変化を平坦化する為に考案した回路が
バランスしたときには出力がキャンセルされシグナルが
現われない回路構成になっているこの差動増幅器の一方
のバイアス電圧をトランジスター等の可変抵抗素子をも
ちいてアンバランス状態にセットして出力が現われない
ようにしておきこのバイアス可変抵抗素子をAM検波器
よりの出力で強い入力が入ると可変抵抗素子の抵抗が変
わり差動増幅器がバランス点に近ずくようにしてやれば
結果検波器の出力が押さえられ平坦化した出力が得られ
るという回路で さらに詳しく説明すれば図1で示す通りで差動増幅器の
入力側は同極性で入力し出力側は出力を対向させキャン
セルさせるTRIのバイアス電圧は低くしTR2のバイ
アス電圧は高くするTR3への入力はプラス電圧で増加
するようにすればTR3の内部抵抗が減少しTR3側の
動作がTR1側の動作点に近ずきバランス検波出力もさ
がることになり出力を平坦化できる 補足説明 1)中間同波トランスのバランスのとり方はコアーをコ
イルの中央におきネジ等で廻しバランスをする様にして
コンデンサーで同調をとるようにすれば調整がむずかし
くなくできる 2)TR3のベース入力にオーディオ信号も含めて入力
させれば回路の雑音と歪も少 なくすることができる
[Detailed Description of the Invention] This invention is a circuit devised to flatten changes in output due to strength of electric field for high frequency amplifiers such as radios. When the circuit is balanced, the output is canceled and no signal appears. The bias voltage of one side of this differential amplifier is set to an unbalanced state using a variable resistance element such as a transistor so that no output appears, and this bias variable resistance element is set to a strong input by the output from the AM detector. When , the resistance of the variable resistance element changes and the differential amplifier approaches the balance point.As a result, the output of the detector is suppressed and a flattened output is obtained.A more detailed explanation of this circuit is shown in Figure 1. The input side of the differential amplifier has the same polarity as the input, and the output side has the output facing each other for cancellation.The bias voltage of TRI is low, and the bias voltage of TR2 is high.The input to TR3 is set to increase with a positive voltage. In this case, the internal resistance of TR3 decreases, the operation of TR3 approaches the operating point of TR1, and the balanced detection output also decreases, flattening the output.Supplementary explanation 1) How to balance the intermediate same wave transformer is to Adjustment can be avoided by placing it in the center of the coil and turning it with a screw, etc. to balance it and tuning it with a capacitor. 2) If you input audio signals to the base input of TR3, you can eliminate circuit noise and distortion. can also be reduced

【図面の簡単な説明】[Brief explanation of drawings]

図1はゲイン制御系を表わす回路図で TR1−差動増幅用トランジスター TR2−差動増幅用トランジスター TR3−バイアス可動用トランジスターRFT−高周波
トランス IFT−バランス用中間周波トランス D−AM検波用ダイオード
Figure 1 is a circuit diagram showing the gain control system. TR1 - Differential amplification transistor TR2 - Differential amplification transistor TR3 - Bias movable transistor RFT - High frequency transformer IFT - Balance intermediate frequency transformer D - AM detection diode

Claims (1)

【特許請求の範囲】[Claims] 図1の回路構成をしていてバランス型高周波増幅器のバ
ランスをAM検波出力でバランスする方向に変えること
によりAGC(オートマチックゲインコントロール)効
果を得ようとするものについて
Regarding a device that has the circuit configuration shown in Figure 1 and attempts to obtain an AGC (automatic gain control) effect by changing the balance of the balanced high-frequency amplifier to balance with the AM detection output.
JP21631685A 1985-09-30 1985-09-30 High frequency gain control circuit Pending JPS6276805A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21631685A JPS6276805A (en) 1985-09-30 1985-09-30 High frequency gain control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21631685A JPS6276805A (en) 1985-09-30 1985-09-30 High frequency gain control circuit

Publications (1)

Publication Number Publication Date
JPS6276805A true JPS6276805A (en) 1987-04-08

Family

ID=16686614

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21631685A Pending JPS6276805A (en) 1985-09-30 1985-09-30 High frequency gain control circuit

Country Status (1)

Country Link
JP (1) JPS6276805A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1057190C (en) * 1994-11-09 2000-10-11 株式会社久保田 Rise-and-fall controller for operation vehicle operating on ground

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1057190C (en) * 1994-11-09 2000-10-11 株式会社久保田 Rise-and-fall controller for operation vehicle operating on ground

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