JPS6274980A - Method of bonding members for constituting semiconductor package - Google Patents

Method of bonding members for constituting semiconductor package

Info

Publication number
JPS6274980A
JPS6274980A JP21729585A JP21729585A JPS6274980A JP S6274980 A JPS6274980 A JP S6274980A JP 21729585 A JP21729585 A JP 21729585A JP 21729585 A JP21729585 A JP 21729585A JP S6274980 A JPS6274980 A JP S6274980A
Authority
JP
Japan
Prior art keywords
adhesive
thickness
semiconductor package
equation
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21729585A
Other languages
Japanese (ja)
Inventor
Toshiyuki Arai
敏之 新井
Keiji Hazama
硲 圭司
Shinichi Oota
伸一 太田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP21729585A priority Critical patent/JPS6274980A/en
Publication of JPS6274980A publication Critical patent/JPS6274980A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/10Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Adhesives Or Adhesive Processes (AREA)

Abstract

PURPOSE:To obtain members for constituting a semiconductor package capable of preventing an adhesive from peeling off and having excellent sealing properties, by integrating two specified members among those for constituting a semiconductor package using an adhesive in a particular thickness. CONSTITUTION:A method of integrating two specified members among those for constituting a semiconductor package with an adhesive, wherein the adhesive is used in the following thickness. When an adhesive is interposed between a member 1 (e.g., cap) and a member 2 (e.g., substrate) to form a double-layer structure, the adhesive is used in a thickness X larger than that of equation I. When an adhesive is not interposed between the member 1 and the member 2, the thickness of the adhesive is as noted below. When equation II is established, the adhesive is used in a thickness X larger than that of equation III, while when equation IV is established, the adhesive is used in a thickness X larger than that of equation V. In the equations, alpha1, alpha2, and alpha3 are coefficients of linear expansion of the members 1 and 2 and the adhesive, respectively; E is the coefficient of longitudinal elasticity of the adhesive; nu is the Poisson ratio of the adhesive; tau1 and tau2 are the bonding strength between the adhesive and the member 1 and the one between the adhesive and the member 2, respectively; t is the temperature difference between the maximum temperature of an environment to which the semiconductor package is exposed and room temperature; and I0 is unit strength.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、キャビティ構造を有する半導体1nパツケー
ジを構成する部材の接着法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of bonding members constituting a semiconductor 1n package having a cavity structure.

〔従来の技術〕[Conventional technology]

従来・キャビティ構造を有する半導体類ノく・7ケージ
の形成法として、接着剤を用いた半導体類の封止方法は
種々検討されている(例えば実開昭49−132767
号公報)。
Conventionally, various methods of sealing semiconductors using adhesives have been studied as a method for forming seven cages for semiconductors having a cavity structure (for example, Utility Model Application Publication No. 49-132767).
Publication No.).

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

しかしながら従来方法においては、接着剤の硬化時ある
いは耐熱試験等の高温環境下において、キャップ、基板
および接着剤の熱膨張係数が異なる場合、キャップと接
着剤および基板と接着剤それぞれの界面において剪断応
力を生じ、この剪断応力に耐えうる接着剤の厚さがない
ため、これらの界面より接着剤が剥離し、封止性を評価
するGross  Leak (G/L)試験において
多くの不良を生じた。
However, in the conventional method, when the cap, the substrate, and the adhesive have different coefficients of thermal expansion during curing of the adhesive or in a high-temperature environment such as during a heat resistance test, shear stress is generated at the interface between the cap and the adhesive and between the substrate and the adhesive. Since the adhesive was not thick enough to withstand this shearing stress, the adhesive peeled off from these interfaces, resulting in many failures in the Gross Leak (G/L) test for evaluating sealing properties.

本発明はこのような接着剤の剥離を防止し、封止性の優
れた半導体類パッケージを構成する部材の接着法を提供
しようとすものである。
The present invention aims to provide a method for bonding members constituting a semiconductor package that prevents such peeling of the adhesive and has excellent sealing properties.

c問題点を解決するための手段〕 本発明は半導体類パッケージを構成する部材の内、ある
2個の部材を接着剤で一体化する方法において、部材1
の線膨張係数をαa、部材2の線膨張係数をα2、接着
剤の線膨張係数をαa、接着剤の縦弾性係数をE、接着
剤のポアソン比をv、接着剤と部材lとの接着強度をτ
1、接着剤と部材2との接着強度をτ2、および半導体
類パフケージがさらされる最高環境温度と室温との温度
差をt、単位長さを10とし、 部材1と部材2との間に接着剤を介在させた二重量ね合
わせ構造の場合には、少なくとも接着剤の厚さXが、 以上あり、 部材1と部材2との間に接着剤を介在させない構造の場
合には、 α、−α2 : τ2 のとき、少なくとも接着剤の厚
さXが、 も接着剤の厚さXが、 る半導体類パッケージを構成する。
Means for Solving Problem c] The present invention provides a method for integrating two members of the members constituting a semiconductor package using an adhesive.
The coefficient of linear expansion is αa, the coefficient of linear expansion of member 2 is α2, the coefficient of linear expansion of adhesive is αa, the modulus of longitudinal elasticity of adhesive is E, the Poisson's ratio of adhesive is v, the adhesion between adhesive and member l The intensity is τ
1. The adhesive strength between the adhesive and member 2 is τ2, the temperature difference between the highest environmental temperature to which the semiconductor puff cage is exposed and room temperature is t, and the unit length is 10, and the adhesive between member 1 and member 2 is In the case of a double bonded structure with an adhesive interposed, the thickness of the adhesive is at least X, and in the case of a structure with no adhesive interposed between member 1 and member 2, When α2: τ2, a semiconductor package is constructed in which at least the thickness of the adhesive is X, and the thickness of the adhesive is also X.

本発明を図面に従って、詳細に説明する。本発明はキャ
ビティ構造を有する半導体類パッケージを構成する部材
の接着法に関するものであるが、ここでは、第1図に示
すように基板に多数の外部端子用ピンを有するビングリ
ッドアレイ (PGA)型パッケージの封止法を例にと
って説明する。
The present invention will be explained in detail with reference to the drawings. The present invention relates to a method of bonding members constituting a semiconductor package having a cavity structure, and here, as shown in FIG. This will be explained using a package sealing method as an example.

第1図に示すようにPGAの封止法として、半導体類5
を収納するためのキャビティ8を有するキャップ1と外
部端子用ピン6を有する基板2を接着剤3にて封止する
。4は金属細線、9は回路である。キャップ1と接着剤
3および基板2と接着剤3それぞれの界面において生ず
る剪断応力に耐えうる接着剤3の厚さは、接着剤3がキ
ャップ1と基板2とに挟まれた二重量ね合わせ構造とし
て求めた。その結果、第2図に示すようなキャンプ1と
基板2との間に接着剤3を介在させた二重量ね合わせ構
造においてはキャップ1と接着剤3の界面において生ず
る剪断応力に耐えうる接着剤3の厚さxlは また、基板2と接着剤3の界面において生ずる剪断応力
に耐えうる接着剤3の厚さx2は、従って、必要な最小
の接着剤3の厚さはX=X電+x2= になる。
As shown in Figure 1, as a PGA sealing method, semiconductors 5
A cap 1 having a cavity 8 for housing the cap 1 and a substrate 2 having an external terminal pin 6 are sealed with an adhesive 3. 4 is a thin metal wire, and 9 is a circuit. The thickness of the adhesive 3 that can withstand the shear stress generated at the interfaces between the cap 1 and the adhesive 3 and between the substrate 2 and the adhesive 3 is determined by the thickness of the adhesive 3 that can withstand the shear stress generated at the interfaces between the cap 1 and the adhesive 3 and between the substrate 2 and the adhesive 3. I asked for it as. As a result, in a double bonded structure in which an adhesive 3 is interposed between a camp 1 and a substrate 2 as shown in FIG. The thickness xl of the adhesive 3 is also the thickness x2 of the adhesive 3 that can withstand the shear stress generated at the interface between the substrate 2 and the adhesive 3. Therefore, the minimum required thickness of the adhesive 3 is X=X electric + x2 = becomes.

計算上は各種材料のキャップ1および基板2において、
接着剤3の縦弾性係数Eが5〜30kg/−のとき5〜
400μmである。なお縦弾性係数Eは半導体類のパッ
ケージがさらされる最高環境温度における値とした。
In calculations, for the cap 1 and the substrate 2 made of various materials,
5 to 5 when the longitudinal elastic modulus E of the adhesive 3 is 5 to 30 kg/-
It is 400 μm. The longitudinal elastic modulus E was taken as the value at the highest environmental temperature to which the semiconductor package is exposed.

次に、第3図に示したキャップ1と基板2との間に接着
剤3を介在させない場合について説明する。第3図は半
導体類5を収納するキャビティ8を有するキャップ1と
基板2を嵌合させて一体化した後、部材1および部材2
の嵌合部の周辺部が接着剤3により覆われるように接着
固定(以下コーキング法と称す)したものである。第3
図ではα3−α2  τ2 の場合であり、コーキング
法をモデル化した第4図より接着剤3の厚さx2は、既
述の二重量ね合わせ構造の計算結果からE(α1−αz
)t (。
Next, a case where the adhesive 3 is not interposed between the cap 1 and the substrate 2 shown in FIG. 3 will be described. FIG. 3 shows the member 1 and the member 2 after the cap 1 having the cavity 8 for storing the semiconductor 5 and the substrate 2 are fitted and integrated.
The periphery of the fitting part is fixed with adhesive (hereinafter referred to as caulking method) so that the peripheral part of the fitting part is covered with adhesive 3. Third
The figure shows the case of α3−α2 τ2, and from FIG. 4, which models the caulking method, the thickness x2 of the adhesive 3 can be calculated as E(α1−αz
)t (.

1≧τ1/τ2 (1+ν)  以上、すなわち200
μm以上の厚さであればよい。
1≧τ1/τ2 (1+ν) or more, that is, 200
The thickness may be at least μm.

キャップ1と基板2を接着剤3を用いて封止する方法は
、第5図に示すように、予め硬化させた接着剤シート7
を介在させて接合する方法であってもよい。構造は二重
量ね合わせ構造となるが、x、+X2の接着剤3の厚さ
Xが前記条件を満たす厚さであれば何ら問題はない。
The method of sealing the cap 1 and the substrate 2 with the adhesive 3 is as shown in FIG.
It is also possible to use a method of joining with an intermediary. Although the structure is a double weighted structure, there is no problem as long as the thickness X of the adhesive 3 of x and +X2 satisfies the above conditions.

上記のようにキャップ1と基板2を接着剤3により接着
固定することによりキャップ1、基板2および接着剤3
の熱膨張係数の差によって生ずる剪断応力が緩和され、
その結果接着剤が剥離することなくパッケージの封止性
が向上した。
By adhesively fixing the cap 1 and the substrate 2 with the adhesive 3 as described above, the cap 1, the substrate 2, and the adhesive 3 are
The shear stress caused by the difference in the thermal expansion coefficient of
As a result, the sealability of the package was improved without the adhesive peeling off.

本発明に用いられるキャップ1および基板2としてはそ
れぞれの半導体類のパッケージに対する要求特性に応じ
て種々の種類のものが用いられるが、高い耐熱性(耐熱
変形性および耐熱劣化性)と低い透湿性および一定水準
以上の電機、機械特性に加えさらに一定水準以上の成形
性を有することが必要である。
Various types of caps 1 and substrates 2 used in the present invention can be used depending on the characteristics required for each semiconductor package. In addition to electrical and mechanical properties of a certain level or higher, it is also necessary to have moldability of a certain level or higher.

代表例としては、半導体類パッケージに要求される各種
の信頼性試験に耐えられる熱可塑性樹脂、。
A typical example is thermoplastic resin, which can withstand the various reliability tests required for semiconductor packages.

熱硬化性樹脂、これらの樹脂の一部とガラス繊維、溶融
シリカを中心とした各種充填剤との組み合わせ、アルミ
ナ等のセラミック、アルミニウム等の金属・サファイア
ガラス、ホウケイ酸力゛ラス等のガラスを挙げることが
できる。
Thermosetting resins, combinations of some of these resins with various fillers such as glass fiber and fused silica, ceramics such as alumina, metals such as aluminum, sapphire glass, and glasses such as borosilicate glass. can be mentioned.

また、既述の例はPGA型パッケージのキャップと基板
との接着すなわち封止法についてであるが、本発明は半
導体類パッケージを構成する部材の内、ある2個の部材
を接着剤にて一体化する方法であるから、適用例として
は、少なくとも1個がキャビティを有する2個の板状体
の間に半導体類を搭載したリードフレームを挟んで接着
剤にて一体化するDIPの封止法、内部にキャビティを
有する熱可塑性樹脂性のパッケージ(特公昭58−18
5号公報)によるEPROM用パッケージの熱可塑性樹
脂板状成形品と紫外線透過用の窓材との接着、PGAパ
ッケージの基板とピンとの接着、およびDIP、PGA
パッゲージとヒートシンクとの接着等を挙げることがで
きる。
Furthermore, although the above-mentioned example concerns the adhesion or sealing method between the cap and the substrate of a PGA type package, the present invention relates to the method of bonding, or sealing, the cap and the substrate of a PGA type package. An example of its application is a DIP sealing method in which a lead frame on which semiconductors are mounted is sandwiched between two plate-like bodies, at least one of which has a cavity, and then integrated with adhesive. , a thermoplastic resin package with a cavity inside (Special Publication No. 58-18
5), bonding of a thermoplastic resin plate-shaped molded product of an EPROM package and a window material for transmitting ultraviolet rays, bonding of a substrate and pin of a PGA package, and DIP, PGA
Examples include adhesion between the package and the heat sink.

さらに接着剤3としては合体時および高温辺境時の熱に
耐えるものが要求され、シリコーン系、ビニルニトリル
ゴムあるいはポリウレタン系の接着剤を用いることがで
きる。
Furthermore, the adhesive 3 is required to be able to withstand heat during joining and at high temperatures, and silicone-based, vinyl nitrile rubber, or polyurethane-based adhesives can be used.

〔実施例〕〔Example〕

以下、本発明を実施例に基づいて詳細に説明するが、本
発明はこれに限定されるものではない。
Hereinafter, the present invention will be explained in detail based on Examples, but the present invention is not limited thereto.

(実施例1、比較例1) 熱変形温度(ASTM  D648.18.6kg/d
荷重)が300℃以上のポリオキシベンゾイルにより第
3図に示すような基板2を作製し、アルミニウム類のキ
ャップ1を基板2とキャップlの間に接着剤を介在させ
ない構造とし、シリコーン系接着剤を200μm以上の
高さで塗布して接着固定しPGAパッケージを作製した
(Example 1, Comparative Example 1) Heat distortion temperature (ASTM D648.18.6 kg/d
A substrate 2 as shown in FIG. 3 is made of polyoxybenzoyl with a load of 300° C. or more, and an aluminum cap 1 is constructed so that no adhesive is interposed between the substrate 2 and the cap L, and a silicone adhesive is used. was applied to a height of 200 μm or more and fixed with adhesive to produce a PGA package.

かかるPGAパッケージを一55℃〜150℃の間で5
00回の冷熱サイクルを繰り返し試験に供したが、封止
性の低下は認められずG/L試験においても以上は認め
られず十分な信頼性を有するPGAパッケージが得られ
た。
Such a PGA package is heated between -55°C and 150°C for 50 minutes.
Although the test was repeated through 00 heating and cooling cycles, no deterioration in sealing performance was observed, and no deterioration was observed in the G/L test, so a PGA package with sufficient reliability was obtained.

一方上記実施例と同一の材料を使用し、第1図において
キャップ1と基板2との間に接着剤3を介在させ接着剤
の厚さを50μmにして接着したものを用いて得られた
PGAパッケージは一55°C〜150°Cの間で温度
を上下させて2〜3回冷熱サイクルを与えると接着剤の
剥離が認められた。
On the other hand, a PGA obtained by using the same materials as in the above embodiment and bonding the cap 1 and the substrate 2 with the adhesive 3 interposed between the cap 1 and the substrate 2 with a thickness of 50 μm as shown in FIG. When the package was subjected to 2 to 3 cooling/heating cycles at temperatures ranging from -55°C to 150°C, peeling of the adhesive was observed.

なおここでα、α2はそれぞれ2.9 X 10”℃−
1,2,OX 10” °c−’、 Eは24 kg/
cJ、 vは0.5、τ1、τ2はそれぞれ2466.
21.8、tは125°c、toはl cmで の値は180μmである。
Note that α and α2 are each 2.9 × 10”℃−
1,2,OX 10” °c-', E is 24 kg/
cJ, v is 0.5, τ1, τ2 are each 2466.
21.8, t is 125°c, to is l cm and the value is 180 μm.

(実施例2、比較例2) 熱変形温度(ASTM  D648.18.6kg/c
rA荷重)が260℃以上のポリフェニレンサルファイ
ド樹脂により第6図に示すような開口窓を有する熱可塑
性樹脂板状成形品10を成形し半導体類収納側段差11
にホウケイ酸ガラスの蓋体12を嵌合させ、第6図に示
すような板状成形品lOと蓋体12の間に接着剤3を介
在させない構造とし、シリコーン系接着剤を200μm
の高さで塗布して接着し上蓋とした。一方、同じ樹脂に
より窪みのみを有する板状成形品を作り、下蓋とし上蓋
とした蓋の合体面を加熱するとともに、特公昭58−1
85号公報に示されているような方法により、EPRO
M素子を装着したリードフレームを挟み加圧することに
より一体化させた。
(Example 2, Comparative Example 2) Heat distortion temperature (ASTM D648.18.6 kg/c
A thermoplastic resin plate-shaped molded product 10 having an opening window as shown in FIG.
A lid body 12 made of borosilicate glass is fitted to the lid body 12, and a structure is created in which no adhesive 3 is interposed between the plate-shaped molded product lO and the lid body 12 as shown in FIG.
It was applied and adhered to a height of On the other hand, a plate-shaped molded product with only a depression was made from the same resin, and the combined surfaces of the lower and upper lids were heated, and
EPRO by the method shown in Publication No. 85
They were integrated by sandwiching and applying pressure to the lead frame on which the M element was mounted.

かかるEPROMを一55℃〜150°Cの間で500
回の冷熱サイクルを繰り返し試験に供したが、封止性の
低下は認められずG/L試験においても以上は認められ
ず十分な信頼性を有するEPROMが得られた。
Such an EPROM is heated at a temperature between -55°C and 150°C for 500°C.
Although the test was repeated through several cooling/heating cycles, no deterioration in sealing performance was observed, and no deterioration was observed in the G/L test, and an EPROM having sufficient reliability was obtained.

一方上記実施例と同一の材料を使用し、上蓋と蓋体の間
に接着剤を介在させ接着剤の厚さが50μmで接着した
ものを用いて得られたEPROMは一55℃〜150℃
の間で温度を上下させて2〜3回冷熱サイクルを与える
と接着剤の剥離が認められた。
On the other hand, an EPROM obtained by using the same material as in the above example and bonding the upper lid and the lid with an adhesive interposed between them and the thickness of the adhesive is -55°C to 150°C.
Peeling of the adhesive was observed when the temperature was raised and lowered between 2 and 3 times and the temperature was cycled 2 to 3 times.

なおここでα1 α2はそれぞれ3.95X10−6°
C−1,1,8X10−5℃柵、Eは24kg/cJ、
νは0.5、τ8、τ2はそれぞれ28.1.24.3
、Lは125℃、10はl cmで 〔発明の効果〕 本発明により、キャビティ構造を有する半導体類パッケ
ージの部材と接着剤の熱膨張係数差によって生ずる剪断
応力が緩和され接着剤が剥離することがなく、冷熱サイ
クル等環境試験下においても、十分な信頼性を有する半
導体類パッケージを構成する部材の接着が可能となった
Note that α1 and α2 are each 3.95X10-6°
C-1,1,8X10-5℃ fence, E is 24kg/cJ,
ν is 0.5, τ8 and τ2 are respectively 28.1.24.3
, L is 125°C, and 10 is l cm. [Effects of the Invention] According to the present invention, the shear stress caused by the difference in thermal expansion coefficient between the adhesive and the member of the semiconductor package having a cavity structure is relaxed, and the adhesive peels off. This makes it possible to bond components of semiconductor packages with sufficient reliability even under environmental tests such as thermal cycles.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明に一実施例としてのPGA型パッケージ
の要部断面図、第2図は二重量ね合わせ法のモデル図、
第3図は本発明の一実施例としてのコーキング法による
PGA型パッケージの要部断面図、第4図はコーキング
法のモデル図、第5図は接着剤シートを用いた二重量ね
合わせ構造のモデル図、第6図はEOROM用パッケー
ジにおける蓋体と熱可塑性樹脂板状成形品の接着状態を
示す概略断面図である。 符号の説明 l キャップ1 (部材1)2 基板(部材2)3 接
着剤       4 金属細線5 半導体類    
  6 ピン 7 接着剤シート    8 キャビティ9 回路  
     10 熱可塑性樹脂板状成形品 11 段差       12 蓋体 代理人  弁理士 若林邦彦  − 彎 −−
FIG. 1 is a cross-sectional view of the main parts of a PGA type package as an embodiment of the present invention, FIG. 2 is a model diagram of the double quantity balancing method,
Fig. 3 is a cross-sectional view of the main parts of a PGA type package using the caulking method as an embodiment of the present invention, Fig. 4 is a model diagram of the caulking method, and Fig. 5 is a double-layered structure using an adhesive sheet. The model diagram, FIG. 6, is a schematic cross-sectional view showing the state of adhesion between the lid and the thermoplastic resin plate-shaped molded product in the EOROM package. Explanation of symbols l Cap 1 (member 1) 2 Substrate (member 2) 3 Adhesive 4 Thin metal wire 5 Semiconductors
6 Pin 7 Adhesive sheet 8 Cavity 9 Circuit
10 Thermoplastic resin plate-shaped molded product 11 Step 12 Lid body agent Patent attorney Kunihiko Wakabayashi − Ke −−

Claims (1)

【特許請求の範囲】 1、半導体類パッケージを構成する部材の内、ある2個
の部材を接着剤で一体化する方法において、部材1の線
膨張係数をα_1、部材2の線膨張係数をα_2、接着
剤の線膨張係数をα_a、接着剤の縦弾性係数をE、接
着剤のポアソン比をv、接着剤と部材1との接着強度を
τ_1、接着剤と部材2との接着強度をτ_2、および
半導体類パッケージがさらされる最高環境温度と室温と
の温度差をt、単位長さをl_0とし、 (A)部材1と部材2との間に接着剤を介在させた二重
量ね合わせ構造の場合には、少なくとも接着剤の厚さx
が、 Etl_0/2(l+v){α_a−α_1/τ_1+
α_a−α_2/τ_2}以上あり、 (B)部材1と部材2との間に接着剤を介在させない構
造の場合には、 (イ)α_a−α_1/α_a−α_1≧τ_1/τ_
2のとき、少なくとも接着剤の厚さxが、 E(α_a−α_1)/2τ_1(1+v)<0以上あ
り、 (ロ)α_a−α_1/α_a−α_2<τ_1/τ_
2のとき、少なくとも接着剤の厚さxが、 E(α_a−α_2)/2τ_2(1+v)<0以上あ
ることを特徴とする半導体類パッケージを構成する部材
の接着法。
[Claims] 1. In a method of integrating two members constituting a semiconductor package with an adhesive, the coefficient of linear expansion of member 1 is α_1, and the coefficient of linear expansion of member 2 is α_2. , the coefficient of linear expansion of the adhesive is α_a, the modulus of longitudinal elasticity of the adhesive is E, the Poisson's ratio of the adhesive is v, the adhesive strength between the adhesive and member 1 is τ_1, the adhesive strength between the adhesive and member 2 is τ_2 , and the temperature difference between the highest environmental temperature to which the semiconductor package is exposed and the room temperature is t, and the unit length is l_0. , at least the adhesive thickness x
But Etl_0/2(l+v){α_a−α_1/τ_1+
α_a-α_2/τ_2} or more; (B) In the case of a structure in which no adhesive is interposed between member 1 and member 2, (B) α_a-α_1/α_a-α_1≧τ_1/τ_
2, at least the thickness x of the adhesive is E(α_a-α_1)/2τ_1(1+v)<0 or more, and (b) α_a-α_1/α_a-α_2<τ_1/τ_
2, a method for bonding members constituting a semiconductor package, characterized in that at least the thickness x of the adhesive is E(α_a−α_2)/2τ_2(1+v)<0 or more.
JP21729585A 1985-09-30 1985-09-30 Method of bonding members for constituting semiconductor package Pending JPS6274980A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21729585A JPS6274980A (en) 1985-09-30 1985-09-30 Method of bonding members for constituting semiconductor package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21729585A JPS6274980A (en) 1985-09-30 1985-09-30 Method of bonding members for constituting semiconductor package

Publications (1)

Publication Number Publication Date
JPS6274980A true JPS6274980A (en) 1987-04-06

Family

ID=16701896

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21729585A Pending JPS6274980A (en) 1985-09-30 1985-09-30 Method of bonding members for constituting semiconductor package

Country Status (1)

Country Link
JP (1) JPS6274980A (en)

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