JPH1050775A - Double coated adhesive insulating tape for semiconductor device and lead frame employing it - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent package crack by bringing the coefficient of linear expansion of an adhesive insulating tape close to that of a semiconductor device. SOLUTION: The double coated adhesive insulating tape 3 for bonding a semiconductor device 1 to a lead frame 2 comprises a polyimide layer 3a and an adhesive 3b, at least one of which is admixed with a quartz based filter 4 at a mixing ratio of 70% or above. Since the coefficient of linear expansion of the double coated adhesive insulating tape 3 is decreased and it can be brought close to that of the semiconductor device 1, package crack can be prevented even if a heat shock test is performed after packaging.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a double-sided adhesive tape for a semiconductor device to be attached to a lead frame and a lead frame using the same.

[0002]

2. Description of the Related Art LOC (Lead On Ch
ip) A heat-resistant insulating tape (or film) with a thermoplastic or thermosetting adhesive layer applied to both sides as a lead frame used for semiconductor devices with a structure, etc.
There is a lead frame in which a semiconductor element is mounted on the high heat-resistant insulating tape by heating and pressing.

In the case of a lead frame of this type, a polyimide film is usually used for the high heat-resistant insulating tape. As a method of attaching to a lead frame, a punching and attaching method using a die is adopted. Specifically, a tape wound in a reel shape is punched out into a predetermined shape by a mold, and the tape is attached to a lead frame by heating and pressing.

A conventional film having a heat-resistant adhesive layer used for this kind of application is disclosed in, for example, JP-A-5-1176.
Japanese Patent Publication No. 20 and other publications. The composition for a heat-resistant adhesive used in this film contains a predetermined amount or less of an inorganic filler.

[0005]

However, according to the conventional double-sided adhesive tape for a semiconductor device, the coefficient of linear expansion is several tens times or more larger than that of the semiconductor element. During testing, the package may crack. Accordingly, an object of the present invention is to provide a double-sided adhesive insulating tape for a semiconductor device, in which the linear expansion coefficient of the adhesive insulating tape and the semiconductor element are made close to each other to prevent a package crack, and a lead frame using the same.

[0006]

In order to achieve the above-mentioned object, the present invention comprises an adhesive applied to both surfaces of a resin layer, and is adhered to a surface of a lead frame in a mounting area of a semiconductor element. In one embodiment, at least one of the adhesive and the resin layer contains a quartz filler having a mixing ratio of 70% or more.

According to this configuration, since the filler is contained in the adhesive or the resin layer, the coefficient of linear expansion of the double-sided adhesive insulating tape is reduced, and can be made closer to the coefficient of linear expansion of the semiconductor element. Therefore, even if a heat shock test is performed after packaging, it is possible to prevent the occurrence of package cracks. The quartz-based filler may be subjected to a chemical treatment on its surface.

[0008] According to this configuration, the bonding property to the adhesive or resin layer to be mixed can be improved. Further, the above object is to provide a lead frame in which an insulating adhesive for fixing the semiconductor element is attached to a mounting region of the inner lead semiconductor element, wherein the insulating adhesive is
A lead frame using a double-sided adhesive insulating tape, characterized in that an adhesive is applied to both surfaces of a resin layer, and at least one of the resin layer and the adhesive contains a quartz filler having a mixing ratio of 70% or more. Is also achieved by

According to this configuration, the filler mixed with the adhesive or the resin layer functions to lower the linear expansion coefficient of the double-sided adhesive insulating tape so as to approach the linear expansion coefficient of the semiconductor element. As a result, even if a heat shock test is performed after packaging, it is possible to prevent the occurrence of package cracks.

[0010]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a front sectional view showing a semiconductor device using a double-sided adhesive insulating tape for a semiconductor device according to the present invention. When fixing the semiconductor element 1 to the lead frame 2, a double-sided adhesive insulating tape 3 is used. The double-sided adhesive insulating tape 3 has a configuration in which an adhesive 3b is applied to both surfaces of a polyimide layer 3a as a resin layer. A polyamide-imide resin is used for the adhesive 3b, and a quartz filler 4 is mixed into the resin. By incorporating the filler 4, the coefficient of linear expansion of the double-sided adhesive insulating tape 3 can be greatly reduced. In addition, the filler 4 can be mixed with the polyimide layer 3a,
Similarly, the linear expansion coefficient of the double-sided adhesive insulating tape 3 can be reduced.

The quartz filler has a linear expansion coefficient of 0.4 × 1.
The linear expansion coefficient of the polyimide used for the polyimide layer 3a is 15 × 10 ^-6 K ^-1 while the linear expansion coefficient of the polyamideimide resin used for the adhesive 3b is 0 ^-6 K ^-1. 52 × 10 ⁻⁶ K ⁻¹ . However, if a quartz filler is mixed into the adhesive 3b made of a polyamideimide resin,
The linear expansion coefficient of polyimide can be reduced. In addition,
The amount of the silica-based filler mixed with the semiconductor element is such that the linear expansion coefficient is almost equal (the linear expansion coefficient of Si of the semiconductor element is 2.5 × 10 ⁻⁶ K ⁻¹ , and the linear expansion coefficient of SiO ₂ is 7). .
4 × 10 ⁻⁶ K ^{−1 to} 13.6 × 10 ⁻⁶ K ⁻¹ ), specifically, 70% or more. Thereby, thermal reliability such as heat shock and solder reflow can be improved.

[0012]

Next, an embodiment of the present invention will be described. (Example 1) In manufacturing a semiconductor device having the configuration shown in FIG. 1, a material in which a quartz filler 4 was mixed was used as an adhesive 3b of a double-sided adhesive insulating tape 3. When the relationship between the mixing amount of the quartz filler and the coefficient of linear expansion between the filler and the filler-containing adhesive was examined, the characteristics shown in FIG. 2 were obtained. As is clear from FIG. 2, it is understood that the linear expansion coefficient of the filler-containing adhesive decreases as the amount of the filler increases. So 3
A filler containing adhesive (= adhesive 3b) was prepared by mixing 0% filler 4 into a polyamideimide resin, and this was applied (sticked) to the polyimide layer 3a. As shown in FIG. 1, the semiconductor element 1 and the lead frame 2 were bonded and fixed by the double-sided adhesive insulating tape 3 thus obtained, and a package was formed. Next, for this package, -40 ° C to 150 ° C.
A test was conducted in which 1,000 cycles of heat shock were applied at 1000C. As a result, no inconvenience such as a package crack occurred.

(Embodiment 2) As in Embodiment 1, the adhesive 3
In addition to mixing the filler into b, a quartz filler was also mixed into the polyimide layer 3a. When the relationship between the mixing amount of the quartz filler and the linear expansion coefficient of the filler-containing polyimide layer 3a was examined, the characteristics shown in FIG. 3 were obtained. As is clear from FIG. 3, when the filler is mixed in the polyimide layer 3 a, the linear expansion coefficient decreases as the mixing amount of the filler increases. Then, a polyimide layer 3a containing 20% filler was prepared, and the semiconductor element 1 and the lead frame 2 were bonded and fixed as shown in FIG. 3 to prepare a package. Put this package at -40 ° C to 150 ° C for 1.5
When a test for giving a heat shock of 00 cycles was performed, no inconvenience such as a package crack occurred.

The surface of the filler 4 is subjected to a chemical treatment such as a coupling treatment so that the polyimide layer 3
a or the adhesive 3b can be improved, and the peeling of the filler 4 can be prevented.

[0015]

As is clear from the above, according to the double-sided adhesive insulating tape for a semiconductor device of the present invention, at least one of the adhesive and the resin layer has a composition containing a quartz filler having a mixing ratio of 70% or more. Therefore, the coefficient of linear expansion of the semiconductor element of the double-sided adhesive insulating tape can be approximated, and even if a heat shock test or the like is performed after packaging, it is possible to prevent the package from being abnormal.

According to the lead frame of the present invention, the insulative adhesive for bonding and fixing the semiconductor element and the lead frame is mixed with at least one of the resin layer and the adhesive at a mixing ratio of 70%.
Since the structure including the above-mentioned quartz filler is used, the coefficient of linear expansion of the double-sided adhesive insulating tape can be made closer to the coefficient of linear expansion of the semiconductor element, and even if a heat shock test or the like is performed after the package, an abnormality occurs in the package. Nothing.

[Brief description of the drawings]

FIG. 1 is a front sectional view showing a semiconductor device using a double-sided adhesive insulating tape for a semiconductor device according to the present invention.

FIG. 2 is a characteristic diagram illustrating a relationship between a filler mixing amount and a linear expansion coefficient when a quartz filler is mixed into an adhesive.

FIG. 3 is a characteristic diagram showing a relationship between a filler mixing amount and a coefficient of linear expansion when a quartz filler is mixed into a polyimide layer.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor element 2 Lead frame 3 Double-sided adhesive insulating tape 3a Polyimide layer 3b Adhesive 4 Filler

Continued on the front page (51) Int.Cl. ⁶ Identification code Agency reference number FI Technical indication location C09J 7/02 JLE C09J 7/02 JLE H01L 23/50 H01L 23/50 K (72) Inventor Osamu Yoshioka Ibaraki 3550 Kida Yomachi, Tsuchiura-shi Hitachi Cable, Ltd. System Materials Research Laboratories (72) Inventor: Murakami Gen 3-1-1, Sukekawacho, Hitachi-shi, Ibaraki Hitachi Cable Co., Ltd.

Claims (4)

[Claims] 1. A double-sided adhesive tape which is formed by applying an adhesive to both surfaces of a resin layer and is adhered to a surface of a lead frame in a mounting area of a semiconductor element, wherein at least one of the adhesive or the resin layer is provided. Contains a quartz filler having a mixing ratio of 70% or more. 2. The double-sided adhesive insulating tape for a semiconductor device according to claim 1, wherein the surface of the quartz filler is subjected to a chemical treatment. 3. A lead frame in which an insulating adhesive for fixing the semiconductor element is adhered to a mounting area of the semiconductor element of the inner lead, wherein the insulating adhesive comprises an adhesive on both surfaces of a resin layer. A lead frame using a double-sided adhesive insulating tape, characterized by being coated and containing at least one of a resin layer and an adhesive containing a quartz filler having a mixing ratio of 70% or more. 4. A lead frame using a double-sided adhesive insulating tape according to claim 1, wherein said quartz filler has a surface subjected to a chemical treatment.