JPS6273720A - Plasma processor - Google Patents

Plasma processor

Info

Publication number
JPS6273720A
JPS6273720A JP21244385A JP21244385A JPS6273720A JP S6273720 A JPS6273720 A JP S6273720A JP 21244385 A JP21244385 A JP 21244385A JP 21244385 A JP21244385 A JP 21244385A JP S6273720 A JPS6273720 A JP S6273720A
Authority
JP
Japan
Prior art keywords
sample
discharge
sample electrode
silicon wafer
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP21244385A
Other languages
Japanese (ja)
Other versions
JPH0719770B2 (en
Inventor
Yoshifumi Ogawa
芳文 小川
Takeo Okada
岡田 建夫
Masaharu Saikai
西海 正治
Yoshinao Kawasaki
義直 川崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP60212443A priority Critical patent/JPH0719770B2/en
Publication of JPS6273720A publication Critical patent/JPS6273720A/en
Publication of JPH0719770B2 publication Critical patent/JPH0719770B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

PURPOSE:To uniformize a discharge by providing an insulator between a sample electrode and a sample. CONSTITUTION:When an alumina film 6a having 2mm or less of thickness is formed on a sample electrode 3, it can prevent a local discharge from occurring in case of etching with high frequency power of 3MHz or lower of frequency to eliminate the local degradation of a resist and the rise of an etching velocity. Further, a discharge can be uniformized by altering the thickness, and the etching velocity can be uniformized over the entire surface of a silicon wafer 1.

Description

【発明の詳細な説明】 〔分明の利用分野〕 本発明はプラズマ処理装置に係り、特に均一なプラズマ
処理蔭こ好適なプラズマ処理装置番こ関するものである
DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a plasma processing apparatus, and particularly to a plasma processing apparatus suitable for uniform plasma processing.

〔発明の背景〕[Background of the invention]

従来のプラズマ処理装置は、試料な戦況する試料電極を
導電性の物質(例えば、アルミニウム。
Conventional plasma processing equipment uses a sample electrode made of a conductive material (eg, aluminum).

ステンレス鋼、カーボン@)で構成し、試料電極の表面
に絶縁材をコーティングもしくは設置したものがある。
Some are made of stainless steel or carbon, and have an insulating material coated or placed on the surface of the sample electrode.

例えば特開昭58−213427号公報に記載のようj
こ、放電領域を石英ガラスなどの活性反応ガス中で安定
な材料で作ったカバーで覆うことによI)、ニー/$ン
グ試料に対する反応生成物による汚染を防き゛、効率の
良い工9チングを行うようにしたものがある。
For example, as described in Japanese Patent Application Laid-Open No. 58-213427,
By covering the discharge area with a cover made of a material that is stable in the active reaction gas, such as quartz glass, contamination of the kneeling/dolling sample by reaction products can be prevented and efficient processing can be achieved. There is something I decided to do.

また、例えば特公昭56−53853号公報に記載のよ
うに。、強制冷却した試料台と被加工物質との間に謂重
体膜を介在させ、ガスプラズマの電気伝導性を利用して
構成した直流回路を設け、試料台と被加工物質との間に
7■位差を付与して、被加工物質を誘導体膜を介して試
料台に・強固に吸着することを特徴とし、高周波グロー
放電を利用しり!’→イエプキングに36いて、被加工
物質と試料台との間の熱移動を促進し、さらに被加工物
質に微細パターンを転写するためのマスクとして用いら
rl、たレジストの温度上昇を防いで前記マスクの変形
や変質などの熱劣化を防止するようにしたものがある。
Also, for example, as described in Japanese Patent Publication No. 56-53853. , a so-called heavy film is interposed between the forcedly cooled sample stage and the material to be processed, and a DC circuit configured using the electrical conductivity of gas plasma is installed, and 7. It is characterized by applying a potential difference to firmly adsorb the processed material to the sample stage via the dielectric film, and uses high-frequency glow discharge! '→Epking 36 to promote heat transfer between the material to be processed and the sample stage, and to prevent the temperature rise of the resist used as a mask for transferring the fine pattern to the material to be processed. Some masks are designed to prevent thermal deterioration such as deformation and deterioration of the mask.

さらに、例えば特公昭55−9464号公報に記載のよ
うに、シリコン基板のシ11コンのエツチング速度と、
シリコン基板上の酸化シリコンのエツチング速度との速
度比を改善するため蕃こ、電極丘に試料を@ユする試料
台を設け、試料台の材質としてツー・素樹脂を用いて、
ブ→ズマエー/エングするものがある。
Furthermore, as described in Japanese Patent Publication No. 55-9464, for example, the etching speed of silicon on a silicon substrate,
In order to improve the etching speed of silicon oxide on the silicon substrate, a sample stage was installed on the electrode hill to hold the sample, and two base resins were used as the material of the sample stage.
Bu→Zumae/There is something to eng.

(7かし、7[Ifj部の放電を均一化して均一なプラ
ズマ処理を行なうため薯こ絶縁材を設けたものはない。
(7) However, there is no one in which an insulating material is provided in order to equalize the discharge in the Ifj section and perform uniform plasma processing.

〔発明の目的〕[Purpose of the invention]

未発明の目的は、放電を均一化して均一なエツチングま
たは成膜を得ることのできるプラズマ処理装置を提供す
ることにある。
An object of the invention is to provide a plasma processing apparatus that can uniformize discharge and obtain uniform etching or film formation.

〔発明の概要〕[Summary of the invention]

低い周波数、例丸ば3 MHz以下の周波数を用いるこ
とによって、従来から用いられている1356MF(、
zでのエツチングに比べて、工l千1ノートが上がるこ
とが知られている。しかしながら、3 Ml(z以下の
周波数ではJ6図に示すように、集中放電が生じるとい
う問題が生じた。
By using a low frequency, for example, a frequency below 3 MHz, the conventional 1356 MF (,
It is known that compared to etching with z, the increase in engineering is 1,111 notes. However, at frequencies below 3 Ml(z), a problem arose in that concentrated discharge occurred as shown in Figure J6.

そこで、第5図に示すプラズマ処理装置、この場合はエ
ツチング装置によって、シリコンウェハを材料として、
3■h以下の周波数域で高周波電力密度を増大させて放
電の状態を調べる実験を行った。1は試料この場合はシ
リコンウェハ、2は処理室、3は試料W!、4は試料オ
サエ、5は絶縁材、7は高周波電源、8は整合装置、9
は対向?lE極、10は流量制御弁、11はアースシー
ルド、しは排気口である。実験時の放1′:+件として
は、処理ガスをCHF、ガス100 SCCM、圧力を
05Torr、  電極間隔を59IIIIO,四周波
電源の周波数をI MHzとした。
Therefore, using a silicon wafer as a material, using a plasma processing apparatus shown in FIG. 5, in this case an etching apparatus,
An experiment was conducted to investigate the state of discharge by increasing the high frequency power density in the frequency range of 3 hours or less. 1 is the sample, in this case a silicon wafer, 2 is the processing chamber, and 3 is the sample W! , 4 is a sample surface, 5 is an insulating material, 7 is a high frequency power supply, 8 is a matching device, 9
Is it opposite? 1E is an electrode, 10 is a flow control valve, 11 is an earth shield, and 1 is an exhaust port. During the experiment, the gas was CHF, the gas was 100 SCCM, the pressure was 05 Torr, the electrode spacing was 59 IIIO, and the frequency of the four-frequency power source was I MHz.

高周波電力密度を2w/−以上に上昇させるとシリコン
ウェハ1の外周部の数ケ所に放電発光強度の大きい部分
が目視で確認されたaまた、表面を熱酸化させたシリコ
ンウェハでホトレジスト(OFPR−800)によ目バ
ターニングしたシリコンウェハ1を用いた場合も、餌記
間様シリコンウェハ1の外周部の数ケ?lliに放電発
光強度の大きい部分が目視さ几、スボlト的にレジスト
が変質すると共に、該変質部でのニーfエング速度が増
大しているのが確認できた。工づ壬ング速度の増大は他
の部分の約15倍に増大した。
When the high-frequency power density was increased to 2w/- or more, areas with high discharge emission intensity were visually confirmed at several locations on the outer periphery of the silicon wafer 1a.Also, a photoresist (OFPR- 800) Even when using a silicon wafer 1 that has been subjected to grain patterning, there are several defects on the outer periphery of the grain-like silicon wafer 1. It was visually observed that the portions where the discharge emission intensity was large were visually observed, and it was confirmed that the resist was deteriorated in a sub-volume manner, and that the knee f-engaging speed in the deteriorated portions was increased. The increase in processing speed was approximately 15 times greater than other parts.

熱酸化されたシリコンウェハの表面は、主にイオン効果
によってエツチングされることがら、該変質部ではイオ
ンの数が増大している、もしくはイオンがシリコンウェ
ハ1に入射する場合の加速エネルギーが増大しているも
のと考えらnろ。
Since the surface of a thermally oxidized silicon wafer is etched mainly by the ion effect, the number of ions increases in the altered area, or the acceleration energy when the ions are incident on the silicon wafer 1 increases. Don't think about it.

この放jJの不均一について調べた結果、該変質部では
シリコンウェハ1のそ几目(砧のそりおよび試料押え4
の凹凸により試料電極3との後納があることが判明した
。このことを確認するためノリコンウェハ1の中心の下
で試料電極3」−に2×2xo、stのアルミニウムの
小片を胃き、前記条件と同条件で放電させた。この結果
、放電の発光強度の大きい部分は、アルミニウムの小片
を置いたシリコンウェハの中心の表面と、111E極外
周に確認された。
As a result of investigating the non-uniformity of this radiation jJ, it was found that the roughness of the silicon wafer 1 (kinuta's warpage and sample holder 4)
It was found that the sample electrode 3 was later attached to the sample electrode 3 due to the unevenness of the sample electrode 3. In order to confirm this, a small piece of aluminum of 2x2xo, st was placed on the sample electrode 3'' under the center of the Noricon wafer 1, and a discharge was caused under the same conditions as above. As a result, parts with high emission intensity of discharge were confirmed on the center surface of the silicon wafer on which the small piece of aluminum was placed and on the extreme outer periphery of 111E.

このことから試料電極3上のシリコンウェハ1の搭載面
に絶縁材を設けること■こよ11、放電の不均一性を改
善できる知見を得た。また、SiH。
From this, it was found that providing an insulating material on the mounting surface of the silicon wafer 1 on the sample electrode 3 can improve the non-uniformity of discharge. Also, SiH.

(モノシラン)ガスを用いた放ifこおいても、CHF
3  ガスを用いた放電の場合と同様に放電の発光強度
が増大する部位かあC」、前記同様に絶縁物を設けるこ
とにより、放電の不均一性を改善できる見通しを得た。
(monosilane) gas, CHF
3. By providing an insulator in the same manner as described above in the region where the emission intensity of the discharge increases as in the case of discharge using a gas, the prospect of improving the non-uniformity of the discharge was obtained.

未発明は、処理ガスが導入され所定の圧力に減圧υF気
される処理室と、前記処理室内に設けらn試料を配置す
る試料電極と、n汀記処理室内に設けらn前記試14電
修1こ対向する対向11を極と、前記試料電極と前記対
向電極との間にかけられる高周波重力に3M1(z以下
の周波数の電力を用いる晶周波電源と、前記試料電極と
前記試料とが直接接触しないように前記試料電極と前記
試料との間の全面もしくは一部に設けた絶縁材とから成
ることを特徴とし、放電を均一化して均一なエツチング
または成膜を得ることができるようにしたものである。
What has not yet been invented is a processing chamber into which a processing gas is introduced and the pressure is reduced to a predetermined pressure υF, a sample electrode provided in the processing chamber for arranging the sample, and a sample electrode provided in the processing chamber described above. 3M1 (crystal frequency power source that uses power with a frequency of less than z, and the sample electrode and the sample are directly connected to each other) It is characterized by comprising an insulating material provided on the entire surface or part of the space between the sample electrode and the sample to prevent contact between the sample electrode and the sample, thereby making it possible to uniformize the discharge and obtain uniform etching or film formation. It is something.

〔発明の実施例〕[Embodiments of the invention]

以下、本発明の一実施例を第1図と男2図とにより説明
する。
Hereinafter, one embodiment of the present invention will be explained with reference to FIG. 1 and FIG. 2.

第1図は、第5図に示すプラズマ処理装置の試料電極3
上の詳細を示した図で、同一符号は同一部材を示し、本
図が第5図と異なる点は試料電極3を絶縁材6aで被っ
た点であ蚤)、シリコンウェハ1は試料[極3の絶縁材
6a、この場合アルミナ溶@(膜厚200μm)された
而に配置さ几る。
FIG. 1 shows the sample electrode 3 of the plasma processing apparatus shown in FIG.
In the figure showing the details above, the same reference numerals indicate the same members, and the difference between this figure and Fig. 5 is that the sample electrode 3 is covered with an insulating material 6a), and the silicon wafer 1 is the sample The insulating material 6a of No. 3, in this case, is placed over alumina melt (film thickness: 200 μm).

第1図のプラズマ処理装置によ1)、第5図のプラズマ
処理装置を使用した前記実験のときと同条件で放電状態
を調べてみると、高周波電力密度の最大の5W/cdに
おいても、放電集中は発生しなかった。また、高周波電
力密度を3W/cdとし、シリコンウェハを熱酸化しホ
トレジスト0FPR−SOO(東京応化工業社製品の製
品名)によりパターニングしたシリコンウェハ1を用い
た場合にも、レジストの変質やニーI千ング速度の部分
子R)な上昇は発生しなかった。
When we investigated the discharge state using the plasma processing apparatus shown in Fig. 1 under the same conditions as in the previous experiment using the plasma processing apparatus shown in Fig. 5, we found that even at the maximum high frequency power density of 5 W/cd, No discharge concentration occurred. In addition, even when using a silicon wafer 1 that has been thermally oxidized and patterned with photoresist 0FPR-SOO (product name of Tokyo Ohka Kogyo Co., Ltd.) at a high frequency power density of 3 W/cd, resist deterioration and knee I No increase in the rate of rotation occurred.

次に、絶縁(16Bのアルミナ膜の膜厚を0〜5皿の間
で変化させて、熱酸化したシリコンウェハ1の表面のエ
ツチング速度の変化を調べた結果を第2図に示す。処理
ガスはCHF、 、カス流量は100 SCCM 、面
周6%力蜜度は3W/d、高周波電力周波数はI MI
−b、 、圧力は0.5TorrF行。
Next, Fig. 2 shows the results of examining changes in the etching rate of the surface of the thermally oxidized silicon wafer 1 by changing the film thickness of the insulating (16B) alumina film between 0 and 5 plates. is CHF, , waste flow rate is 100 SCCM, surface circumference 6% power density is 3 W/d, high frequency power frequency is I MI
-b, , pressure is 0.5 TorrF line.

た。絶縁材6aはこの場合アルミナ溶射もしくはアルミ
ナ板とし、第2図に示されているように、膜厚を2ml
11にした場合、エツチング速度は絶縁材68を設けな
いときに比べて約80%に低下する。
Ta. In this case, the insulating material 6a is alumina sprayed or an alumina plate, and the film thickness is 2 ml as shown in FIG.
11, the etching rate is reduced to about 80% compared to when the insulating material 68 is not provided.

この値以下に低下した場合には、ある一定膜厚を処理す
る処理時間が増大し、単位時間当りの処理枚数の低下(
スループウドの低下)が無視できなくなる。したがって
、アルミナの膜厚は2印以Fが好適である。
If the value falls below this value, the processing time to process a certain film thickness will increase, and the number of sheets processed per unit time will decrease (
throughput) can no longer be ignored. Therefore, it is preferable that the alumina film thickness is 2 marks or more.

また、第2図が示すように、アルミナの1ハ厚によりエ
ツチング速度を増減できるため、シリコンウェハのエツ
チング速度のバラツキ(不均一性)を、アルミナの膜厚
調整で小さくすることが可能である。例えば、この場合
はシリコンウェハ1の中心部がエツチング速度最大とな
り、以下同心円状に低下する分布を示したので、アルミ
ナの膜厚をシリコンウェハ1の中心に合わせ厚くするこ
とによって、エツチング速度の均一性を図ることができ
た。この場合、アルミナの膜は、試料電極3の表面をフ
→ノドにしアルミナを凸形に盛り上げるか、もしくは試
料電極3の表面を凹形に加工しアルミナの表面をフライ
トにしても同効果がある。
Furthermore, as shown in Figure 2, the etching rate can be increased or decreased by adjusting the thickness of the alumina film, so it is possible to reduce the variation (non-uniformity) in the etching rate of silicon wafers by adjusting the alumina film thickness. . For example, in this case, the etching rate was maximum at the center of the silicon wafer 1, and the etching rate decreased concentrically thereafter, so by increasing the thickness of the alumina film at the center of the silicon wafer 1, the etching rate could be made uniform. I was able to figure out my sexuality. In this case, the same effect can be obtained by forming the alumina film by making the surface of the sample electrode 3 into a groove and raising the alumina in a convex shape, or by processing the surface of the sample electrode 3 into a concave shape and making the surface of the alumina into flights. .

以上、本−実施例によnば、試料電極3上に膜F72m
l11以下のアルミナ膜を設けること壷こよ11、周t
i、数3MIIz以下の高周波電力で工qチング処理し
た際に生じる局部放電を防く゛ことができ、局部的なレ
ジストの変質やエツチング速度の上昇をな々すことがで
きる。さらに、膜厚を変えること1こより放電を均一に
でき、エツチング速度をシリコンウェハ1の全面に渡っ
て均一化させることができる。また、シリコンウェハ1
に対して安全な放電を得ることができるので、そnとと
もにエツチング速度も均一になり、歩留りが向上、例え
ば、直径150■のシリコンウェハに対して、歩留りが
従来の60%から90チに向上し、生産性を上げること
ができる。また、レジストの変質をな(すことができる
ので、外観不良もな(すことができる。
As described above, according to this embodiment, the film F72m is placed on the sample electrode 3.
Provide an alumina film with a thickness of 11 or less.
It is possible to prevent local discharges that occur when etching is performed with high frequency power of several 3 MIIz or less, and to prevent local deterioration of the resist and increase in etching speed. Furthermore, by changing the film thickness, the discharge can be made uniform, and the etching rate can be made uniform over the entire surface of the silicon wafer 1. In addition, silicon wafer 1
As a result, the etching speed becomes uniform and the yield improves. For example, for silicon wafers with a diameter of 150 cm, the yield increases from 60% to 90 cm. and can increase productivity. Further, since it is possible to prevent deterioration of the resist, appearance defects can also be prevented.

次に、本発明の第2の実施例を第3図により説明する。Next, a second embodiment of the present invention will be described with reference to FIG.

本図において、?jS 1図と同符号は同一部材を示し
、第1図と異なる点は、夷1図の絶は材6aの中央部に
穴があき、シリコンウェハ1の周辺部のみ接するように
設けた絶縁材6bとなっていることである。このi!3
金は、シリコンウェハ1の周辺から20 mmの幅で絶
縁材を設けた。この場合の放電状態を01記−実施例と
同条件で放電状態を調べてみると、高周波電力密度の最
大の5w/dにおいても、放電集中は発生しなかった。
In this figure? jS The same reference numerals as in Fig. 1 indicate the same members, and the difference from Fig. 1 is that the insulation material 6a in Fig. 1 has a hole in the center and is provided so that it contacts only the peripheral part of the silicon wafer 1. 6b. This i! 3
A gold insulating material was provided in a width of 20 mm from the periphery of the silicon wafer 1. When the discharge state in this case was examined under the same conditions as in Section 01-Example, no discharge concentration occurred even at the maximum high frequency power density of 5 w/d.

水弟2の実施例壷こおいても前記一実施例同様、局部放
電を防く゛ことかでき、局部的なレジストの変質やエツ
チング速度の上昇をなくすことができるので、レジスト
の変質による外観不良をなくすことができ、また、エツ
チング速度も均一になり歩留りを向上させることができ
る。
Similar to the previous embodiment, in the case of the second embodiment, local discharge can be prevented, and local deterioration of the resist and increase in etching rate can be prevented, so that poor appearance due to resist deterioration can be avoided. In addition, the etching rate can be made uniform and the yield can be improved.

次に、本発明の第3の実施例を第4図により説明する。Next, a third embodiment of the present invention will be described with reference to FIG.

本図において、@1図と同符号は同一部材を示し、第1
図と異なる点は、第1図の絶縁材6aがシリコンウェハ
1の裏面全面に接触する範囲1こあるのに対し、絶縁材
6Cはシリコンウェハ1の裏面に部分的に接触するよう
に設けである点である。絶縁材6Cはこの場合、ドーナ
ツ状でシリコンウェハ1の外周部と内部との2ケ所に設
けてあり、シリコンウェハ1を支持する。
In this figure, the same symbols as in Figure @1 indicate the same members, and
The difference from the figure is that the insulating material 6a in FIG. That's a certain point. In this case, the insulating material 6C has a donut shape and is provided at two locations, one on the outer periphery and one on the inside of the silicon wafer 1, and supports the silicon wafer 1.

木■3の実施例によれば、前記第2の実施例と同じ効果
を得ることができるとともに、シリコンウェハ1の中央
部でのたわみを押えることができるという効果がある。
According to the embodiment of Part 3, it is possible to obtain the same effect as the second embodiment, and also to suppress the bending of the silicon wafer 1 at the center.

なお、絶縁材6Cは、この場合ドーナツ状であるが、形
状は任意に選べるものであり、また、取り付けも2個と
は限らず、2個以上であったり、星形にして1個として
も良い。
Note that the insulating material 6C is donut-shaped in this case, but the shape can be chosen arbitrarily, and the number of insulating materials 6C is not limited to two, but can be two or more, or even one in a star shape. good.

以上、こnらの実施例では絶縁材6aないし6Cとして
アルミナを用いて述べてきたが、アルεす以外にもBN
、  Sin、  SiN  およびポリテトラフルオ
ルエチレン等を用いても、アルミナ同様に均一な放電を
得ることができる。こ几ら絶縁材を試料電極3に被着す
る場合には、試料電極3との接着性7耐圧およびウェハ
の冷却効果を左右する熱電導度等を′8慮する必要があ
る。また、ウェハの冷却に当って、ヘリウムガス等を熱
媒体として用いて、ウェハ裏面の隙間に人几る場合には
、ヘリウムガス等が処理室内へ洩几ないように、絶縁材
取り付は時のシール構造を考慮する必要がある。
In the above embodiments, alumina has been used as the insulating materials 6a to 6C, but in addition to aluminum, BN may also be used.
, Sin, SiN, polytetrafluoroethylene, and the like, uniform discharge can be obtained in the same way as with alumina. When applying an insulating material to the sample electrode 3, it is necessary to take into consideration adhesion to the sample electrode 3, voltage resistance, thermal conductivity, etc. that affect the cooling effect of the wafer. In addition, if helium gas or the like is used as a heat medium to cool the wafer and people are crowded into the gap on the backside of the wafer, insulating material should be installed from time to time to prevent helium gas or other gas from leaking into the processing chamber. It is necessary to consider the seal structure.

また、木実旌例ではプラズマ処理装置として、エツチン
グ速度の場合について述べたが、成膜装置例えばCVD
装置に対しても、放電が一様になるので、試料への成膜
の膜質を均一にすることができるとともに、従来の膜厚
の違いにより生じる干渉色の違いによる外観不良を無く
すことができる。
In addition, in the case of Takeshi Kimitsu, the etching rate was discussed as a plasma processing apparatus, but film forming apparatuses such as CVD
Since the discharge is uniform for the equipment, the quality of the film deposited on the sample can be made uniform, and the appearance defects caused by differences in interference colors caused by conventional differences in film thickness can be eliminated. .

〔発明の効果〕〔Effect of the invention〕

本賢明によnば、試料1’lE極と試料との間蕃こ絶縁
材を設けることによ。て、試料電極と対向N極との間の
放電を均一化でき、均一なエツチングまたは成膜を得る
プラズマ処理が行えるという効果がある。
According to the present invention, an insulating material is provided between the sample 1'1E electrode and the sample. This has the effect that the discharge between the sample electrode and the opposing north pole can be made uniform, and plasma processing can be performed to obtain uniform etching or film formation.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本賢明の一実施例であるプラズマ処理ti1を
示す断面図、第2図は謂1図により行なった実験結果を
示すグラフ、第3閃は本賢明の第2の実施例であるプラ
ズマ処理装置を示す断面図、第4図は本発明の?A3の
実施例で4hるプラズマ処理装置を示す断面図、第5図
は従来例であるプラズマ処理装置を示す断面図、第6図
は第5図により行なった実験結果を示すグラフである。 1・・・・・ソリコンウェハ、2・・・・・・m理x、
3・・・・・・試料電極、6aないし6C・・・・絶縁
材、9・・・・・対イ20 AhOayI婢(蔗悄) 牙3図 づ ′44図 1司り久払
Figure 1 is a cross-sectional view showing plasma treatment ti1, which is an embodiment of this invention, Figure 2 is a graph showing the results of the experiment conducted according to Figure 1, and the third flash is a second example of this invention. FIG. 4, a sectional view showing a plasma processing apparatus, is a cross-sectional view of the plasma processing apparatus according to the present invention. FIG. 5 is a sectional view showing a plasma processing apparatus according to the A3 embodiment for 4 hours, FIG. 5 is a sectional view showing a conventional plasma processing apparatus, and FIG. 6 is a graph showing the results of an experiment conducted using FIG. 1...Solicon wafer, 2...m-processing x,
3...Sample electrode, 6a to 6C...Insulating material, 9...20 AhOayI (蔗悄)

Claims (1)

【特許請求の範囲】 1、処理ガスが導入され所定の圧力に減圧排気される処
理室と、前記処理室内に設けられ試料を配置する試料電
極と、前記処理室内に設けられ前記試料電極に対向する
対向電極と、前記試料電極と前記対向電極との間にかけ
られる高周波電力に3MHz以下の周波数の電力を用い
る高周波電源と、前記試料電極と前記試料とが直接接触
しないように前記試料電極と前記試料との間の全面もし
くは一部に設けた絶縁材とから成ることを特徴とするプ
ラズマ処理装置。 2、前記絶縁材をアルミナとして、前記試料電極に被着
した特許請求の範囲第1項記載のプラズマ処理装置。
[Scope of Claims] 1. A processing chamber into which a processing gas is introduced and evacuated to a predetermined pressure, a sample electrode provided within the processing chamber and on which a sample is placed, and a sample electrode provided within the processing chamber and opposed to the sample electrode. a high-frequency power supply that uses power with a frequency of 3 MHz or less as a high-frequency power applied between the sample electrode and the counter electrode; A plasma processing apparatus characterized by comprising an insulating material provided on the entire surface or a part of the space between the plasma processing apparatus and the sample. 2. The plasma processing apparatus according to claim 1, wherein the insulating material is alumina and is adhered to the sample electrode.
JP60212443A 1985-09-27 1985-09-27 Plasma processing device Expired - Lifetime JPH0719770B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60212443A JPH0719770B2 (en) 1985-09-27 1985-09-27 Plasma processing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60212443A JPH0719770B2 (en) 1985-09-27 1985-09-27 Plasma processing device

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP6184353A Division JP2502271B2 (en) 1994-08-05 1994-08-05 Plasma processing device

Publications (2)

Publication Number Publication Date
JPS6273720A true JPS6273720A (en) 1987-04-04
JPH0719770B2 JPH0719770B2 (en) 1995-03-06

Family

ID=16622695

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60212443A Expired - Lifetime JPH0719770B2 (en) 1985-09-27 1985-09-27 Plasma processing device

Country Status (1)

Country Link
JP (1) JPH0719770B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01137633A (en) * 1987-11-25 1989-05-30 Hitachi Ltd Magnetically enhanced etching equipment
JPH0411726A (en) * 1990-04-28 1992-01-16 Mitsubishi Electric Corp High-frequency discharge utilizing device and manufacture of semiconductor by using same device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5653853A (en) * 1979-10-05 1981-05-13 Hitachi Ltd Production of sheet and its apparatus
JPS599173A (en) * 1982-07-06 1984-01-18 ザ・パ−キン−エルマ−・コ−ポレイシヨン Method and apparatus for controllable etching of material
JPS59186325A (en) * 1983-04-01 1984-10-23 コンパニ−・アンデユストリエル・デ・テレコミユニカシオン・セイテ−アルカテル Dry etching device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5653853A (en) * 1979-10-05 1981-05-13 Hitachi Ltd Production of sheet and its apparatus
JPS599173A (en) * 1982-07-06 1984-01-18 ザ・パ−キン−エルマ−・コ−ポレイシヨン Method and apparatus for controllable etching of material
JPS59186325A (en) * 1983-04-01 1984-10-23 コンパニ−・アンデユストリエル・デ・テレコミユニカシオン・セイテ−アルカテル Dry etching device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01137633A (en) * 1987-11-25 1989-05-30 Hitachi Ltd Magnetically enhanced etching equipment
JPH0411726A (en) * 1990-04-28 1992-01-16 Mitsubishi Electric Corp High-frequency discharge utilizing device and manufacture of semiconductor by using same device

Also Published As

Publication number Publication date
JPH0719770B2 (en) 1995-03-06

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