JPH0719770B2 - Plasma processing device - Google Patents

Plasma processing device

Info

Publication number
JPH0719770B2
JPH0719770B2 JP60212443A JP21244385A JPH0719770B2 JP H0719770 B2 JPH0719770 B2 JP H0719770B2 JP 60212443 A JP60212443 A JP 60212443A JP 21244385 A JP21244385 A JP 21244385A JP H0719770 B2 JPH0719770 B2 JP H0719770B2
Authority
JP
Japan
Prior art keywords
sample
electrode
discharge
silicon wafer
plasma processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP60212443A
Other languages
Japanese (ja)
Other versions
JPS6273720A (en
Inventor
芳文 小川
建夫 岡田
正治 西海
義直 川崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP60212443A priority Critical patent/JPH0719770B2/en
Publication of JPS6273720A publication Critical patent/JPS6273720A/en
Publication of JPH0719770B2 publication Critical patent/JPH0719770B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Drying Of Semiconductors (AREA)

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明はプラズマ処理装置に係り、特に均一なプラズマ
処理に好適なプラズマ処理装置に関するものである。
Description: FIELD OF THE INVENTION The present invention relates to a plasma processing apparatus, and more particularly to a plasma processing apparatus suitable for uniform plasma processing.

〔発明の背景〕[Background of the Invention]

従来のプラズマ処理装置は、試料を載置する試料電極を
導電性の物質(例えば、アルミニウム,ステンレス鋼,
カーボン等)で構成し、試料電極の表面に絶縁材をコー
ティングもしくは設置したものがある。
In the conventional plasma processing apparatus, the sample electrode on which the sample is placed is made of a conductive material (for example, aluminum, stainless steel,
(Eg carbon), the surface of the sample electrode is coated or installed with an insulating material.

例えば特開昭58-213427号公報に記載のように、放電領
域を石英ガラスなどの活性反応ガス中で安定な材料で作
ったカバーで覆うことにより、エッチング試料に対する
反応生成物による汚染を防ぎ、効率の良いエッチングを
行うようにしたものがある。
For example, as described in JP-A-58-213427, by covering the discharge region with a cover made of a material stable in an active reaction gas such as quartz glass, the contamination of the etching sample with reaction products is prevented, There are some which are designed to perform efficient etching.

また、例えば特公昭56-53853号公報に記載のように、強
制冷却した試料台と被加工物質との間に誘電体膜を介在
させ、ガスプラズマの電気伝導性を利用して構成した直
流回路を設け、試料台と被加工物質との間に電位差を付
与して、被加工物質を誘導体膜を介して試料台に強固に
吸着することを特徴とし、高周波グロー放電を利用した
ドライエッチングにおいて、被加工物質と試料台との間
の熱移動を促進し、さらに被加工物質に微細パターンを
転写するためのマスクとして用いられたレジストの温度
上昇を防いで前記マスクの変形や変質などの熱劣化を防
止するようにしたものがある。
Further, as described in, for example, Japanese Patent Publication No. 56-53853, a DC circuit is formed by utilizing the electric conductivity of gas plasma by interposing a dielectric film between the sample stage that is forcibly cooled and the material to be processed. Is provided, by applying a potential difference between the sample stage and the substance to be processed, the substance to be processed is strongly adsorbed to the sample stage via the derivative film, and in dry etching using high-frequency glow discharge, It promotes heat transfer between the material to be processed and the sample stage, and further prevents the temperature rise of the resist used as a mask for transferring a fine pattern to the material to be processed, thereby causing thermal deterioration such as deformation or deterioration of the mask. There are things that prevent it.

さらに、例えば特公昭55-9464号公報に記載のように、
シリコン基板のシリコンのエッチング速度と、シリコン
基板上の酸化シリコンのエッチング速度との速度比を改
善するために、電極上に試料を載置する試料台を設け、
試料台の材質としてフッ素樹脂を用いて、プラズマエッ
チングするものがある。
Further, for example, as described in Japanese Patent Publication No. 55-9464,
In order to improve the speed ratio between the etching rate of silicon on a silicon substrate and the etching rate of silicon oxide on a silicon substrate, a sample table for mounting a sample on an electrode is provided,
There is one in which a fluorine resin is used as the material of the sample table and plasma etching is performed.

しかし、電極部の放電を均一化して均一なプラズマ処理
を行なうために絶縁材を設けたものはない。
However, there is no one provided with an insulating material in order to make the discharge of the electrode portion uniform and perform a uniform plasma treatment.

〔発明の目的〕[Object of the Invention]

本発明の目的は、放電を均一化して均一なエッチングま
たは成膜を得ることのできるプラズマ処理装置を提供す
ることにある。
An object of the present invention is to provide a plasma processing apparatus capable of uniformizing discharge and obtaining uniform etching or film formation.

〔発明の概要〕[Outline of Invention]

低い周波数、例えば3MHz以下の周波数を用いることによ
って、従来から用いられている13.56MHzでのエッチング
に比べて、エッチレートが上がることが知られている。
しかしながら、3MHz以下の周波数では第6図に示すよう
に、集中放電が生じるという問題が生じた。
It is known that by using a low frequency, for example, a frequency of 3 MHz or less, the etching rate is increased as compared to the conventionally used etching at 13.56 MHz.
However, at a frequency of 3 MHz or less, a problem that concentrated discharge occurs as shown in FIG.

そこで、第5図に示すプラズマ処理装置、この場合はエ
ッチング装置によって、シリコンウエハを材料として、
3MHz以下の周波数域で高周波電力密度を増大させて放電
の状態を調べる実験を行った。1は試料この場合はシリ
コンウエハ、2は処理室、3は試料電極、4は試料オサ
エ、5は絶縁材、7は高周波電源、8は整合装置、9は
対向電極、10は流量制御弁、11はアースシールド、12は
排気口である。実験時の放電条件としては、処理ガスを
CHF3ガス100SCCM,圧力を0.5Torr,電極間隔を50mm,高周
波電源の周波数を1MHzとした。
Therefore, by using a plasma processing apparatus shown in FIG. 5, in this case, an etching apparatus, using a silicon wafer as a material,
An experiment was conducted to investigate the state of discharge by increasing the high frequency power density in the frequency range of 3 MHz or less. In this case, 1 is a sample, a silicon wafer, 2 is a processing chamber, 3 is a sample electrode, 4 is a sample material, 5 is an insulating material, 7 is a high frequency power source, 8 is a matching device, 9 is a counter electrode, 10 is a flow control valve, 11 is an earth shield and 12 is an exhaust port. As the discharge conditions during the experiment, the processing gas was
CHF 3 gas was 100 SCCM, the pressure was 0.5 Torr, the electrode interval was 50 mm, and the frequency of the high frequency power supply was 1 MHz.

高周波電力密度を2w/cm2以上に上昇させるとシリコンウ
エハ1の外周部の数ケ所に放電発光強度の大きい部分が
目視で確認された。また、表面を熱酸化させたシリコン
ウエハでホトレジスト(OFPR-800)によりパターニング
したシリコンウエハ1を用いた場合も、前記同様シリコ
ンウエハ1の外周部の数ケ所に放電発光強度の大きい部
分が目視され、スポット的にレジストが変質すると共
に、該変質部でのエッチング速度が増大しているのが確
認できた。エッチング速度の増大は他の部分の約1.5倍
に増大した。
When the high frequency power density was increased to 2 w / cm 2 or more, several parts of the outer peripheral portion of the silicon wafer 1 with large discharge emission intensity were visually confirmed. Also, when a silicon wafer 1 whose surface is thermally oxidized and patterned by a photoresist (OFPR-800) is used, a portion having a high discharge emission intensity is visually observed at several places on the outer peripheral portion of the silicon wafer 1 as described above. It was confirmed that the resist was altered in spots and the etching rate in the altered portion was increased. The increase in etching rate was about 1.5 times that of the other parts.

熱酸化されたシリコンウエハの表面は、主にイオン効果
によってエッチングされることから、該変質部ではイオ
ンの数が増大している、もしくはイオンがシリコンウエ
ハ1に入射する場合の加速エネルギーが増大しているも
のと考えられる。
Since the surface of the thermally oxidized silicon wafer is mainly etched by the ion effect, the number of ions is increased in the altered portion, or the acceleration energy when the ions are incident on the silicon wafer 1 is increased. It is considered that

この放電の不均一について調べた結果、該変質部ではシ
リコンウエハ1のそれ自体のそりおよび試料押え4の凹
凸により試料電極3との接触があることが判明した。こ
のことを確認するためシリコンウエハ1の中心の下で試
料電極3上に2×2×0.5tのアルミニウムの小片を置
き、前記条件と同条件で放電させた。この結果、放電の
発光強度の大きい部分は、アルミニウムの小片を置いた
シリコンウエハの中心の表面と、電極外周に確認され
た。
As a result of investigating the nonuniformity of this discharge, it was found that there was contact with the sample electrode 3 in the altered portion due to the warp of the silicon wafer 1 itself and the unevenness of the sample holder 4. In order to confirm this, a small piece of 2 × 2 × 0.5t aluminum was placed on the sample electrode 3 under the center of the silicon wafer 1 and discharged under the same conditions as described above. As a result, a portion where the emission intensity of the discharge was high was confirmed on the surface of the center of the silicon wafer on which the small piece of aluminum was placed and on the outer circumference of the electrode.

このことから試料電極3上のシリコンウエハ1の搭載面
に絶縁材を設けることにより、放電の不均一性を改善で
きる知見を得た。また、SiH4(モノシラン)ガスを用い
た放電においても、CHF3ガスを用いた放電の場合と同様
に放電の発光強度が増大する部位があり、前記同様に絶
縁物を設けることにより、放電の不均一性を改善できる
見通しを得た。
From this, it was found that the nonuniformity of discharge can be improved by providing an insulating material on the mounting surface of the silicon wafer 1 on the sample electrode 3. Further, even in the discharge using SiH 4 (monosilane) gas, there is a portion where the emission intensity of the discharge is increased as in the case of the discharge using CHF 3 gas. We got the prospect that the non-uniformity could be improved.

本発明は、処理ガスが導入され所定の圧力に減圧排気さ
れる処理室と、前記処理室内に設けられ試料を配置する
試料電極と、前記処理室内に設けられ前記試料電極に対
向する対向電極と、前記試料電極と前記対向電極との間
にかけられる高周波電力に2w/cm2以上の密度で3MHZ以下
の周波数の電力を用いる高周波電源と、前記試料電極と
前記試料とが直接接触しないように前記試料電極表面上
に設けた絶縁膜とから成り、該絶縁膜の膜厚を2mm以下
とし、かつ該膜厚を前記試料の中心部分に対応する位置
で最も厚く周辺部で薄くなるように変化させたものであ
る。
The present invention provides a processing chamber in which a processing gas is introduced and decompressed and exhausted to a predetermined pressure, a sample electrode provided in the processing chamber for placing a sample, and a counter electrode provided in the processing chamber and facing the sample electrode. The high frequency power applied between the sample electrode and the counter electrode is a high frequency power source that uses power of a frequency of 3 MHz or less at a density of 2 w / cm 2 or more, and the sample electrode and the sample are prevented from directly contacting each other. It is composed of an insulating film provided on the surface of the sample electrode, the thickness of the insulating film is 2 mm or less, and the film thickness is changed so that it is thickest at the position corresponding to the central portion of the sample and thinnest at the peripheral portion. It is a thing.

〔発明の実施例〕Example of Invention

以下、本発明の一実施例を第1図と第2図とにより説明
する。
An embodiment of the present invention will be described below with reference to FIGS. 1 and 2.

第1図は、第5図に示すプラズマ処理装置の試料電極3
部の詳細を示した図で、同一符号は同一部材を示し、本
図が第5図と異なる点は試料電極3を絶縁材6aで被った
点であり、シリコンウエハ1は試料電極3の絶縁材6a、
この場合アルミナ溶射(膜厚200μm)された面に配置
される。
FIG. 1 shows the sample electrode 3 of the plasma processing apparatus shown in FIG.
In the figure showing the details of the parts, the same reference numerals indicate the same members, and the difference between this figure and FIG. 5 is that the sample electrode 3 is covered with the insulating material 6a. Material 6a,
In this case, it is placed on the surface sprayed with alumina (film thickness 200 μm).

第1図のプラズマ処理装置により、第5図のプラズマ処
理装置を使用した前記実験のときと同条件で放電状態を
調べてみると、高周波電力密度の最大の5w/cm2において
も、放電集中は発生しなかった。また、高周波電力密度
を3w/cm2とし、シリコンウエハを熱酸化しホトレジスト
OFPR-800(東京応化工業社製品の製品名)によりパター
ニングしたシリコンウエハ1を用いた場合にも、レジス
トの変質やエッチング速度の部分的な上昇は発生しなか
った。
When the discharge state was examined under the same conditions as in the experiment using the plasma processing apparatus shown in FIG. 5 with the plasma processing apparatus shown in FIG. 1, the discharge was concentrated even at the maximum high frequency power density of 5 w / cm 2 . Did not occur. In addition, the high frequency power density was set to 3w / cm 2 and the silicon wafer was thermally oxidized to the photoresist.
Even when the silicon wafer 1 patterned by OFPR-800 (product name of Tokyo Ohka Kogyo Co., Ltd.) was used, neither alteration of the resist nor partial increase in etching rate occurred.

次に、絶縁材6aのアルミナ膜の膜厚を0〜5mmの間で変
化させて、熱酸化したシリコンウエハ1の表面のエッチ
ング速度の変化を調べた結果を第2図に示す。処理ガス
はCHF3,ガス流量は100SCCM,高周波電力密度は3w/cm2
高周波電力周波数は1MHz,圧力は0.5Torrで行った。絶縁
材6aはこの場合アルミナ溶射もしくはアルミナ板とし、
第2図に示されているように、膜厚を2mmにした場合、
エッチング速度は絶縁材6aを設けないときに比べて約80
%に低下する。この値以下に低下した場合には、ある一
定膜厚を処理する処理時間が増大し、単位時間当りの処
理枚数の低下(スループットの低下)が無視できなくな
る。したがって、アルミナの膜厚は2mm以下が好適であ
る。
Next, FIG. 2 shows the results of examining the change in the etching rate of the surface of the thermally oxidized silicon wafer 1 by changing the film thickness of the alumina film of the insulating material 6a between 0 and 5 mm. The processing gas is CHF 3 , the gas flow rate is 100 SCCM, the high frequency power density is 3 w / cm 2 ,
The high frequency power frequency was 1 MHz and the pressure was 0.5 Torr. Insulating material 6a is alumina sprayed or alumina plate in this case,
As shown in Fig. 2, when the film thickness is 2 mm,
The etching rate is about 80 compared to when the insulating material 6a is not provided.
%. When the value is decreased below this value, the processing time for processing a certain film thickness increases, and the decrease in the number of processed films per unit time (the decrease in throughput) cannot be ignored. Therefore, the thickness of alumina is preferably 2 mm or less.

また、第2図が示すように、アルミナの膜厚によりエッ
チング速度を増減できるため、シリコンウエハのエッチ
ング速度のバラツキ(不均一性)を、アルミナの膜厚調
整で小さくすることが可能である。例えば、この場合は
シリコンウエハ1の中心部がエッチング速度最大とな
り、以下同心円状に低下する分布を示したので、アルミ
ナの膜厚をシリコンウエハ1の中心に合わせ厚くするこ
とによって、エッチング速度の均一性を図ることができ
た。この場合、アルミナの膜は、試料電極3の表面をフ
ラットにしアルミナを凸形に盛り上げるか、もしくは試
料電極3の表面を凹形に加工しアルミナの表面をフラッ
トにしても同効果がある。
Further, as shown in FIG. 2, since the etching rate can be increased or decreased depending on the film thickness of alumina, it is possible to reduce the variation (nonuniformity) in the etching rate of the silicon wafer by adjusting the film thickness of alumina. For example, in this case, the central portion of the silicon wafer 1 has the maximum etching rate, and the following distribution shows a concentric decrease. Therefore, by increasing the thickness of the alumina film to the center of the silicon wafer 1, the etching rate becomes uniform. I was able to improve my sex. In this case, the alumina film has the same effect when the surface of the sample electrode 3 is flattened and the alumina is raised in a convex shape, or when the surface of the sample electrode 3 is processed into a concave shape and the surface of the alumina is flattened.

以上、本一実施例によれば、試料電極3上に膜厚2mm以
下のアルミナ膜を設けることにより、周波数3MHz以下の
高周波電力でエッチング処理した際に生じる局部放電を
防ぐことができ、局部的なレジストの変質やエッチング
速度の上昇をなくすことができる。さらに、膜厚を変え
ることにより放電を均一にでき、エッチング速度をシリ
コンウエハ1の全面に渡って均一化させることができ
る。また、シリコンウエハ1に対して安全な放電を得る
ことができるので、それとともにエッチング速度も均一
になり、歩留りが向上、例えば、直径150mmのシリコン
ウエハに対して、歩留りが従来の60%から90%に向上
し、生産性を上げることができる。また、レジストの変
質をなくすことができるので、外観不良もなくすことが
できる。
As described above, according to the present embodiment, by providing the alumina film having the film thickness of 2 mm or less on the sample electrode 3, it is possible to prevent the local discharge that occurs when the etching process is performed by the high frequency power having the frequency of 3 MHz or less, and the local discharge can be prevented. It is possible to prevent deterioration of the resist and increase of etching rate. Further, the discharge can be made uniform by changing the film thickness, and the etching rate can be made uniform over the entire surface of the silicon wafer 1. In addition, since a safe discharge can be obtained for the silicon wafer 1, the etching rate becomes uniform, and the yield is improved. For example, for a silicon wafer having a diameter of 150 mm, the yield is 60% to 90% of that of the conventional wafer. %, And productivity can be increased. In addition, since the quality of the resist can be eliminated, the appearance defect can be eliminated.

次に、本発明の第2の実施例を第3図により説明する。
本図において、第1図と同符号は同一部材を示し、第1
図と異なる点は、第1図の絶縁材6aの中央部に穴があ
き、シリコンウエハ1の周辺部のみ接するように設けた
絶縁材6bとなっていることである。この場合は、シリコ
ンウエハ1の周辺から20mmの幅で絶縁材を設けた。この
場合の放電状態を前記一実施例と同条件で放電状態を調
べてみると、高周波電力密度の最大の5w/cm2において
も、放電集中は発生しなかった。
Next, a second embodiment of the present invention will be described with reference to FIG.
In this figure, the same symbols as in FIG.
The difference from the figure is that there is a hole in the center of the insulating material 6a in FIG. 1 and the insulating material 6b is provided so as to contact only the peripheral portion of the silicon wafer 1. In this case, the insulating material was provided with a width of 20 mm from the periphery of the silicon wafer 1. When the discharge state in this case was examined under the same conditions as in the above-mentioned one example, discharge concentration did not occur even at the maximum high frequency power density of 5 w / cm 2 .

本第2の実施例においても前記一実施例同様、局部放電
を防ぐことができ、局部的なレジストの変質やエッチン
グ速度の上昇をなくすことができるので、レジストの変
質による外観不良をなくすことができ、また、エッチン
グ速度も均一になり歩留りを向上させることができる。
In the second embodiment, as in the case of the first embodiment, local discharge can be prevented, and local deterioration of the resist and increase in etching rate can be eliminated, so that the appearance defect due to the deterioration of the resist can be eliminated. In addition, the etching rate becomes uniform and the yield can be improved.

次に、本発明の第3の実施例を第4図により説明する。
本図において、第1図と同符号は同一部材を示し、第1
図と異なる点は、第1図の絶縁材6aがシリコンウエハ1
の裏面全面に接触する範囲にあるのに対し、絶縁材6cは
シリコンウエハ1の裏面に部分的に接触するように設け
てある点である。絶縁材6cはこの場合、ドーナツ状でシ
リコンウエハ1の外周部の内部との2ケ所に設けてあ
り、シリコンウエハ1を支持する。
Next, a third embodiment of the present invention will be described with reference to FIG.
In this figure, the same symbols as in FIG.
The difference from the figure is that the insulating material 6a in FIG.
The insulating material 6c is provided so as to be in partial contact with the back surface of the silicon wafer 1, while the insulating material 6c is provided in a range where the insulating material 6c is in contact with the entire back surface. In this case, the insulating material 6c has a donut shape and is provided at two locations inside and outside the silicon wafer 1 and supports the silicon wafer 1.

本第3の実施例によれば、前記第2の実施例と同じ効果
を得ることができるとともに、シリコンウエハ1の中央
部でのたわみを押えることができるという効果がある。
According to the third embodiment, the same effect as that of the second embodiment can be obtained, and the deflection at the central portion of the silicon wafer 1 can be suppressed.

なお、絶縁材6cは、この場合ドーナツ状であるが、形状
は任意に選べるものであり、また、取り付けも2個とは
限らず、2個以上であったり、星型にして1個としても
良い。
The insulating material 6c has a donut shape in this case, but the shape can be arbitrarily selected, and the number of attachments is not limited to two, and two or more or a star-shaped one may be provided. good.

以上、これらの実施例では絶縁材6aないし6cとしてアル
ミナを用いて述べてきたが、アルミナ以外にもBN,SiO,S
iNおよびポリテトラフルオルエチレン等を用いても、ア
ルミナ同様に均一な放電を得ることができる。これら絶
縁材を試料電極3に被着する場合には、試料電極3との
接着性,耐圧およびウエハの冷却効果を左右する熱電導
度等を考慮する必要がある。また、ウエハの冷却に当っ
て、ヘリウムガス等を熱媒体として用いて、ウエハ裏面
の隙間に入れる場合には、ヘリウムガス等が処理室内へ
洩れないように、絶縁材取り付け時のシール構造を考慮
する必要がある。
As described above, although alumina is used as the insulating materials 6a to 6c in these examples, BN, SiO, S may be used in addition to alumina.
Even if iN and polytetrafluoroethylene are used, a uniform discharge can be obtained similarly to alumina. When these insulating materials are applied to the sample electrode 3, it is necessary to consider the adhesiveness with the sample electrode 3, the pressure resistance, and the thermoelectric conductivity which influences the wafer cooling effect. In addition, when cooling the wafer, when using helium gas, etc. as a heat medium and putting it in the gap on the back surface of the wafer, consider the sealing structure when attaching the insulating material so that helium gas etc. does not leak into the processing chamber. There is a need to.

また、本実施例ではプラズマ処理装置として、エッチン
グ装置の場合について述べたが、成膜装置例えばCVD装
置に対しても、放電が一様になるので、試料への成膜の
膜質を均一にすることができるとともに、従来の膜厚の
違いにより生じる干渉色の違いによる外観不良を無くす
ことができる。
Further, in the present embodiment, the case of the etching apparatus was described as the plasma processing apparatus, but the discharge becomes uniform even in the film forming apparatus such as the CVD apparatus, so that the film quality of the film formation on the sample is made uniform. In addition, it is possible to eliminate the appearance defect due to the difference in interference color caused by the difference in film thickness in the related art.

〔発明の効果〕〔The invention's effect〕

本発明によれば、試料電極の表面に、厚さが2mm以下で
かつこの厚みが試料の処理速度の大きい位置で最も厚く
処理速度の小さい位置で薄い絶縁膜を設けることによっ
て、試料電極と対向電極との間の放電を均一化でき、均
一なエッチングまたは成膜を得るプラズマ処理が行える
という効果がある。
According to the present invention, by providing a thin insulating film on the surface of the sample electrode at a position where the thickness is 2 mm or less and this thickness is the largest at the position where the processing speed of the sample is large and the position where the processing speed is small, the sample electrode is opposed to the sample electrode. There is an effect that discharge between the electrodes can be made uniform, and plasma processing for obtaining uniform etching or film formation can be performed.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の一実施例であるプラズマ処理装置を示
す断面図、第2図は第1図により行なった実験結果を示
すグラフ、第3図は本発明の第2の実施例であるプラズ
マ処理装置を示す断面図、第4図は本発明の第3の実施
例であるプラズマ処理装置を示す断面図、第5図は従来
例であるプラズマ処理装置を示す断面図、第6図は第5
図により行なった実験結果を示すグラフである。 1……シリコンウエハ、2……処理室、3……試料電
極、6aないし6c……絶縁材、9……対向電極
FIG. 1 is a cross-sectional view showing a plasma processing apparatus which is an embodiment of the present invention, FIG. 2 is a graph showing the results of experiments conducted in FIG. 1, and FIG. 3 is a second embodiment of the present invention. FIG. 4 is a sectional view showing a plasma processing apparatus, FIG. 4 is a sectional view showing a plasma processing apparatus which is a third embodiment of the present invention, FIG. 5 is a sectional view showing a plasma processing apparatus which is a conventional example, and FIG. Fifth
It is a graph which shows the experimental result performed by the figure. 1 ... Silicon wafer, 2 ... Processing chamber, 3 ... Sample electrode, 6a to 6c ... Insulating material, 9 ... Counter electrode

フロントページの続き (72)発明者 川崎 義直 山口県下松市大字東豊井794番地 株式会 社日立製作所笠戸工場内 (56)参考文献 特開 昭59−9173(JP,A) 特開 昭59−186325(JP,A) 特公 昭56−53853(JP,B2)Continuation of the front page (72) Yoshinao Kawasaki Inventor Yoshinao Higashitoyoi 794, Higashi-Toyoi, Yamaguchi Prefecture Inside the Kasado Plant, Hitachi Ltd. (56) References JP 59-9173 (JP, A) JP 59- 186325 (JP, A) Japanese Patent Publication Sho 56-53853 (JP, B2)

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】処理ガスが導入され所定の圧力に減圧排気
される処理室と、前記処理室内に設けられ試料を配置す
る試料電極と、前記処理室内に設けられ前記試料電極に
対向する対向電極と、前記試料電極と前記対向電極との
間にかけられる高周波電力に2w/cm2以上の密度で3MHZ以
下の周波数の電力を用いる高周波電源と、前記試料電極
と前記試料とが直接接触しないように前記試料電極表面
上に設けた絶縁膜とから成り、該絶縁膜の膜厚を2mm以
下とし、かつ該膜厚を前記試料の中心部分に対応する位
置で最も厚く周辺部で薄くなるように変化させたことを
特徴とするプラズマ処理装置。
1. A processing chamber in which a processing gas is introduced and is evacuated to a predetermined pressure, a sample electrode for arranging a sample in the processing chamber, and a counter electrode provided in the processing chamber and facing the sample electrode. A high-frequency power source that uses power of a frequency of 3 MHz or less at a density of 2 w / cm 2 or more for the high-frequency power applied between the sample electrode and the counter electrode, so that the sample electrode and the sample do not come into direct contact with each other. It is composed of an insulating film provided on the surface of the sample electrode, and the film thickness of the insulating film is 2 mm or less, and the film thickness is changed so that it is thickest at the position corresponding to the central part of the sample and thinnest at the peripheral part. A plasma processing apparatus characterized by the above.
JP60212443A 1985-09-27 1985-09-27 Plasma processing device Expired - Lifetime JPH0719770B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60212443A JPH0719770B2 (en) 1985-09-27 1985-09-27 Plasma processing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60212443A JPH0719770B2 (en) 1985-09-27 1985-09-27 Plasma processing device

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP6184353A Division JP2502271B2 (en) 1994-08-05 1994-08-05 Plasma processing device

Publications (2)

Publication Number Publication Date
JPS6273720A JPS6273720A (en) 1987-04-04
JPH0719770B2 true JPH0719770B2 (en) 1995-03-06

Family

ID=16622695

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60212443A Expired - Lifetime JPH0719770B2 (en) 1985-09-27 1985-09-27 Plasma processing device

Country Status (1)

Country Link
JP (1) JPH0719770B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2550368B2 (en) * 1987-11-25 1996-11-06 株式会社日立製作所 Magnetic field plasma etching system
JP2611489B2 (en) * 1990-04-28 1997-05-21 三菱電機株式会社 Apparatus for utilizing high-frequency discharge and method for manufacturing semiconductor using the same

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5653853A (en) * 1979-10-05 1981-05-13 Hitachi Ltd Production of sheet and its apparatus
JPS599173A (en) * 1982-07-06 1984-01-18 ザ・パ−キン−エルマ−・コ−ポレイシヨン Method and apparatus for controllable etching of material
JPS59186325A (en) * 1983-04-01 1984-10-23 コンパニ−・アンデユストリエル・デ・テレコミユニカシオン・セイテ−アルカテル Dry etching device

Also Published As

Publication number Publication date
JPS6273720A (en) 1987-04-04

Similar Documents

Publication Publication Date Title
US4968374A (en) Plasma etching apparatus with dielectrically isolated electrodes
JP4180913B2 (en) Top electrode with steps for plasma processing uniformity
US6514347B2 (en) Apparatus and method for plasma treatment
US7849815B2 (en) Plasma processing apparatus
KR940011662A (en) Anisotropic Etching Method and Apparatus
JPH01251735A (en) Electrostatic chuck apparatus
JP3205878B2 (en) Dry etching equipment
WO2001039559A1 (en) Method and apparatus for plasma treatment
JP2502271B2 (en) Plasma processing device
JPH10134995A (en) Plasma processing device and processing method for plasma
JPH0719770B2 (en) Plasma processing device
JPH0618182B2 (en) Dry etching equipment
JPH0649936B2 (en) Bias spattering device
JPH06291064A (en) Plasma treatment device
JPH09275092A (en) Plasma processor
JPH0476495B2 (en)
JPS5856339A (en) Plasma etching device
JP3252542B2 (en) Frequency adjustment method of piezoelectric element
JP2002164329A (en) Plasma treatment apparatus
JP3357737B2 (en) Discharge plasma processing equipment
JPH0845858A (en) Plasma treatment system
JP3282326B2 (en) Plasma processing equipment
JPH05267235A (en) Dryetching system
JPH08107139A (en) Insulating ring member and semiconductor manufacturing device provided therewith
JPS6214431A (en) Plasma treating device