JPS6273670U - - Google Patents

Info

Publication number
JPS6273670U
JPS6273670U JP16604285U JP16604285U JPS6273670U JP S6273670 U JPS6273670 U JP S6273670U JP 16604285 U JP16604285 U JP 16604285U JP 16604285 U JP16604285 U JP 16604285U JP S6273670 U JPS6273670 U JP S6273670U
Authority
JP
Japan
Prior art keywords
latch
group
latch circuit
latches
print data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16604285U
Other languages
Japanese (ja)
Other versions
JPH0424684Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1985166042U priority Critical patent/JPH0424684Y2/ja
Publication of JPS6273670U publication Critical patent/JPS6273670U/ja
Application granted granted Critical
Publication of JPH0424684Y2 publication Critical patent/JPH0424684Y2/ja
Expired legal-status Critical Current

Links

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  • Facsimile Heads (AREA)
  • Electronic Switches (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の実施例の回路図、第2図は第
1図の回路の動作説明に供するタイミングチヤー
ト、第3図は従来例の回路図、第4図は第3図の
回路の動作説明に供するタイミングチヤートであ
る。 LA1は第1ラツチ回路、LA2は第2ラツチ
回路群、LA3は第3ラツチ回路群、AD1〜A
D64はアンド回路群、R1〜R64は発熱用抵
抗群。
Figure 1 is a circuit diagram of an embodiment of the present invention, Figure 2 is a timing chart for explaining the operation of the circuit in Figure 1, Figure 3 is a circuit diagram of a conventional example, and Figure 4 is a diagram of the circuit in Figure 3. This is a timing chart for explaining the operation. LA1 is the first latch circuit, LA2 is the second latch circuit group, LA3 is the third latch circuit group, AD1 to A
D64 is an AND circuit group, and R1 to R64 are a heat generating resistor group.

Claims (1)

【実用新案登録請求の範囲】 mビツトで構成された印字データが並列に与え
られるとともに、該印字データを第1ラツチ信号
に応答して順次ラツチする第1ラツチ回路と、 前記第1ラツチ回路から順次与えられる並列印
字データを、それぞれ第2ラツチ信号に応答して
個別にラツチする複数のラツチ回路からなる第2
ラツチ回路群と、 クロツクに応答して前記第2ラツチ回路群内の
各ラツチ回路に対して第2ラツチ信号を個別に与
える手段と、 前記第2ラツチ回路群内の各ラツチ回路と同数
のラツチ回路を備えるとともに、当該各ラツチ回
路はmビツト分の出力部をそれぞれ有しており、
該第2ラツチ回路群内の各ラツチ回路に印字デー
タのラツチが終了したときに、第3ラツチ信号に
応答して当該第2ラツチ回路群からの印字データ
をラツチする第3ラツチ回路群と、 それぞれが前記第3ラツチ回路群内の各ラツチ
回路それぞれ各出力部に接続されるm個のアンド
回路からなり、かつ、ストローブ信号に応答して
当該各ラツチ回路にラツチされている印字データ
を出力するアンド回路群と、 それぞれがm個の抵抗からなり、かつそれぞれ
の各抵抗が、対応する前記アンド回路群内の各ア
ンド回路それぞれの出力部に個別に接続された熱
印字ヘツドの発熱用抵抗体群とを具備してなる、
熱印字ラインプリンタにおける熱印字ヘツド駆動
回路。
[Claims for Utility Model Registration] A first latch circuit to which print data composed of m bits is applied in parallel and sequentially latches the print data in response to a first latch signal; A second latch circuit includes a plurality of latch circuits that individually latch sequentially applied parallel print data in response to a second latch signal.
a group of latches; means for individually applying a second latch signal to each latch circuit in the second group of latches in response to a clock; and a number of latches equal to each latch circuit in the second group of latches; Each latch circuit has an output section for m bits,
a third latch circuit group that latches the print data from the second latch circuit group in response to a third latch signal when each latch circuit in the second latch circuit group finishes latching the print data; Each of the latch circuits in the third latch circuit group is composed of m AND circuits connected to each output section of each latch circuit, and outputs the print data latched in each of the latch circuits in response to a strobe signal. and a heat generating resistor of a thermal printing head, each consisting of m resistors, each resistor being individually connected to the output part of each AND circuit in the corresponding AND circuit group. comprising a body group,
Thermal printing head drive circuit in a thermal printing line printer.
JP1985166042U 1985-10-28 1985-10-28 Expired JPH0424684Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1985166042U JPH0424684Y2 (en) 1985-10-28 1985-10-28

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1985166042U JPH0424684Y2 (en) 1985-10-28 1985-10-28

Publications (2)

Publication Number Publication Date
JPS6273670U true JPS6273670U (en) 1987-05-12
JPH0424684Y2 JPH0424684Y2 (en) 1992-06-11

Family

ID=31096640

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1985166042U Expired JPH0424684Y2 (en) 1985-10-28 1985-10-28

Country Status (1)

Country Link
JP (1) JPH0424684Y2 (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60261246A (en) * 1984-06-08 1985-12-24 Hitachi Ltd Thermal recorder

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60261246A (en) * 1984-06-08 1985-12-24 Hitachi Ltd Thermal recorder

Also Published As

Publication number Publication date
JPH0424684Y2 (en) 1992-06-11

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