JPH02150248U

JPH02150248U -

Info

Publication number: JPH02150248U
Application number: JP5966989U
Authority: JP
Priority date: 1989-05-25
Filing date: 1989-05-25
Publication date: 1990-12-25

Description

[Brief explanation of drawings]

第１図はこの考案の印字制御回路を有するプリ
ンタの一実施例を示すブロツク図、第２図は同実
施例のクロツク生成回路の構成を示すブロツク図
、第３図は同実施例の印字データ変換回路の構成
を示すブロツク図、第４図１〜２５は同実施例に
おける印字データの出力タイミングを示すタイム
チヤート、第５図は同実施例における印字ヘツド
の印字ピンの配列を示す配列図、第６図は従来例
における印字ヘツドの印字ピンの配列を示す配列
図、第７図１〜２４は従来例における印字データ
の出力タイミングを示すタイミングチヤートであ
る。２……印字制御回路、２１……クロツク生成回
路、２２……印字データ変換回路。 Fig. 1 is a block diagram showing an embodiment of a printer having a print control circuit of this invention, Fig. 2 is a block diagram showing the configuration of a clock generation circuit of the same embodiment, and Fig. 3 is a block diagram showing print data of the same embodiment. A block diagram showing the configuration of the conversion circuit, FIGS. 4 1 to 25 are time charts showing the output timing of print data in the same embodiment, and FIG. 5 is an arrangement diagram showing the arrangement of print pins of the print head in the same embodiment. FIG. 6 is an arrangement diagram showing the arrangement of print pins of a print head in a conventional example, and FIGS. 7 1 to 24 are timing charts showing the output timing of print data in the conventional example. 2... Print control circuit, 21... Clock generation circuit, 22... Print data conversion circuit.

Claims

[Scope of Claim for Utility Model Registration] A print control circuit for controlling the print timing of an impact dot matrix printer that has a 24-dot print head and prints 24 dots during a print cycle T, which has a cycle T/8. A clock generation circuit that generates a clock signal of 1. A print control circuit comprising: a print data conversion circuit that outputs a print data.