JPS6273617A - Method for measuring thickness of epitaxial wafer layer - Google Patents

Abstract

PURPOSE:To obtain a method to accurately and simply measure the thickness of epitaxial growth layer by cutting a sample in the direction crossing the cutting cross-section after the etching and measuring the thickness of a specified semiconductor layer on the cross-section. CONSTITUTION:A sample 20 is cut out with a scriber along the line A-A at the position sufficiently distant from the abnormal growth section on the end of an eptaxial wafer 10 and etched for a few minutes-10min in a mixture solution of potassium hexacyanoferrate, potasium hydroxide, and water. In this etching, the epitaxial wafer 10 is etched in the direction of depth y of a semiconductor layer 16 and also substancially etched in the direction of x of adjacent semiconductor layers 14 and 18. The sample is cut in the direction crossing the cutting cross-section 22 after the etching, and the cut surface 24 is observed with a scaning type electron microscope to measure the etching width C at the deep section of a groove 26 formed with the etching, thereby providing simpler and accurate measuring of the thickness of an epitaxial wafer.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field of the Invention) The present invention relates to a method for measuring the layer thickness of a crystal growth layer in an epitaxial wafer.

(Technical first stage of the invention and its problems) In the wafer after crystal growth, the epitaxial layer thickness is one of the important parameters for various device characteristics, and it is extremely important to determine the accurate epitaxial layer thickness. be. In particular, epitaxial wafers for optical semiconductors have a double heterostructure including an active layer, and the layer thickness of the active layer is ~0.15 μm, and even a small error greatly affects the characteristics of the device. Therefore, accurately measuring the thickness of the epitaxial layer and feeding it back to the crystal growth process contributes to improving device characteristics.

Conventionally, the layer thickness of an epitaxial wafer has been measured by etching a predetermined growth layer to be measured from a cross section of the wafer in the crystal growth direction using a selective etchant, and then observing the cross section using a scanning electron microscope or the like.

FIG. 5 shows a layer thickness evaluation sample of an epitaxial wafer in which a predetermined growth layer to be measured has been selectively etched. In the figure, (1) indicates a semiconductor substrate, (2L (3L) (4) indicates a semiconductor layer grown by epitaxial crystal growth, respectively. Semiconductor layer (3) is a semiconductor B (2), (4) indicates an atomic structure or It is made of substances with different types of impurities. In addition, (5) is a groove formed by etching. In such an evaluation sample, the etched surface (7) of the sample is viewed from the direction shown by the arrow (6). observe,
The layer thickness of a predetermined semiconductor layer (3) was measured by measuring the etching width D1.

Incidentally, although only the semiconductor layer (3) was etched using the selective etchant, the adjacent semiconductor layers (2) and (4) were actually etched as well. For this reason, the etching width D1 is larger than the actual layer thickness D2 of the semiconductor layer (3), and the thickness of the semiconductor layer has been evaluated to be thicker.

Another method for measuring layer thickness is by diagonal polishing, but this method not only complicates the process, but also has drawbacks such as cracks in the crystal during polishing, which can damage the evaluation sample.

(Objective of the Invention) An object of the present invention is to provide a method for measuring the layer thickness of an epitaxial cell wafer, which can accurately and easily determine the layer thickness of an epitaxially grown layer.

(Summary of the Invention) The present invention includes a step of cutting out a sample from an epitaxial wafer on which a plurality of semiconductor layers are epitaxially grown;
A step of etching a predetermined semiconductor core from the cut out surface of the plurality of semiconductor layers of the sample using a selective etchant, a step of cleaving the sample in a direction intersecting the cut plane after this step, and a step of etching a predetermined semiconductor core in the cleaved cross section. This is a method for measuring the layer thickness of an epitaxial cell wafer, comprising the step of measuring the layer thickness of a semiconductor layer.

That is, according to the present invention, a cross-section in the crystal growth direction is formed on an epitaxy cell wafer, a predetermined semiconductor layer whose layer thickness is to be measured is selectively etched from this cross-section with a selective etchant, and a cross-section intersecting with this cross-section is selectively etched using a selective etchant. cleave the epitaxial wafer in the direction to expose the cross section in the etching depth direction,
This makes it possible to measure the etching width in the deep part of the etching, thereby making it possible to more accurately measure the layer thickness of the semiconductor layer.

(Example of the Invention) This example describes InGaA prepared by liquid phase crystal growth.
This is an example of an epitaxial wafer for an sP/InP optical semiconductor and an epitaxial wafer for a main optical semiconductor. As shown in FIG. 2, the epitaxial wafer (10) has a substrate (
12) On top, a semiconductor layer (14) made of n-InP, I
The semiconductor layer (16) made of nGaASP and the semiconductor layer (18) made of InP are I! It is formed by Ij\order liquid phase growth and has a double heterostructure.

FIG. 1 is a diagram showing the process of making a layer thickness evaluation sample according to the present invention. First, as shown in FIG. 1(a), a sample ( 20) Cut out. In the figure,
(19) shows an epitaxially grown semiconductor layer.

Next, as shown in the same figure (b), the cut out sample (
20), hexadi7iron(III) l! Potassium (k
3[FE(CN)6]), potassium hydroxide (ni011
) and water (H2O) for several seconds to 10 seconds. This solution is a mixture of InGaAs and InP.
The semiconductor layer (16) is a selective etchant of P and is made of InGaAsP.
, (18) are etched from the exposed cut surface (22).

After this etching, the layer thickness evaluation sample (20) is cleaved in a direction intersecting the cut surface (22), for example, in a right angle direction, as shown in FIG. Then, the cleavage plane (24) is observed with a scanning electron microscope. A typical scanning electron microscope image seen at this time is shown in FIG.

FIG. 4 shows the etching rate of the semiconductor m (16) made of InGaAsP by the above-mentioned Erachans 1 to 1. By the above etching, the epitaxial wafer (
10) shows that not only the semiconductor 1m (16) is etched in the depth direction (y), but also the adjacent semiconductor layer (14) is etched.
, (18), it can be seen that it is also etched considerably in the direction (X). Therefore, in FIG. 3, by observing the cleavage plane (24) instead of the etching plane (22) and measuring the etching width C at the deep part of the groove (26) formed by etching, a predetermined semiconductor can be etched. The layer thickness of the layers can be measured accurately.

In this example, an example was shown for evaluating the layer thickness of an epitaxial wafer for an InGaAsP/InP-based optical semiconductor;
It can also be applied to measuring the layer thickness of epitaxial wafers of various other thin film application devices.

(Effects of the Invention) According to the method for measuring the layer thickness of an epitaxial wafer of the present invention described above, the layer thickness of an epitaxial wafer can be measured easily and accurately.

[Brief explanation of drawings]

Fig. 1 is a diagram showing the process of creating a layer thickness evaluation sample in the present invention, Fig. 2 is a cross-sectional view of an example of an epitaxial wafer used for layer thickness evaluation, and Fig. 3 is a diagram showing a typical epitaxial wafer in an embodiment of the present invention. FIG. 4 is a diagram showing a scanning electron microscope image, FIG. 4 is a diagram showing the relationship between etching time and etching foot, and FIG. 5 is a diagram showing a conventional layer thickness measurement method. (10)...Epitaxial wafer, (12)
-...Semiconductor substrate, (14), (16), (18)...Semiconductor layer, (20)...Layer thickness evaluation sample. Representative Patent Attorney Noriyuki Chika Yudo Norihiro Ogo (b) (C) Figure 1 Figure 2 Figure 3

Claims (2)

[Claims] (1) A step of cutting out a sample from an epitaxial wafer on which a plurality of semiconductor layers have been epitaxially grown; a step of etching a predetermined semiconductor layer of the plurality of semiconductor layers of the sample from the cut out surface with a selective etchant; and this step. A method for measuring a layer thickness of an epitaxial wafer, comprising: cleaving the sample in a direction intersecting the cut plane; and measuring a layer thickness of the predetermined semiconductor layer in the cleaved cross section. (2) The method for measuring the layer thickness of an epitaxial wafer according to claim 1, wherein the plurality of semiconductor layers have a double heterostructure.