JPS6272240A - Status signal transmission equipment - Google Patents

Abstract

PURPOSE:To prevent a received pattern from being erroneously recognized by controlling the level of a timing pilot signal sent independently of a data signal to send a status signal. CONSTITUTION:A transmission data of a channel A on a signal line 101 and a transmission data of a channel B on a signal line 102 are fed respectively to a coding circuit 1, where they are multiplexed. Then the 1st pilot signal used as a timing signal in a different frequency other than the data signal comprising the status signal of each channel and the 2nd pilot signal used as a carrier pilot signal are sent. The 1st pilot signal is set to one of plural prescribed levels in response to the combination of the status signals of each channel and the 2nd pilot signal is set to a prescribed level and set to the transmission means together with the data signal. A reception section detects the level fluctuation of the 2nd pilot signal to suppress the level fluctuation in the transmission means by the internal gain control, the 1st pilot signal level is detected to discriminate the status signal of each channel.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a modulation/demodulation device that multiplex transmits a plurality of data channels, and more particularly to a device that transmits status signals corresponding to each channel.

(Prior Art) Conventionally, in a modulation/demodulation device that transmits this type of status signal, it is necessary to convert the code sequence of transmission data into another code sequence using the status signal, and to detect the converted state in the receiving unit. Therefore, a method is known in which the state of the status signal in the transmitter is determined, or a method in which a pattern of a specific code sequence is transmitted according to the state of the status signal, and the specific pattern is detected by the receiver to determine the status signal. It is.

Therefore, the status signal transmission device has been configured in any of the above ways.

(Problems to be Solved by the Invention) In the conventional status signal transmission device described above,
An erroneous operation may occur due to a momentary interruption in the transmission path or a code error caused by noise, or even if there is no control in the transmitter, the pattern of a specific code sequence may be erroneously transmitted in the receiver as if it were controlled by the transmitter. Because there is a possibility of detecting
The disadvantage is that there is a possibility of malfunction.

An object of the present invention is to control the level of the timing pilot signal transmitted independently for data No. 48 to transmit the status signal. It is an object of the present invention to provide a status signal transmission device configured to prevent such occurrences.

(Means for Solving the Problems) A status signal transmission device according to the present invention includes a transmitting section and a receiving section, and is configured to be able to multiplex and transmit a plurality of data channels.

The transmitting section is capable of transmitting a first pilot signal that can be used as a timing signal of a different frequency, and a second pilot signal that can also be used as a carrier pilot signal, in addition to the data signal comprising the status signal of each channel. The first pilot signal is set to one of a plurality of predetermined levels according to the combination of the status signals of each channel, and the second pilot signal is set to a certain level and transmitted along with the data signal to the transmission means. It is for sending to.

The receiving section detects the level fluctuation of the second pilot signal, suppresses the level fluctuation in the transmission means by internal gain control, detects the level of the first pilot signal, and determines the status of each channel (of the L signal). This is for making a determination.

(Example) Next, the present invention will be explained with reference to the drawings.

1 and 2 are block diagrams of a transmitting section and a receiving section, respectively, showing an embodiment of the status signal transmission device according to the present invention.

In FIG. 1, 1 is an encoding circuit, 2 is a DA conversion circuit,
3 is a mixing circuit, 4 is a clock generation circuit, and 5 is a frequency dividing circuit.
6 Fi level switching circuits, 1 is a low-pass filter circuit, 8 is a modulation circuit, 9 is a medium frequency generation circuit, 10 is an attenuation circuit, 11 is a mixing circuit, and 12 is a band P wave circuit.

In FIG. 2, 13 is a band Toba circuit, 14 is a gain control circuit, 15 is a demodulation circuit, 16 is a band p-wave circuit, 17 is a carrier regeneration circuit, 1B is a Teijo Toba circuit, 19 is an adder circuit, and 20 is an AD 21 is an automatic equalization circuit, 22 is a decoding circuit, 23 is a timing recovery circuit, 24-digit phase control circuit, 25 is a level detection circuit, and 26 is a polarity control circuit.

In FIG. 1, transmission data of channel A on signal line 101 and transmission data of channel B on signal H1o2 are respectively applied to encoding circuit 1, where they are multiplexed and then randomly transmitted by a scrambler. code, and further converted to a class IV partialless pump code. The code output from the encoding circuit 1 is converted into a multi-level pulse by the DA conversion circuit 2, and mixed with a timing pilot signal by the mixing circuit 3. The clock signal generated by the clock generation circuit 4 is supplied to the encoding circuit 1 and the frequency dividing circuit 5,
A timing pilot signal is generated by the frequency dividing circuit 5.

Channel A status signal (signal section 105) and channel B status signal (signal 1i1i1104)
The level of the timing pilot signal is controlled by the level switching circuit 6 according to the state of the timing pilot signal.

The data signal and timing pilot signal mixed by the mixing circuit 3 are applied to a low frequency F wave circuit 7, and high frequency components are removed. The output of the low-band p-wave circuit 7 is applied to a modulation circuit 8, which amplitude-modulates the carrier generated by the carrier generation circuit 9. The carrier is set to a predetermined level in an attenuation circuit 10 and mixed into a modulated output signal in a mixing circuit 11.

Band F-wave circuit 12 suppresses signal components outside a predetermined band. The frequency spectrum of the output signal of the band F-wave circuit 12 is shown in FIG. In FIG. 3, f is a data signal, g is a timing pilot signal, and h is each frequency component of a carrier pilot signal.

In FIG. 2, the band offshore circuit 13 suppresses unnecessary frequency components of the received signal on the signal line 105, and the gain control circuit 14 corrects level fluctuations in the transmission path. The carrier pilot signal shown in FIG. 3 is extracted by the band F-wave circuit 16 and fed back to the gain control circuit 14 to detect level fluctuations. On the other hand, the carrier regeneration circuit IHC is also supplied with the output of the gain control circuit 14, and the output of the carrier regeneration circuit 11 is supplied to the demodulation circuit 15 as a demodulated carrier phase-synchronized with the carrier pilot signal.

The demodulated data signal and timing pilot signal are applied to a bandpass filter circuit 18, an adder circuit 19, and a phase control circuit 24. The band p-wave circuit 18 extracts a timing pilot signal, the adder circuit 19 performs level correction of the level-controlled timing pilot signal, and the phase control circuit 24 generates a timing signal phase-synchronized with the timing pilot signal. be done. The output signal of the adder circuit 19 is converted into a digital signal by an AD conversion circuit 20, and the reception timing is reproduced by a timing regeneration circuit 23. The code amount interference of the digital signal is suppressed by the automatic equalization circuit 21, and the timing pilot signal is also suppressed by the automatic equalization circuit 21. The output of the automatic equalization circuit 21 is sent to the decoding circuit 2.
2 into channel A reception data and channel B reception data, and are sent to signal line 106 and signal 1107, respectively.

Level detection circuit 25 determines the level of the input timing signal and sends a channel A status signal and a channel B status signal to signal line 10B and signal line 109, respectively. The discrimination signal obtained from the level detection circuit 25 is also given to a polarity control circuit 26 to control the polarity of the output signal of the phase control circuit 24.

(Effects of the Invention) As explained above, the present invention can prevent code errors in received data by controlling the level of Timing Piketsu No. 11, which is transmitted independently of the data signal, and transmitting the status signal. Errors in data are not affected by the pattern of the code sequence or the pattern of the code sequence, and instantaneous interruptions in the transmission path can be dealt with by the integration function of the level detection circuit in the receiving section.

Furthermore, since level fluctuations in the transmission path can be suppressed by controlling the gain using the gear rear pilot signal, there is an effect that extremely stable status signal transmission can be performed.

[Brief explanation of drawings]

FIG. 1 and FIG. 2 are block diagrams of a transmitting section and a receiving section, respectively, showing an embodiment of a status signal transmitting apparatus according to the present invention. FIG. 3 is an explanatory diagram showing a frequency spectrum of a signal sent to a transmission path. 1... Encoding circuit 2... DA conversion circuit 3.11-... Mixing circuit 4... Clock generation circuit 5... Branch circuit 6... Level switching circuit 7... Low frequency P wave Circuit 8・φ・Modulation circuit 9...Carrier generation circuit 10φ...Attenuation circuit 12.1!5, 16.18...Band p-wave circuit 14...
- Gain control circuit 15... Demodulation circuit 11... Carrier regeneration circuit 19... Addition circuit 20... AD conversion circuit 21... Automatic equalization circuit 22 - Fist/decoding circuit 23... Timing regeneration circuit 24...Phase control circuit 25...Level detection circuit 26...Polarity control circuits 101 to 109...Signal lines

Claims (1)

[Claims] In addition to the data signal consisting of the status signal of each channel, a first pilot signal that can be used as a timing pilot signal of different frequencies and a second pilot signal that can also be used as a carrier pilot signal can be transmitted. The first pilot signal is set to one of a plurality of predetermined levels according to the combination of the status signals of each channel, and the second pilot signal is set to a constant level and is transmitted along with the data signal to the transmission means. a transmitting section for transmitting the second pilot signal to the first pilot signal;
a receiving unit for detecting the level of the pilot signal of the channel and determining the status signal of each channel;
A status signal transmission device configured to be able to multiplex and transmit multiple data channels.