JPS6269532A - Semiconductor integrated circuit device and manufacture thereof - Google Patents

Abstract

PURPOSE:To ensure the isolation between elements, by providing a groove in a high concentration impurity layer, which has the same conductivity type as that of a substrate formed on the surface of the substrate, and burying an insulating material in the groove. CONSTITUTION:Impurities, which have the same conductivity type as that of a substrate 1, are implanted in the silicon substrate 1. thereafter, heat treatment is performed at a high temperature. The impurities are made active and diffused. Thus an impurity layer 4 is formed. Then, a groove 1a is formed. Impurities are further implanted, and the surrounding part of the groove 1a is coated with the impurity layer 4. Thereafter, an insulating material 2' is buried in the groove 1 and flattened. Then, MOSFET gates 7 and source and drain diffused layers 8 are formed. In this way, the elements are positively isolated with the groove 1a and the surrounding high concentration impurity layer 4. Thus, the operation of the parasitic MOSFET and leakage between the elements can be avoided.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor integrated circuit device in which element isolation is performed by grooves, and a method for manufacturing the same.

[Conventional technology]

FIG. 2 is a cross-sectional view showing a conventional semiconductor integrated circuit device, in which (1) is a silicon substrate, (2) is a silicon oxide film formed by selective oxidation of the silicon substrate (1), and (3) is a silicon oxide film formed by selective oxidation of the silicon substrate (1). ) is an impurity layer of the opposite conductivity type to the silicon substrate (1), (4) is an impurity layer of the same conductivity type as the silicon substrate (1), (5) is a capacitor insulating film, (6) is a capacitor electrode, ( 7) is the gate of MO3I-transistor,
(8) is the source/drain diffusion layer of the MO3I transistor.

Next, the operation will be explained. In conventional semiconductor integrated circuit devices, isolation between elements has been performed by a silicon oxide film (2) formed by selective oxidation of a silicon substrate (1). In this case, in order to ensure electrical isolation between the elements and to avoid the operation of a parasitic transistor that occurs when the potential of the capacitor electrode (6) becomes high, for example, the lower side of the isolation silicon oxide film (2) must be An impurity layer (4) containing an impurity of the same conductivity type (such as boron in the case of a P-type silicon substrate) as the silicon substrate full at a high concentration (P゛ in the case of a P-type silicon substrate) is formed in the parasitic transistor. threshold VT of
It is common practice to increase H.

In conventional semiconductor integrated circuit devices, silicon oxide film (2)
The end of the bird's beak is shaped like a bird's beak with a length of 0.3 to 1.071 m (commonly called the bird's beak), and the area of the active region is reduced accordingly.
There have been disadvantages in that it is unfavorable in terms of element miniaturization and various electrical characteristics.

As one measure against such problems, a trench separation method as shown in FIG. 3 has been proposed. This method uses a silicon substrate (1(la) with a depth of 0.5 to several 71 m in 11
In this method, the trench is formed using means such as ion etching, and the trench is filled with an insulating material (2) such as oxide and flattened. In the case of this method, the width of the groove (1a) can be 1 μm or less, which is advantageous for miniaturization of the device without causing bird's beaks as seen in the selective oxidation method shown in FIG.

[Problem that the invention seeks to solve]

However, in the case of this trench type isolation method, in order to completely electrically isolate the elements, the highly concentrated impurity layer (4) must be placed in the trench (4).
1a). High concentration impurity layer (
When 4) is to be formed by ion implantation, the side wall of the groove (1a) having a narrow and deep opening is not uniformly implanted even if the implantation angle is changed. FIG. 4 shows a perspective view of the main part when ions are implanted at a certain angle from -F in the groove (1a). In the figure, the shaded area indicated by a indicates the implanted part, and the area indicated by b indicates the non-implanted part.

In addition, when ions are implanted perpendicular to the silicon substrate (1, 1), they are implanted into the bottom of the trench (1a) but not into the sidewalls.As a countermeasure for this, instead of ion implantation, There is also a method of diffusing impurities from the surface, but there is a problem in that it is difficult to control the concentration and depth of the impurity layer (4).

This invention was made in order to solve the problems mentioned above. It forms an impurity layer of the same conductivity type as a silicon substrate, and forms a relatively shallow groove in this impurity layer to form an insulator. An object of the present invention is to obtain a semiconductor integrated circuit device in which elements are isolated by embedding.

Another invention of the present invention is to form an impurity layer of the same conductivity type as that of the silicon substrate, to form a groove reaching the vicinity of the bottom surface of this impurity layer, and to perform ion implantation in the vicinity of the bottom of the groove. An object of the present invention is to obtain a semiconductor integrated circuit device in which elements are isolated by forming an impurity layer of the same conductivity type as the semiconductor device and then burying an insulator in the trench.

Furthermore, another invention of the present invention is a semiconductor device in which an impurity layer of the same conductivity type as a silicon substrate is formed, a relatively shallow groove is formed in this impurity layer, and an insulating material is embedded in the semiconductor substrate to isolate elements. The purpose of this invention is to obtain a method for manufacturing an integrated circuit device.

Still another aspect of the present invention is to form an impurity layer of the same conductivity type as the silicon substrate, to form a groove reaching near the bottom surface of this impurity layer, and to perform ion implantation near the bottom of this groove. An object of the present invention is to provide a method for manufacturing a semiconductor integrated circuit device in which elements are isolated by forming an impurity layer of the same conductivity type as that of a silicon substrate and then burying an insulator in the trench.

[Means for solving problems]

A semiconductor integrated circuit device according to the present invention includes a first impurity layer of high concentration and of the same conductivity type as the silicon substrate, which is formed on the surface of the silicon substrate, and a trench formed in the first impurity layer. and an insulator embedded in this groove.

Further, a semiconductor integrated circuit device according to another aspect of the present invention includes a first impurity layer of a higher concentration and of the same conductivity type as the silicon substrate, which is formed on the surface of the silicon substrate;
a groove drilled to reach near the bottom surface of the impurity layer; a second impurity layer of the same conductivity type as the silicon substrate and higher concentration formed near the bottom of the groove by ion implantation; This is a combination of the above-mentioned insulating material embedded in the groove.

Furthermore, a method for manufacturing a semiconductor integrated circuit device according to still another aspect of the present invention includes the step of forming a first impurity layer of the same conductivity type as the silicon substrate and at a higher concentration on the surface of the silicon substrate; This method includes the steps of forming a trench in the first impurity layer and filling the trench with an insulator.

Furthermore, a method for manufacturing a semiconductor integrated circuit device according to still another aspect of the present invention includes the step of forming a first impurity layer of the same conductivity type as the silicon substrate and at a higher concentration on the surface of the silicon substrate. , a step of forming a groove so as to reach the vicinity of the bottom surface of the first impurity layer, and a step of forming a second impurity layer of the same conductivity type as the silicon substrate but with a higher concentration near the bottom of the groove by ion implantation. This method includes a step of forming an impurity layer and a step of filling the groove with an insulator.

[Effect]

The semiconductor integrated circuit device of the present invention easily and reliably isolates elements by combining a highly concentrated impurity layer formed on a silicon substrate, a groove formed in this impurity layer, and an insulator embedded in this groove. I do.

Further, a semiconductor integrated circuit device according to another aspect of the present invention includes: a heavily doped impurity layer of the same conductivity type formed on a silicon substrate; a trench drilled to reach near the bottom surface of the highly doped layer; By combining the highly concentrated impurity layer formed near the bottom of this trench and the insulator buried in the trench, isolation between elements is easily and reliably achieved.

Furthermore, in a method for manufacturing a semiconductor integrated circuit device according to still another aspect of the present invention, an impurity layer of the same conductivity type as a silicon substrate and a higher concentration is formed, a groove is formed in this impurity layer, and an insulating layer is formed in the groove. embed things.

Furthermore, a method for manufacturing a semiconductor integrated circuit device according to still another aspect of the present invention includes forming a first impurity layer of the same conductivity type as the silicon substrate and having a higher concentration, and forming a groove in this impurity layer. A highly concentrated impurity layer is formed at the bottom of this trench by ion implantation, and an insulator is buried in the trench.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. 1st
In figures (a) to (d), (11, (2'), +4
1. (71 and (8) are similar to those in the conventional semiconductor integrated circuit device shown in FIGS. 1 and 2.

(4') is a high concentration impurity layer formed near the bottom of the trench (1a) by ion implantation, and (9) is a mask.

Next, a method for manufacturing the semiconductor integrated circuit device of this embodiment will be explained. First, an impurity having the same conductivity type as the silicon substrate (1) is implanted into the silicon substrate (1) by a known ion implantation method. The ion concentration at this time is I
~10'' atoms/cc, and the energy is varied depending on the desired depth. After this, heat treatment is applied at high temperature to activate and simultaneously diffuse impurities (see Figure 1 fa)). Next, using an insulating material as a mask (9), a groove (1a) is formed in the silicon substrate (11) by reactive ion etching (see Fig. 1(b)).The depth of the groove (la) at this time is The depth is set to be the same as or shallower than that of the impurity layer (4).

When the impurity layer (4) and the groove (1a) have the same depth, an impurity of the same conductivity type as the impurity layer (4) is further ion-implanted from the vertical direction of the groove (1a) at the same concentration. and groove (
An impurity layer (4゛) is also formed at the bottom of 1a).
(see Figure 1 (C1
reference). Next, an insulator (2) such as an oxide is placed in the groove (1a).
After burying and planarizing the MOS transistor, the gate (7) and source/drain diffusion layer (8) of the MOS transistor are formed (see FIG. 1 (d+)).

The semiconductor integrated circuit device formed by the above steps is
The elements are reliably separated by -a(la) and the surrounding high-concentration impurity layer (4), and operation of the parasitic MO3) transistor and leakage between the elements can be avoided.

Further, the groove-type isolation does not generate bird's beak, and is effective for miniaturization of elements.

In the above embodiment, a single substrate of an MO3 integrated circuit was explained, but the same applies to a substrate having an epitaxial layer and well isolation when having a well structure. Of course, it can also be applied.

〔Effect of the invention〕

As described above, according to the present invention, since the high concentration impurity layer and the groove are configured to be combined, it is possible to reliably and easily surround the bottom of the groove with a high concentration impurity layer of the same conductivity type as the silicon substrate. This has the effect of providing a semiconductor integrated circuit device that can be enclosed and avoid leakage between elements, operation of parasitic transistors, and the like.

Further, according to another aspect of the present invention, the highly concentrated impurity layer, the groove, and the ion diffusion region are configured to be combined.
A semiconductor integrated circuit device is obtained in which the bottom of the trench can be reliably and easily surrounded with a highly concentrated impurity layer of the same conductivity type as the silicon substrate, thereby avoiding leakage between elements and operation of parasitic transistors. It has the effect of

Furthermore, according to still another aspect of the present invention, since the method includes the steps of forming a high concentration impurity layer and forming a groove in the high concentration impurity layer, the periphery of the bottom of the groove can be reliably and It can be easily surrounded with a highly concentrated impurity layer of the same conductivity type as the silicon substrate, reducing leakage between elements and parasitic
This has the effect of providing a method of manufacturing a semiconductor integrated circuit device that can avoid the operation of transistors and the like.

Furthermore, according to another aspect of the present invention, the method includes the steps of forming a high concentration impurity layer, forming a groove in the high concentration impurity layer, and forming an ion diffusion region. As a result, the bottom of the trench can be reliably and easily surrounded by a highly concentrated impurity layer of the same conductivity type as the silicon substrate, and leakage between elements and operation of parasitic transistors can be avoided in the semiconductor integrated circuit. This has the effect of providing a method for manufacturing the device.

[Brief explanation of drawings]

Figures 1 (al to fd) are sequential cross-sectional process diagrams showing a semiconductor integrated circuit device and its manufacturing method according to an embodiment of the present invention, and Figure 2 shows an example of a method for separating elements in a conventional semiconductor integrated circuit device. FIG. 3 is a cross-sectional view showing another example of the isolation method between elements in a conventional semiconductor integrated circuit device, and FIG. 4 is an enlarged perspective view of the main part of the groove shown in FIG. (1) is a silicon substrate, (1a) is a trench, (2゛) is an insulator, (4) is a first impurity layer, (4') is a second impurity layer, (7) is a gate, (8) ) is the source/drain diffusion layer, and (9) is the mask. In addition, in the figures, the same reference numerals indicate the same or corresponding parts.

Claims (4)

[Claims] (1) A silicon substrate, a first impurity layer of the same conductivity type as the silicon substrate and higher concentration formed on the surface of the silicon substrate, and a groove drilled in the first impurity layer. , and an insulator embedded in the groove. (2) a silicon substrate, a first impurity layer of the same conductivity type as the silicon substrate and a higher concentration formed on the surface of the silicon substrate, and a first impurity layer formed on the surface of the silicon substrate so as to reach the vicinity of the bottom surface of the first impurity layer; a groove drilled in the groove, a second impurity layer of the same conductivity type as the silicon substrate and higher concentration formed near the bottom of the groove by ion implantation, and an insulator embedded in the groove. A semiconductor integrated circuit device comprising: (3) In a method for manufacturing a semiconductor integrated circuit device that performs isolation between elements of the semiconductor integrated circuit device, a step of forming a first impurity layer of the same conductivity type as the silicon substrate and at a higher concentration on the surface of the silicon substrate. A method for manufacturing a semiconductor integrated circuit device, comprising: forming a trench in the first impurity layer; and filling the trench with an insulator. (4) In a method for manufacturing a semiconductor integrated circuit device that performs isolation between elements of a semiconductor integrated circuit device, a step of forming a first impurity layer of the same conductivity type as the silicon substrate and at a higher concentration on the surface of the silicon substrate. a second impurity layer of the same conductivity type as the silicon substrate and of a higher concentration is formed near the bottom of the trench by ion implantation. 1. A method of manufacturing a semiconductor integrated circuit device, comprising the steps of: forming an impurity layer; and burying an insulator in the trench.