JPS626523A - Pwm drive circuit - Google Patents

Abstract

PURPOSE:To improve the linearity of an input/output characteristic when a signal level of a drive signal is small and to attain the operation stable against the fluctuation of a power voltage by controlling a tilt angle and a peak value of a 2-phase triangle wave signal being lower and upper limit reference inputs of a comparator circuit in response to the fluctuation of the power voltage. CONSTITUTION:In a triangle wave generating circuit 8, a comparison reference level of a current value setting circuit 6 setting a constant current value of the 1st and 2nd constant current sources 1, 2 is set by voltage division of a reference power voltage Vref by resistors R11, R12 and since the said reference level is fluctuated in response to the fluctuation of the power voltage, the constant current value of the 1st and 2nd constant current sources 1, 2 is controlled in response to the fluctuation of power voltage in a current setting circuit 6. That is, in the triangle wave generating circuit 8, the peak value and the tilt angle of the triangle wave are controlled in response to the fluctuation of the power voltage so as to make the drive power by a pulse signal always constant regardless of the fluctuation of the reference power voltage Vref. In this case, the tilt angle of the triangle wave is decided by the constant current value of the 1st and 2nd constant current sources 1, 2 and the capacitance of the capacitor C1.

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to a PWM (Pulse Width Modulation) drive circuit;
In particular, the present invention relates to a PWM drive circuit that generates a pulse signal with a pulse width corresponding to the signal level of a drive signal and switches and drives a load based on this pulse signal.

BACKGROUND ART A PWM bidirectional switching drive method is known as one method for driving a load such as a motor.

This drive method has excellent features of low loss and reduced power consumption, and is particularly useful for driving loads such as motors in vehicle-mounted devices, portable devices, etc. that use batteries as power sources.

Conventionally, a PWM drive circuit generates two triangular wave signals a and b that are in phase with each other, as shown in FIG. By using the upper and lower limit reference inputs of the comparator circuit 100 and the drive signal C as a comparison input, a pair of pulse signals d, which have a pulse width corresponding to the signal level of the drive signal and correspond to the drive direction of the load, are generated. get e,
There is a configuration in which a load is switched and driven based on the pair of pulse signals d and e.

In such a configuration, the tip portion of the triangular wave signal is used in a range where the signal level of the drive signal @C is small.

However, in the process of generating a triangular wave signal, no amplifier has an infinite bandwidth, and it is inevitable that ringing or so-called distortion will occur at the tip of the triangular wave, so the tip of the triangular wave signal is used. Conventional circuits that require this have the disadvantage that the linearity of the input/output characteristics worsens, especially when the signal level of the drive signal C becomes small.

Furthermore, when a PWM drive circuit is used to drive a load such as a motor in in-vehicle equipment or portable equipment, batteries are used as the power source for these equipment, so the power supply voltage fluctuates rapidly. Measures against fluctuations are desired.

The present invention has been made in view of the above points, and by using only the linear portion of a triangular wave signal to generate a pulse signal, it is possible to improve the linearity of input/output characteristics, especially when the signal level of the drive signal is small. Furthermore, it is an object of the present invention to provide a PWM drive circuit that can operate stably even with variations in power supply voltage.

The PWM drive circuit according to the present invention generates two-phase triangular wave signals having substantially equal peak values and opposite phases to each other, and uses these two-phase triangular wave signals as upper and lower limit reference inputs of a comparison circuit, respectively. The configuration is such that a pulse signal is generated in accordance with the signal level of the triangular wave signal, and the slope angle and peak value of the triangular wave signal are controlled in accordance with fluctuations in the power supply voltage.

Example Hereinafter, embodiments of the present invention will be described in detail based on the drawings.

In FIG. 1, a first constant current source 1 is a transistor Q
+, Q2 and a current mirror circuit consisting of resistors R+, R2. The second constant current source 2 connected in series with the first constant current source 1 has transistors Q3 and Q4 connected in parallel to each other, and bases of these transistors Q3 and Q4 are commonly connected through a resistor R3. It is constituted by a current mirror circuit consisting of a transistor Q5 and emitter resistors R4 and Rs of each transistor, and is adapted to sink a current value 2I○ which is twice the constant current value 1o of the first constant current source 1. A capacitor CI, which is a power storage means, is connected between the common connection point of the first and second constant current sources 1.2, that is, the common connection point of the collectors of transistors Q2 and transistors Q3 and Q4, and the ground, which is a reference potential point. It is connected.

The voltage across the capacitor C1 is the comparator COMP
+, G OMP 2, and the comparison input of the comparison circuit 3 that monitors the voltage level, that is, the comparator CO
It becomes the inverting input of M P1 and the non-inverting input of COMP2. The upper and lower comparison reference levels Vu and V of the comparator circuit 3 are set by four resistors R5 to R8 connected in series with each other.
It is set by dividing the reference power supply voltage V ref by . The resistors R5 to R8 are further connected to the reference power supply voltage V re
The voltage of f is divided to approximately 1/2, and the voltage is set to 1/2 V ref via an operational amplifier ○P+ having a voltage follower circuit configuration. Two comparison outputs of comparison circuit 3, namely comparator COMP
The outputs of + and COMP2 become set (S) and reset (R) inputs of R8-flip-flop 4. The d output of the flip-flop (hereinafter simply referred to as FF) 4 is supplied to a control circuit 5 that controls activation and deactivation of the second constant current source 2, which is made up of a transistor Q6, resistors R9, and RIG. This control circuit 5 includes a transistor Q
6 turns on in response to the ○ output of FF4, turning transistors Q3 and C4 off, and the second
The constant current source 2 is inactivated.

The voltage across the emitter resistor R5 in the second constant current source 2 serves as an inverting input of an operational amplifier OP2 having a voltage follower circuit configuration. Operational amplifier OP2 is connected to resistor RI1. A comparison reference level is set by dividing the reference power supply voltage V ref by R12, and the comparison output constitutes a current value setting circuit 6 that sets the constant current values of the first and second constant current sources 1.2. are doing.

The voltage across the capacitor CI becomes a first phase triangular wave signal φa through an operational amplifier OP'+ having a voltage follower circuit configuration, and is inverted in phase by an inverter 7 consisting of an operational amplifier OPa and resistors R13 and RI4 to become a first phase triangular wave signal. The second phase triangular wave signal φb is opposite in phase to the signal φa. A DC bias of 1/2 V ref is applied to these triangular wave signals φa and φb.

As described above, a triangular wave generation circuit 8 is configured that generates two-phase triangular wave signals φa and φb having substantially equal peak values and mutually opposite phases. This triangular wave generation circuit 8 includes a first constant current source 1 with a constant current value of 1o and a second constant current source 2 with a constant current value of 2io, and controls the capacitor by on/off control of the second constant current source 2. Since the configuration is such that a triangular wave is generated by charging and discharging C1 with a constant current, when converting the circuit 8 into an IC (integrated circuit), one terminal bin (the first Terminal 8a in the figure
).

The two-phase triangular wave signals φa and φb are sent to the comparator COM P
3. Upper and lower limit comparison reference inputs of the comparator circuit 9 consisting of COM P a, that is, comparator C○MP3
, COMPx are inverted inputs. Comparison input of comparison circuit 9, ie, comparator COMP3.

A drive signal for a load, such as a motor M, is supplied as each non-inverting input of C0 MPa via a resistor R+s. A reference power supply voltage y rer is applied to each non-inverting input terminal of the comparators COM P 3 and G OM P 4 via a resistor RI6 (R15=R16), and a resistor R+
By setting the resistance values of s and R+s to be equal,
The drive signal will be biased to 1/2 V ref at the time it becomes the comparison input of the window comparator 9. That is, the signal reference level of the drive signal is 1/2Vr.
It becomes ef.

As a result, the circuit reference level of the triangular wave generation circuit 8, that is, the comparison reference level of the comparator circuit 3 and the DC bias level (signal reference level) of the drive signal are both set by resistor division of the same reference power supply voltage yrer. become. Therefore, even if there is a fluctuation in the power supply voltage, the two-phase triangular wave signal φa
, °φb and the drive signal are always kept constant, so that stable circuit operation is always performed regardless of fluctuations in the power supply voltage.

The comparison ratio j of comparator COMP3 is AND gate 1
0 and NOR gate 11, and the comparison output of comparator C0MPa is AND gate 10 and NOR gate 11.
Everyone at Gate 11 becomes a force.

This results in an AND gate 10 and a NOR gate.

First and second pulse signals corresponding to the driving direction of the motor M are derived from each output terminal of the motor M.

The drive signal mentioned above is sent to the comparator C via the resistor R+s.
It also serves as a non-inverting input for OMPs. Comparator C
The OMPs constitutes a polarity determining means that determines the polarity of the drive signal with respect to the signal reference level by using 1/2 V ref as an inverted input.

The discrimination output of the comparator COMPs becomes the data (D) input of the D-FF12. The D-FF 12 uses the Q output of R8-FF4 in the triangular wave generation circuit 8 as a trigger (T) input, and its Q and Q outputs become the respective outputs of the AND gates 13 and 14. AND gates 13 and 14 are AND gates 10
and the outputs of the NOR gate 11, that is, the first and second pulse signals, are respectively inputted, and the Q of the D-FF 12.

A gate means is configured to output only one of the first and second pulse signals based on the zero output.

Each output pulse of the AND gate 13.14 is supplied to a compensation circuit 15.16 which compensates for the energy loss due to the back electromotive force of the back electromotive force absorbing diode D+ and D2 in the motor drive circuit 18, which will be described later. Compensation circuit 1
5, the output pulse of the AND gate 13 is connected to the resistor R+
It becomes the base input of the transistor Q7 via y, and this transistor Q7 is connected in parallel with the capacitor C2. Both ends of the capacitor C2 are short-circuited when the transistor Q7 is turned on, and the charge is instantly discharged, and charging is started by the constant current source Ia when the transistor Q7 is turned off, that is, when the output pulse of the AND gate 13 disappears. be done. The voltage across the capacitor C2 becomes the inverting input of the comparator COMP6. Comparator COM
Ps is the reference voltage E.

is a non-inverting input, and generates a high-level pulse signal when the voltage across the capacitor C2 is lower than the reference voltage E'o. As a result, the compensation circuit 15 outputs a pulse signal in which a pulse having a substantially constant pulse width is added to the output pulse of the AND gate 13.

Similar to the compensation circuit 15, the compensation circuit 16 also has a resistor R18, a transistor Q8, a capacitor C3, and a constant current! It is composed of a comparator Ib and a comparator COMPy, and its operation is exactly the same as that of the compensation circuit 15.

Each output pulse of the compensation circuit 15 , 16 is supplied via a predrive circuit 17 to a motor drive circuit 18 .

In the motor drive circuit 18, the motor M is driven by a PNP transistor Q9 and NPN transistors Q+o and P.
NP type transistor Q.

and the common connection point of each collector of the NPN transistor Q12. Transistor Q9, Qlo
, Qn, and Q10 are power transistors. The emitters of transistors Qs and Qn are directly connected to the power supply V, and the bases of each transistor are connected to resistors RI9. R? 0 to the power supply Vcc. On the other hand, transistor QIO
, QI2 are both grounded, and each base is grounded through resistors R2+ and R22, respectively, and Zener diodes ZD1. It is connected to each collector via ZD2. Both ends of the motor M are connected to a power supply Vcc via back electromotive force absorbing diodes D+ and D2.

In the predrive circuit 17, the pulse signal supplied from the compensation circuit 15 drives the power transistor Q9 through a predrive stage consisting of resistors R23, R24 and the transistor Q13, and after being inverted by the inverter 19, the pulse signal is applied to the resistors R25 to R27 and transistor Q14
power transistor Q via a predrive stage consisting of
12. As a result, a current flows through the motor M in the direction of the arrow shown by the solid line in the figure, and the motor M is driven to rotate in the forward direction. Further, the pulse signal from the compensation circuit 15 is passed through the inverter 20 to the transistor Q +s
is also supplied to turn on the transistor Q+s when the motor M stops driving in the forward direction. As a result, the base and emitter of the power transistor Q12 are short-circuited by the transistor Q+s, so that the power transistor QI2 is instantly turned off. This transistor Q
The reason for providing +s will be explained in detail later.

The base of transistor Q+s is connected to power supply Vcc via resistor R2B.

On the other hand, the pulse signal supplied from the compensation circuit 16 is
29, R3) and a transistor Q16 through a pre-drive stage, and after being inverted by an inverter 21, the resistors R31 to R3
3 and the power transistor Q+ through a predrive stage consisting of transistor Q17.

to drive. As a result, a current flows through the motor M in the direction of the arrow shown by the broken line in the figure, and the motor M is driven to rotate in the opposite direction. Further, the constant current source from the compensation circuit 16 is also supplied to the transistor Q+s via the inverter 22, and turns on the transistor Q+a when the reverse drive of the motor M is stopped. As a result, the distance between the base and emitter of power transistor 01G becomes transistor Q +
Since it is short-circuited by s, the power transistor Q I
o is instantly turned off. The base of transistor Q+s is connected to power supply Vcc via resistor R34.

Next, the circuit operation of the PWM drive circuit according to the present invention will be explained.

First, the circuit operation of the triangular wave generation circuit 8 will be explained with reference to the waveform diagram of FIG. In the triangular wave generation circuit 8, the second
When the constant current source 2 of the first constant current source 2 is in an inactive state, that is, when the transistor Q6 is turned on and the transistors Q3 and Q4 are turned off, the capacitor C1 is As shown in Figure 2(a), the battery is charged at a constant angle of inclination. When the voltage across the capacitor C1 reaches the upper limit reference level Vu of the comparator circuit 3, the comparator COMP+ generates a low level pulse (b), and in response to this pulse (b), the Q output (d>) of R8-FF4 increases. Transition to a lower level.

This turns transistor Q6 off, so
The second constant current source 2 is in an activated state, that is, the transistor Q3
, Qa are turned on, and a current twice the constant current of the first constant current source 1 is sucked.

As a result, the capacitor C1, which had been in the charging state, shifts to the discharging state, and as shown in FIG. 2(a), the capacitor C1 is discharged with the same inclination angle as during charging. Subsequently, the voltage across the capacitor C1 is set to the lower limit reference level V of the comparator circuit 3.
When reaching L, comparator COMP 2 generates a low level pulse (C), and in response to this pulse (C), R
The Q output (d>) of 8-FF4 transitions to a high level. As a result, the transistor Q6 turns on and the second constant current source 2 becomes inactivated, so that the capacitor C is turned on again.
1 is charged at a constant angle of inclination by a constant current supplied from the first constant current source 1.

In this way, by repeating the charging and discharging operation of the capacitor C1 with the constant current from the first and second constant current sources 1.2, the voltage across the capacitor C1 is as shown by the solid line in FIG. 2(a). The signal changes into a triangular waveform as shown in FIG. It is output as a second phase triangular wave signal φb, which has the same peak value as the signal φa and has an opposite phase. This two-phase triangular wave signal φa.

φb becomes a reference input of the comparator circuit 9.

The comparison input of the comparison circuit 9 is 1/2 V re
A drive signal for motor M is supplied having a signal reference level of f. Here, if the motor M is, for example, a spindle motor that rotationally drives a compact disc, the error signal obtained by comparing the reproduction synchronization signal from the disc with the reference synchronization signal becomes the drive signal, and based on this error signal, The drive control of the spindle motor is then performed. This is the so-called spindle servo.

In Figure 3, the cross point of the two-phase triangular wave signals φa and φb is at the 1/2 V ref level, and the PWM operation occurs when the signal level of the drive signal is higher or lower than this 1/2 V ref level. will be explained below.

In the comparator circuit 9, first, when the signal level of the drive signal is higher than <1/2Vref level as shown by the dashed line in FIG. When the signal level of the one-phase triangular wave signal φa becomes low, it transitions from the low level to the high level at 1, and the high level is maintained until time t4 when the signal level of the triangular wave signal φa exceeds the signal level of the drive signal.

Further, the output (C) of the comparator COMP4 transitions from high level to low level at time t2 when the signal level of the second phase triangular wave signal φb exceeds the signal level of the drive signal, and becomes lower than the signal level of the drive signal. At time t3, the level changes to high level again.

On the other hand, if the signal level of the drive signal is lower than the < 1/2 V ref level as shown by the two-dot chain line in FIG. d) transitions from low level to high level at time t2 when the signal level of the first phase triangular wave signal φa exceeds the signal level of the drive signal, and at time t3 when the signal level of the triangular wave signal φa exceeds the signal level of the drive signal. maintain a high level. Also, comparator C
The output (e) of OMP4 transitions from high level to low level at time t1 when the signal level of the second phase triangular wave signal φb exceeds the signal level of the drive signal, and at the time when it becomes lower than the signal level of the drive signal. At t4, it transitions to high level again.

Combare 'l COM P 3, COM P
a (7) Each output is powered by two people, the AND gate 10 and the NOR gate 11, and the AND gate 10 operates when both of the two powers are at a high level, that is, the signal level of the drive signal is higher than the 1/2 V ref level. The NOR gate 11 outputs a high-level pulse (f) when both input signals are at a low level, that is, when the signal level of the drive signal is 1/2.
When it is lower than the ref level, a high level pulse (Q) is output. Therefore, AND gate 10 and NOR gate 1
1 is a pulse signal (f) corresponding to the driving direction of the motor M;
(g) will be output. Note that since we have explained the case where the signal level of the drive signal is constant, the pulse width of the pulse signals (f) and (g> is constant, but this pulse width varies depending on the signal level of the drive signal. It is easy to understand that things change.

In this way, by generating two-phase triangular wave signals φa and φb with equal peak values and mutually opposite phases, and performing PWM operation using the linear portions of these two-phase triangular wave signals φa and φb, even if the triangular wave Even if ringing or so-called rounding occurs at the tip, there is no deterioration in linearity when the signal level of the drive signal is small.

Here, base! $ If the power supply voltage vref fluctuates, PW
The pulse width of the pulse signal generated by M changes,
The driving power generated by this pulse signal changes in response to fluctuations in the power supply voltage.

In other words, as shown in FIG. 4 (A), if the pulse width of the pulse signal when the drive signal is at a certain signal level is To, then the drive power due to this pulse signal is equal to the pulse width T.
o and the drive voltage Vo (Wl power supply voltage vrer), so if the drive voltage VC) becomes, for example, 1/2 due to fluctuations in the power supply voltage, the drive power will also become <1/2 as shown by the diagonal line. It will become.

However, in the triangular wave generation circuit 8, the first and second
The comparison reference level of the current value setting circuit 6 that sets the constant current values of the constant current sources 1 and 2 is the resistor Ro.

The current value setting circuit 6 is set by dividing the reference power supply voltage V ref by R12, and the reference level also changes according to fluctuations in the power supply voltage. This means that the constant current values of the second constant current sources 1 and 2 can be controlled.

As a result, the inclination angle of the triangular wave changes as shown in FIG. 4(B). On the other hand, since the upper and lower comparison reference levels VU and VL of the comparator circuit 3 are also set by dividing the reference power supply voltage Vref by the lower paper R5 to R8, if the reference power supply voltage V rer becomes 1/2, The comparison reference levels VLJ and VL of the upper and lower limits are also reduced to 1/2,
As a result, the peak value Vp of the triangular wave becomes 1/2 of the value before the power supply fluctuation, as shown in FIG. 4(B). Therefore, by setting the inclination angle of the triangular wave so that the repetition period of the triangular wave is the same before and after the power supply fluctuation, the repetition period of the triangular wave is twice that before the fluctuation (2To).
Since a pulse signal having a pulse width of is generated, even if the drive voltage VD becomes 1/2, the drive power generated by the pulse signal remains the same as before the power supply fluctuation.

That is, in the triangular wave generation circuit 8, the peak value and slope angle of the triangular wave are controlled according to fluctuations in the power supply voltage.
By doing so, the drive e? by the pulse signal? Based on 1 power, it can always be kept constant regardless of fluctuations in the Q power supply voltage vrer. Note that the slope angle of the triangular wave is determined by the first and second constant current sources 1
, 2 and the capacitance of the capacitor C1.

In FIG. 1 again, the signal level of the drive signal is now at the fifth level.
If the change occurs as shown by the dashed line in Figure (a), two pulse signals (b) and (c) with pulse widths corresponding to the polarity and signal level of the drive signal will
are output from OR gate 11, and are output from AND gate 1, respectively.
3. Each of 14 - becomes human power. The drive signal is comparator C
It also serves as a comparison input for OMPs, and the signal reference level is 1/2.
The polarity with respect to Vrer is determined. D-F with the comparison output (d) of this comparator COMPs as data input
F12 is the Q of R8-FF4 in the triangular wave generation circuit 8
When the output (f3) is input to the bird, the corresponding Q output (e
) at the falling timing of Q, Φ output (f), (g)
occurs. This Q.

The 0 outputs (f), (g) are supplied to AND gates 13.14 as gate control signals.

In the above embodiment, the Q output (fe) of R8-FF4 was directly used as the trigger input of D-FF12, but the Q output (
It is also possible to use the trigger input of the [)-FF 12 via a pulse generator that generates pulses at the rising and falling timings of e). According to this, the period of polarity determination becomes 1/2, and the resolution can be doubled.

The Q and CI outputs (f) and (()> of the D-FF12 are control signals that determine the drive direction of the motor M. For example, when the signal level of the drive signal is small and its polarity changes from positive to negative, the NOR gate is activated. As shown in FIGS. 11 to 5 (C), for the reverse drive pulse signal (first pulse) that occurs instantaneously, the output is 0 at the time of generation (()
) is at a low level, AND gate 14 operates to inhibit its output. The reason for this prohibition will be explained below.

Now, let's consider the case where a reverse drive pulse signal is instantaneously generated from the NOR gate 11 at a timing when the signal level of the drive signal is small and its polarity changes from positive to negative, as shown in FIG. 5(C). In the motor drive circuit 18, the transistor Q is activated in response to the pulse signal shown in FIG. 5(b).
9' and Q12 are turned on, driving the motor M in the forward direction. However, as shown in FIG.

Q12 is turned off, and transistors Qu, Q+@
turns on and attempts to drive motor M in the opposite direction.

Here, in a transistor, generally, as shown in FIG. 6, there is a 6-side Co between the base and emitter, so that the transistor that is in the on state in response to the driving pulse (a) is turned on at the point when the pulse (a) disappears. It has a characteristic that a delay of one hour toFp is required before transitioning from the state to the off state. Therefore, as described above, by generating the reverse drive pulse signal shown in FIG. 5(C), transistors Q9 and Q10 are turned off, and transistors Qu and Q+ are turned off.

However, due to the delay time tOFF, the transistor Q12 cannot be turned off instantaneously, and there will be a period in which it is temporarily turned on at the same time as the transistor Q. A large current may flow through QI+ and Q12, leading to destruction of the transistors.

However, in this PWM drive circuit, the AND gate 13.
14, and these gates 13 and 14 are controlled based on the polarity determination result with respect to the signal reference level of the drive signal, so in the above example, the reverse direction drive shown in FIG. Since the output of the pulse signal can be inhibited by the AND gate 14 in response to the Φ output (g) of the D-FF 12, the transistor QI2 is not turned on at the same time as the transistor Qu.

In addition, in order to reduce the delay time toFF of the power transistor Q12IQIO, the predrive circuit 17
are provided with transistors Q +s and Q +s. These transistors Q+s and Q+a instantaneously turn on in response to the extinction of the drive pulse of the power transistor Q12.0Il+, and these transistors QI2.0
By short-circuiting the base and emitter of the IO, the delay time toFF can be shortened. The delay time tFF of a transistor is generally about 1 to 2 μsea, but by providing the transistors Ghs and Q+a, it can be shortened to about 1/10, that is, about 1 Q Q n sec.

Another embodiment for preventing the above-mentioned power transistors from turning on simultaneously is shown in FIG. In this figure, as described above, the first and second pulse signals (a) corresponding to the driving direction of the motor M are output from the AND gate 10 and the NOR gate 11, and these pulse signals are transmitted to the delay circuit 23.
24, it is delayed by a predetermined time τ0. These delayed outputs (
b) are respectively fed to three-state buffers 25,26. The first and second pulse signals (a) are also supplied to one-shot multivibrators 27 and 28, respectively. The one-shot multivibrator 27.28 operates for a certain period of time from the generation of the first and second pulse signals until their extinction, preferably a delay time τO of the delay circuit 23.24.
A low level output (C) is generated until twice the time (2τ0) has elapsed, and the buffer 26. '25 and prohibits the second and first pulse signals output from the delay circuits 24 and 23 from being supplied to the next stage.

FIG. 8 is an operating waveform diagram of the circuit in FIG. 7, and (a)
-(C) show the waveforms of the signals (a) to (C) in FIG. 7, respectively.

Referring to this waveform diagram, the circuit operation in FIG.
To explain the gate 10 side, the pulse signal (a
) is delayed by the time τO in the delay circuit 23 and becomes the driving pulse (b) for the motor M. At this time, in response to the low level inhibition signal (C) output from the one-shot multivibrator 27, the buffer 26 cuts off the output line of the other drive pulse. As a result, a certain period (time τ0
), the output of the local drive pulse is prohibited, so the time τ0 is changed from the power transistor Q12.
By setting the delay time tOFF of 01O longer than the delay time tOFF, power transistors Q9 and QIO (or Q++
and Q12) are never turned on at the same time.

As mentioned earlier, the delay time t of the transistor
Since OFF is generally about 1 to 2 μsea, the time τ0
It is desirable to set the time to about 5 μsec.

In FIG. 1, first and second pulse signals corresponding to the driving direction of the motor M output from the AND gate 13.14 are respectively supplied to a compensation circuit 15.16. These compensation circuits 15 and 16 are for compensating for the energy loss in the back electromotive force absorbing diodes D+ and D2 in the motor drive circuit 18. The energy loss in the back electromotive force absorbing diodes D+ and D2 is almost constant and can be ignored when the pulse width of the pulse signal is large, but when the pulse width is small, the loss ratio increases. It's coming. Therefore, as shown by the broken line in Figure 9, the gain decreases in the region where the pulse width of the double-pulse signal is small, so when the pulse width is small, the energy loss in the back electromotive force absorbing diodes D+ and D2 is It would be better to compensate for this.

Here, to explain the circuit operation of the compensation circuit 15 with reference to the waveform diagram in FIG. 10, the capacitor C2 is charged with a constant current by the constant current source 1a, and responds to the input pulse (a). When the transistor Q7 is turned on, the charge in the capacitor C2 is instantly discharged, and the capacitor C2 is charged again with a constant current from the time when the input pulse (a) disappears. Therefore, capacitor C
The voltage across the terminal 2 changes as shown in FIG. 10N)). This both-end voltage (b) is compared with the reference voltage Eo by the comparator COMP7, and as a result, the comparator COMP7
A pulse signal (C) is obtained at the output end of the pulse signal (C) having a pulse width corresponding to the period from when the input pulse (a) is generated until a certain period of time Ta has elapsed after the input pulse (a) disappears. That is,
This means that a certain pulse width 7a is added to the input pulse (a), and the back electromotive force absorbing diode D is
+, the energy loss at D2 can be compensated for.

FIG. 11 shows the input/output characteristics of the compensation circuits 15 and 16, that is, the relationship between the pulse width of the input pulse and the added pulse width. In the pulse width region (■) of the input pulse where the input pulse cannot drop to the level where it cannot be lowered, no pulse width is added, but in the region (■) where the input pulse reaches the zero level below the base Q voltage Eo, the additional pulse width changes proportionally and reaches the zero level. In the area (■) after that, the added pulse width becomes a fixed width. In other words, the pulse width of the input pulse is extremely small.

In case (2), there is no addition of pulse width or the additional pulse width changes proportionally, but this is due to the fact that the rise and fall of the input pulse are not steep but actually gentle; In the region (2), the gain can be improved as shown by the solid line in FIG.

The compensation circuits 15 and 16 are not limited to the configurations of the above embodiments, but may include, for example, as shown in FIG.
Constant pulse width T in response to the rising edge of the input pulse
The pulse generating circuit 29 may be configured to include a pulse generating circuit 29 that generates a pulse signal having a pulse signal having a value of b, and an OR gate 30 that calculates the logical sum of the output pulse of the pulse generating circuit 29 and the input pulse. In this configuration, when the pulse width of the input pulse is smaller than the pulse width Tb, a pulse signal having the pulse width Tb is always output from the OR gate 30, so that the pulse width of the input pulse is the opposite of that when the pulse width is small. The energy loss in the electromotive force absorbing diodes DI and D2 is compensated for, and when the pulse width of the input pulse is greater than the pulse width Tb, the pulse width of the input pulse is not changed.

In the above embodiment, a case has been described in which the application is applied to a drive circuit of a spindle motor that rotationally drives a compact disc, but the application is not limited to this, but is applicable to a carriage motor that drives a pickup, a focus of information reading light in a pickup, etc. It can also be applied to drive circuits for focus actuators and tracking actuators that control tracking, and can be widely applied not only to compact disc players but also to drive circuits for various loads in various devices.

As described in detail, the PWM drive circuit according to the present invention is configured to use only the linear portion of the triangular wave signal to generate the pulse signal that drives the load, so that ringing does not occur at the tip of the triangular wave. Even if the signal level is increased or the signal level is rounded, there is no influence from these factors, and the linearity of the input/output characteristics can be improved, especially when the signal level of the drive signal is small.

In addition, by controlling the slope angle and peak value of the triangular wave signal according to fluctuations in the power supply voltage, the pulse width of the drive pulse can be changed for the same drive signal level, so the power supply voltage will fluctuate. Since the drive power can be kept constant for the same drive signal level even when the power supply voltage varies, stable operation is always possible even when the power supply voltage fluctuates.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram showing one embodiment of the present invention, and Fig. 2 is a circuit diagram showing an embodiment of the present invention.
Figure 3 is a waveform diagram of each part to explain the circuit operation of the triangular wave generation circuit in the figure. Figure 3 is a waveform diagram of each part to explain the operation of generating two pulse signals corresponding to the drive direction of the load by PWM operation. (A>, (B) are waveform diagrams to explain the operation of changing the slope angle and peak value of the triangular wave in response to fluctuations in the power supply voltage. Figure 5 is a waveform diagram for explaining the operation of changing the slope angle and peak value of the triangular wave in response to fluctuations in the power supply voltage. Figure 6 is a waveform diagram of each part to explain the circuit operation of the simultaneous ON prevention circuit for power transistors. Figure 6 is a diagram to explain the tOFF delay time of the transistor. Figure 7 is a diagram for explaining the simultaneous ON prevention circuit.
A block diagram showing another embodiment of the prevention circuit, FIG.
Figure 9 is a diagram showing the change in gain due to energy loss due to back electromotive force in a diode for absorbing back electromotive force. A waveform diagram for explaining the circuit operation of a compensation circuit that compensates for energy loss/portion due to back electromotive force in a diode, FIG. 11 is a diagram showing the input/output characteristics of such a compensation circuit, and FIG. 12 is a diagram showing the input/output characteristics of such a compensation circuit. FIG. 13, a block diagram showing another embodiment, is a diagram for explaining a conventional example and its operation. Explanation of symbols of main parts 1...First constant current source 2...Second constant current source 3.9...Comparison circuit 8... Triangular wave generation circuit

Claims (1)

[Claims] This is a PWM (pulse width modulation) drive circuit that generates a pulse signal with a pulse width corresponding to the signal level of the drive signal, and switches and drives a load based on this pulse signal. a first comparator circuit that uses the two-phase triangular wave signals as reference inputs for upper and lower limits, respectively, and uses the drive signal as a comparison input; , a first constant current source, a second constant current source connected in series with the first constant current source and sinking twice as much current as the first constant current source, and the first and second constant current sources. a power storage means connected between a common connection point of the constant current source and a reference potential point;
a second comparison circuit for monitoring the output level of the power storage means; a control means for controlling activation/deactivation of the second constant current source based on the output of the second comparison circuit; current value setting means for setting constant current values of the first and second constant current sources; PWM, wherein the comparison reference level of the second comparison circuit is set by dividing the power supply voltage, and the two-phase triangular wave signal is output based on the output signal of the power storage means. drive circuit.