JPS6265097A - Voice synthesizer - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Industrial Application Field] This invention stores predetermined types of phrases in the form of digital signals, and defines a phrase code to identify which of the stored phrases the phrase belongs to. The present invention relates to a speech synthesis device which outputs an audio signal when the word/phrase code is input and the word/phrase is pronounced.

[Conventional technology]

The easiest way to memorize words is to record on magnetic tape an analogue (pressure) representing the audio signal when the word is pronounced. When reading out a magnetic tape, it is troublesome to automatically start up a tape recorder and read out the recorded portion of the magnetic tape.The analog 4-voltage representing the audio signal is converted into a digital signal by an A-D converter. This digital signal can also be converted and stored in digital memory. Reading a specific part of the digital memory is much easier than starting a tape recorder and playing back a specific recorded part of the magnetic tape. but,
Since a large amount of memory is required to store the entire contents of a large number of words in A-Df format, the speech synthesis device related to this invention, for example, decomposes each word into its component parts. , each component is memorized as a digital signal, and for each word, what kind of grooves it is composed of is memorized, and all the digital signals corresponding to the word are synthesized each time. There is. For example, in Japanese, all words can be broken down into (sub) sounds, and each sound of this open sound (actually, any sound below ``father'' is fine) is recorded as a digital signal and written as ``ffl''. The phrase ``speech synthesis'' refers to the synthesis of digital signals for each sound of ``Onseigoosei'' by 1.V coupling.

As a conventional device of this kind, there is one shown in FIG. 7ii2. Figure 2 is a block diagram showing the configuration of a conventional speech synthesis device. In the figure, (1) is an input circuit that generates an address signal (3) in response to a word selection signal (2), and (2) is a word selection signal. signal, (3) is an address signal, (4) is a storage circuit that stores audio encoded data, (5) is an arithmetic circuit that decodes this audio encoded data, and (6) is an analog "ff1al" that is proportional to the amplitude. D-A using a pulse width modulation method that outputs a code b (the sign indicates the positive or negative of the amplitude a)
The converter (7) is an audio output circuit, and the inverter (71)
, AND element (72), P-channel transistor (73)
), (75), N-channel transistor (74).

(76), output terminals (77), and (78). (8) is a control circuit that controls the input circuit (1), the memory circuit (4), the arithmetic circuit (5), and the DA converter (6).

Next, the operation of the apparatus shown in FIG. 2 will be explained.

When the word selection signal (2) is input to the input circuit ill, the address signal (3) is sent out from the input circuit (1), and the side division circuit (8) calculates the audio encoded data in the storage circuit (4). The decoding process is carried out by the circuit (5). This decoded data is converted into an analog signal by the D-A converter (6) and outputted to the outside as audio by the audio output circuit (7). Audio decoding Since the operation of G is not the essence of this invention, a detailed explanation will be omitted here, and the operation of audio output, which is the essence of this invention, will be described in detail.D-Af converter (6 ) output signals a and b have waveforms as shown at the bottom of FIG. 2, and the analog four voltages corresponding to these waveforms are as shown at the bottom of the waveform.

The audio output circuit (7) is made up of transistors (73) and (74).
0MO8 (Complementary
MOS) output buffer and transistor (75)
, (76) is the push-pull output (low) path of the CMO8 output buffer. In the embodiment shown in the figure, the audio output circuit (7) is set so that the sign of the signal from the D-Afilter (6) becomes logic "1" when the amplitude a is a positive value, and the transistor (73), The amplitude a is defined in the buffer (74). During this time, the transistor (75) is on and the transistor (76) is off, so if you connect a load such as a speaker to the 1llii terminal of the output terminals (77) and (78), the lff of amplitude a During the period when the transistor (74) is on, the transistor (74) is on.
75), output terminal (78), speaker, output terminal (7
7), the IIL current flows through the path of the transistor (74).

During the period when the logic of amplitude a is “0”, the transistor (73)
is on, the transistor (74) is off, and the output terminal (
77) and (78) are at the same level, so no current flows. Moreover, when the amplitude a is a negative value, the sign is logical rO
transistors (75) and (76)
) during the period when the amplitude a appears in the buffer and the logic of the amplitude a is "L", the transistor (73), the output terminal (77),
Four currents flow through the speaker, the output terminal (78), and the transistor (76). The current flowing through the speaker inductance, etc. is smoothed, and the first current flowing through the speaker has a waveform corresponding to the waveform shown as analog 4 voltages below the waveform of the symbol A1 shown at the bottom of Fig. 2. become.

[Problem that the invention seeks to solve]

Since the conventional speech synthesizer is constructed as described above, the speech output circuit requires four output buffer transistors, which makes the device complicated, expensive, and large.

The present invention has been made to solve this problem, and an object of the present invention is to provide a speech synthesis device that can obtain similar effects by using only one output buffer transistor in the speech output circuit.

[Means to solve the problem]

In the speech synthesis device according to the present invention, the speech output circuit is configured to output only a half wave of either a positive value or a negative value.

[Effect]

In this invention, only one half-wave of either a positive value or a negative value is used as an output for synthesizing audio, so the number of output buffer transistors can be reduced to one.

[Embodiments of the invention]

Embodiments of the present invention will be described below with reference to the drawings.

@Figure 1 is a block diagram showing an embodiment of the present invention. In the figure, the same reference numerals as in Figure 2 indicate the same or corresponding parts, and (
700) is a NAND element which inputs the analog quantity a1 sign proportional to the amplitude output from the D-A converter (6), (701) is a P-channel transistor, (702)
is the output terminal.

Next, the operation of the circuit of the present invention will be explained.

After the word selection signal (2) is input, decoding processing, D-A
The process up to the conversion is the same as in the conventional device, and will be omitted here.

The amplitude output a of the D-A converter (6) is connected to the NAND element (70
0), it is sent to the transistor (701) only when the logic of the sign is "l", that is, a positive value. Therefore, if a load such as a speaker (generally an air-acoustic transducer) is connected to the output terminal (702), the transistor (701) is turned on while the logic of vibration-a is "1", and the output terminal (702)
) current flows to the speaker. Also, the logic of amplitude a is “0
'', the transistor (701) is off and no current flows through the speaker. Like this, the audio output circuit (7)
performs a half-wave output operation that outputs only the positive value of the DA output waveform.

In the above embodiment, the audio output circuit 'jk#I4 was configured to output only the positive value of the amplitude 4a, but it may also be configured to output only the negative value of the amplitude a by inserting an inverter after outputting the code. can. Further, in the above embodiment, a pulse width modulation method is used for the D-A converter, but the D-A ff1ill! using a load resistor is used. A similar effect can be obtained even in the case of an analog device when the analog output is output in the form of an analog quantity a proportional to the amplitude.

〔Effect of the invention〕

In the present invention, as described above, since the audio output circuit is constituted by a half-wave output circuit, only one output buffer transistor is required, and the device can be simplified, and the device can be made inexpensive and compact.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a block diagram showing the configuration of a conventional speech synthesis device. (1) is an input circuit, (2) is an input signal in the form of a phrase code, (3) is an address signal, (4) is a memory circuit, (5) is an arithmetic circuit, (6) is a DA converter, (a) is the amplitude, +b
l is a symbol, (7) is an audio output circuit, and (702) is an output terminal to a speaker (generally an electroacoustic conversion circuit). Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (1)

[Claims] A storage circuit for storing various audio encoded data necessary for converting a word input in the form of a word code into an audio signal in which the word is pronounced; an input circuit that inputs a signal of the form and outputs an address signal for reading encoded audio data corresponding to the word or phrase from the storage circuit in response to the signal; and an input circuit that decodes the encoded audio data read out using the address signal. Audio having an arithmetic circuit for processing, and a D-A converter for converting the decoded data into an analog signal composed of an analog quantity proportional to an amplitude value and a sign representing the sign representing the sign of the amplitude and outputting the analog signal. The synthesizing device further comprises means for outputting the amplitude output of the D-A converter to the electroacoustic conversion circuit only during a period when the sign representing the positive or negative amplitude of the output of the D-A converter is positive. A speech synthesizer featuring: