JPS6263347A - Programmable controller - Google Patents

Abstract

PURPOSE:To confirm the state of various devices at an optical moment and the state of various input-output data when a CPU processes information from the outside, by updating and storing data when the data are transferred from the 1st and 2nd storage means because the 3rd storage means receives a state holding instruction. CONSTITUTION:When a state holding instruction is read out while a user program is successively executed, data respectively stored in the memory 5 and data storing memory 7 of each device are read out and transferred to and stored in a state holding memory 9. However, since the storing contents of the memories 5 and 7 are transferred to the state holding memory 9 through an operation processing section 3 when the state holding instruction is read out, the content of the memory 9 is rewritten by the transferred storing contents. Therefore, the period during which the data are held b the state holding memory 9 becomes the period from the moment when the operation processing section3 reads out the first state holding instruction set in the user program to another moment just before the next state holding instruction is read out.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a programmable controller.

[Conventional technology]

What if the traditional programmer pull controller died?

An error occurs in various devices that make up the input/output cuff ports of the central processing unit (rCPUJ), such as the input device (X device), the output device (Y device), the temporary storage device (M device), etc. Hereinafter referred to as "error ONJ"), whether or not (PL below [error 0
FFJ).

When an error ON is detected, for example, an error message is displayed or the CPU temporarily stops its operation.

[Problem that the invention seeks to solve]

By the way, one of the various devices mentioned above is causing error O.
When the operator recognizes that an error has occurred in the programmable controller, an error message is displayed on the 1 display, or the 1 CPU itself stops operating. However, it is possible to recognize the status of each device at the time of error detection (contents such as error ON or error OFF) and input/output data for various information processing to be performed by the CPH at that time. The data is retained for a certain period of time and is updated one after another with new data provided from outside, and in some cases, the error ON state may return to the error OFF state. Therefore, no matter how accurately error detection is performed, the cause of the error cannot be ascertained, and furthermore, it is not possible to check the status of various input/output data when the CPU is stopped from the outside. There were problems 0 This invention was made to solve the above problems, and it is possible to monitor the status of various devices at any given time and the status of various input/output data when the CPU performs information processing. The purpose is to provide a programmable controller that can be checked from the outside.

[Means for solving problems] A programmable controller according to the present invention.

The central processing unit constituting the programmable controller updates and stores data (f) regarding the status of various devices constituting the input/output port of the central processing unit (1) in the first storage means, and the central processing unit stores the information. Various data necessary for processing are updated and stored in the second storage means, and the data is stored in the first. As soon as they are transferred from the second storage means, they are updated and stored in the t-@3 storage means, and at a preset timing, the above! 1. A state holding command for transferring data from the second storage means to the third storage means is outputted by a state holding command outputting means.

[Effect]

The third storage means in the second aspect of the present invention is in a state in which data regarding the states of various devices and various data necessary for the central processing unit to perform information processing are output from the state maintenance command output means at preset timings. 1st by holding order. This is updated and stored as soon as it is transferred from the second storage means.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.

Figure M1 is a progera according to an embodiment of the present invention.

FIGS. 2 and 3 are block diagrams showing the configuration of the pull controller; FIGS. 2 and 3 are diagrams showing a user program in which a state holding command according to an embodiment of the present invention is set; FIG. 4 is a block diagram showing the configuration of the pull controller in FIG. A flowchart is shown.

In FIG. 1, reference numeral 2 denotes a user program memory 1 constituting a state maintenance command output means, 3 '3 an arithmetic processing section which together with the user program memory 1 constitutes a state maintenance command output means, and 5 a first Storage means, that is, the memory of each device; T is the second storage means, that is, the memory for storing data; 9, the third storage means, that is, the memory for holding the state; 11, the CPU unit 7); 13, the peripheral device; 15, the peripheral device 13; It is a CPU.

The CPU unit 11 includes the above-mentioned user program program 1% arithmetic processing section 3. Memory for each device 5. It has a data storage memory 7 and a state holding memory 9. The user program memory 1 includes state maintenance commands that can be freely set by the user (shown in FIGS. 2(a) and 2(b)).
A user program for driving a programmable controller having a programmable controller is stored therein. As mentioned above, the memory 5 of each device contains bit data (bit data) indicating the status of various devices such as the X device, Y device, and M device that make up the input/output board of the CPU unit 110. The data is stored in units of 2 times, and the stored contents are updated under the control of the arithmetic processing section 3 every time the desired bit data is given. The data storage memory 7 uses, for example, a register for data storage, and has various input/outputs for 16 bits set by a user program for use by the CPU unit 11 in information processing under the control of the arithmetic processing section 30. Data is stored, and the stored contents are updated every time new data is provided. The state holding memory 9 is used for arithmetic processing! 3 receives and stores data transferred from the memory 5 and data storage memory 7 of each device through the arithmetic processing section 3, and new data is transferred via the arithmetic processing section 3. It holds the current data until it is given.

The arithmetic processing unit 3 sequentially reads the user programs stored in the user program memory 1 and performs predetermined information processing according to the user programs. When the arithmetic processing unit 3 reads out the state holding command shown in FIG. The state holding command is transferred to the state holding memory 9, and the state holding command is read from the user program memory 1 and stored in the memory 5. The storage contents of the memory 7 are held in the state holding memory 9. The peripheral device 13 mentioned above is a device for reading the contents held in the state holding memory 9.

It is connected to the state holding memory 9.

Next, the programmable controller having the nine configurations described above will be explained below with reference to the flowchart of FIG. 4.

When the operator turns on the drive power of the programmable controller, the arithmetic processing section 3 starts processing operations. The area shown in FIG. 2A stored in the user program memory 1 described above contains instructions such as various constants and data for normal operation of the programmable controller. Therefore, the arithmetic processing section 3 performs normal control operations while reading out the instructions in the input area. In this way, when the user program is executed sequentially and the state holding command shown in FIG. At the same time, the read data is transferred to the state holding memory 9 and stored in the memory 9 (step 23). The data is held in the memory 9 while the arithmetic processing unit 3 reads out the instruction area 1r of the user program shown in FIG. 2B. However, when the state holding command shown in FIG. 3t-
(Step 23)
) Therefore, the contents of the state holding memory 9 are rewritten with these transferred storage contents. Therefore, the period during which data is retained by the state retaining memory 9 is the period from when the arithmetic processing unit 3 reads out the first state retaining instruction set in the user program until just before reading the next state retaining instruction. It turns out.

As mentioned above, the state holding command can be freely set in the user program, and error detection can be performed by the user program.1 For example, as shown in FIG. If a user program is created to be executed, the state of each device and the state of various input/output data at the time when the arithmetic processing unit 3 reads out the state holding command are held in the state holding memory 9. It is also possible to read out the contents of the state holding memory 9 using the peripheral device 13 and perform operation analysis.

Furthermore, the device in which data is held by the state holding memory 9 described above can be set in advance.

〔Effect of the invention〕

As described above, according to the present invention, the third storage means constituting the central processing unit stores data regarding the states of various devices.
Various data necessary for the data processing unit and the central processing unit to perform information processing are stored in the first . As soon as it is transferred from the second storage means, it is updated and stored, so the status of various devices and the status of various input/output data when the CPU performs information processing at any time can be checked from the outside. This has the effect of providing a programmable controller that can perform the following functions.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of a programmable controller according to an embodiment of the present invention, and FIGS. 2 and 3 are user programs in which state hold instructions are set according to an embodiment of the present invention. The program diagram, FIG. 4, shows a 70-chart of the configuration shown in FIG. In the figure, 1 is a user program memory, 3 is an arithmetic processing unit, 5 is a memory of each device, 7 is a data storage memory, 9 is a state holding memory, and 11 is a CPU unit. In each figure, the same reference numerals indicate the same or corresponding parts. Patent applicant Mitsubishi Electric Corporation Figure 1

Claims (1)

[Claims] a first storage means for updating and storing data related to the states of various devices constituting input/output ports of the central processing unit; and a second storage unit for updating and storing various data necessary for the central processing unit to perform information processing. means, third storage means for updating and storing the data when the data is transferred from the first and second storage means, and third storage means for updating the data from the first and second storage means at a preset timing. A programmable controller comprising, in the central processing unit, state holding command output means for outputting a state holding command for transferring data to the means.