JPS6260674B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electronic timepiece that can display the time on a timetable in addition to the normal time.

Currently, in electronic watches, the time on the timetable of trains, buses, etc. is stored in advance in a storage device such as RAM (random access memory), and when necessary, the time is read out and displayed on the display. It is considered that the

By the way, the times on timetables for trains, buses, etc. generally vary greatly depending on whether it is a weekday or a holiday. Therefore, if you mistake the time on the timetable displayed on the electronic clock for a weekday or a holiday, you may miss the train or bus or have to wait for a long time, making it difficult to use transportation smoothly. I couldn't do it.

This invention was made in view of the above circumstances, and its purpose is to
Electronic watches that display the time on a timetable can selectively display the time on the weekday timetable on weekdays and the time on the holiday timetable on holidays, making it possible to differentiate between weekdays and holidays. To provide an electronic clock that can eliminate errors, fully perform the function as a timetable, and allow smooth use of transportation facilities.

Hereinafter, the present invention will be explained in detail based on an embodiment shown in the drawings. FIG. 1 shows a circuit diagram of an electronic timepiece. Reference numeral 1 denotes an oscillator circuit that generates a reference clock signal. The frequency of the clock signal is divided by a frequency dividing circuit 2 into a signal with a period of 1 second, and this signal with a period of 1 second is input to a counting circuit 3. be done. This counting circuit 3 obtains hour, minute, second, and AM/PM time information based on the 1-second cycle signal, and receives 24 seconds from the counting circuit 3.
The carry signal outputted every hour is given to the date counting circuit 4 and counted. This date counting circuit 4
This is to obtain date information in units of days or more, such as year, month, day, day of the week, etc., based on the carry signal. Then, the time information obtained by the clock counting circuit 3 and the date information obtained by the date counting circuit 4 are input to the display latch circuit 8 via the corresponding AND gate 5 or 6 and OR gate 7 and held there. At the same time, after being decoded by the decoder 9, it is displayed on the display device 10.

Here, the configuration of the display device 10 will be explained with reference to FIGS. 1 and 2. The display device 10 uses liquid crystal as a display element, and has a two-layer structure in which an analog display section 11 shown in FIG. 2 and a digital display section 12 shown in FIG. 2 are laminated. The analog display section 11 is configured to optically display input time information and the like as a pointer (analog display). That is, the analog display section 1
60 first liquid crystal electrode element groups 11a arranged radially and at equal intervals from the vicinity of the circular center of 1, and 60 first liquid crystal electrode element groups 11a arranged outside and on an extension line of these first liquid crystal electrode element groups 11a. 2 liquid crystal electrode element group 11
b, and a PM display body 11c located near the center of the circle. Then, the analog display section 11
The hour is displayed by the first liquid crystal electrode element selected alternatively among the liquid crystal electrode element groups 11a, and the first and second liquid crystal electrode element groups 11
"Minutes" are displayed by a first electrode element selectively selected from among a and 11b and a second electrode element located on an extension of the first electrode element. In addition, weekdays (Monday to Saturday) are clearly indicated on the outside of the analog display section 11.
WEEKDAY display 11d, clearly indicates Sunday
It has a HOLIDAY display body 11e, and further,
On the outer periphery of the analog display section 11, numbers 1, 2, . It is displayed permanently.
Further, the PM display body 11c for AM/PM display lights PM in the afternoon, and does not display anything in the morning. On the other hand, the digital display unit 12 has a 4-digit number display 12a and a 2-digit character display 12b, and time information is displayed by the number display 12a, and time information is displayed by the character display 12b. day of the week information is displayed in alphabetical order.

Next, referring back to FIG. 1, another circuit configuration will be explained. The symbol _S1 switches between a timekeeping information display mode that displays normal timekeeping information, that is, timekeeping information of the clock counting circuit 3 and date information of the date counting circuit 4, and a timetable display mode that displays time information on the timetable. This is a display mode changeover switch. This switch
When the _S1 operation signal is applied to the one-shot circuit 13, the pulse signal output from the one-shot circuit 13 is applied to the T input terminal of the binary flip-flop 14 to invert its output state.
This binary flip-flop 14 is set to the clock information display mode when the output signal on that side is "1", and is set to the timetable display mode when the output signal on the Q side is "1". can be,
The output signal on that side is sent to the AND gates 5 and 6,
In addition, the Q side output signal is the AND gate 15, 1
6 as respective gate release signals.
Further, the operation signal of the switch _S2 is applied to the AND gate 5 via the inverter 17.
The operation signal of the switch _S2 is directly input to the AND gate 6. Therefore, the switch _S2 is used as a changeover switch for switching between displaying the clock information of the clock counting circuit 3 or the date information of the date counting circuit 4 on the display device 10 in the clock information display mode. Further, the operation signal of switch _S2 is given to the one shot circuit 18, and the pulse signal output from this one shot circuit 18 is as follows.
The Q-side output signal of the binary flip-flop 14 is applied to the set terminal S of the RS-type flip-flop 20 via the AND gate 19, which is input as a gate release signal, thereby causing the flip-flop 20 to be set.

On the other hand, the date counting circuit 4 is configured to output a detection signal f when the day of the week information counted by the date counting circuit 4 is Sunday. This detection signal f is passed through an AND gate 16 to a decoder 9.
is input. Then, when the output from the AND gate 16 is obtained, the decoder 9
The 0 HOLIDAY display 11e is driven to display, and when no output is obtained from the AND gate 16, the WEEKDAY display 11d is driven to display. Note that HOLIDAY and WEEKDAY displays are made only in the timetable display mode. Furthermore, the detection signal f output from the date counting circuit 4 is supplied to AND gates 21 and 22 to which only hourly information among the time information output from the clock counting circuit 3 is input. 21 directly, and the AND gate 22 via an inverter 23. Therefore, the AND gate 21 can output the hourly information on Sunday, and the AND gate 22 can output the hourly information on Sunday.
Hourly information can be output on weekdays on Saturdays. The hourly information output from these AND gates 21 and 22 is given to a decoder 24. The decoder 24 is activated by receiving the Q-side output signal of the flip-flop 20 as an operation command signal, and decodes when any hourly information from 1 o'clock to 24 o'clock is given from the AND gate 22. "0" corresponding to the signal
23, and when hourly information is given from AND gate 21, from 1 o'clock
It is configured to output decoded signals "24" to "47" corresponding to 24 o'clock. The signals "0" to "47" output from the decoder 24 are input as row address signals to the row address input terminal L of the RAM 25, where time information on the timetable is stored in advance.

The RAM 25 has 48 rows as shown in FIG.
It is formed into a 60-column matrix, and can store binary "1" or "0" information at each address.
Each row from 24 to 47 corresponds to an hour unit from 0:00 to 23:00, and each column corresponds to a minute unit from 0 minute to 59 minutes. Then, “0” is output from the decoder 24.
Row addresses 0 to 47 are designated in response to the signals .about.47. Therefore, the row addresses 0 to 23 are for storing time information on the weekday timetable.
Further, the row addresses 24 to 47 are for storing time information on the holiday timetable. In addition, RAM25
The setting method for writing the above-mentioned "1" or "0" information to each address is not shown, but input "1" or "0" to the input terminal of the RAM 25 by operating an external operation switch. , a row addressing signal, a column addressing signal, and a write command signal.

Thus, the column address of the RAM 25 is specified by the contents of the sexagesimal counter 26 being applied via the decoder 27. That is, the sexagesimal counter 26 receives a pulse signal (the frequency is, for example, 1024
Hz) φ is input to perform counting operation. Then, the count values 0 to 59 of the sexagesimal counter 26 are decoded by the decoder 27 and applied to the column address input terminal R of the RAM 25.
25 column addresses are specified. In addition,
The decoder 27 operates by receiving the Q side output signal of the flip-flop 20 as an operation command signal.

Further, from the output terminal OUT of the RAM 25, storage information at the address specified by the row address signal of the decoder 24 and the column address signal of the decoder 27 is read out and sequentially written into the shift register (60 bits) 29. shift register 2
The parallel data of each bit written in 9 is held in the display latch circuit 8 via the AND gate 15 and the OR gate 7, and is displayed in analog form on the analog display section 11 of the display device 10.

Also, the AND gate 15 is the flip-flop 1
When the carry signal C is output from the sexagesimal counter 26 while the signal "1" is being output from the Q side output terminal of 4, the restriction is released. Further, the carry signal C from the sexagesimal counter 26 is connected to the reset input terminal R of the flip-flop 20.
is applied to reset the flip-flop 20.

Next, the operation of the electronic timepiece constructed as described above will be explained with reference to FIGS. 4, 1 and 2, FIGS. 5, 1 and 2, and FIGS. 6, 1 and 2. First, the normal timekeeping information display mode, that is, the flip-flop 14
If the switch _S2 is not operated when the side output signal of the flip-flop 14 is "1", the AND gate 5 is deregulated by the side output signal of the flip-flop 14 and the inverted signal of the inverter 17. Time information obtained by the clock circuit 3 is held in a display latch circuit 8 via an AND gate 5 and an OR gate 7, decoded by a decoder 9, and then sent to an analog display section 11 of a display device 10. As a result, the analog display section 11 drives the predetermined electrode elements to display the current time, e.g.
As shown in FIG. 4, 3:00 is displayed in analog form.

In addition, when switch S ₂ is operated in the normal timekeeping information display mode, the AND gate circuit 6 is deregulated while switch S ₂ is operated, and the date information obtained by the date counter circuit 4 is is held in a display latch circuit 8 via an AND gate 6 and an OR gate 7, decoded by a decoder 9, and then sent to a digital display section 12 of a display device 10. As a result, the digital display section 12
displays the current date, for example, "February 10th FR (Friday)" as shown in FIG. 42.

If you want to display the time on the timetable on the display device 10, operate switch _S1 once,
The output state of the flip-flop 14 is inverted by a pulse signal from the one-shot circuit 13, and its Q
Set the side output signal to “1” and switch to timetable display mode. In this state, when switch _S2 is operated once, the pulse signal output from the one-shot circuit 18 is applied to the set input terminal S of the flip-flop 20 via the AND gate 19.
, so flip-flop 20 is set. Therefore, the decoders 24 and 27 become operable, and the AND gate 28 is deregulated. On the other hand, when the signal f is not output from the date counting circuit 4, that is, when the current day of the week is Friday, which is a weekday from Monday to Saturday, the inverting signal of the inverter 23 causes the AND gate 2
2 is deregulated, the hourly information obtained by the counting circuit 3 is given to the decoder 24 via the AND gate 22. Therefore, the decoder 24
gives a decoded output of 0 to 24 corresponding to the input hourly information to the RAM 25, and specifies a row address. That is, for example, if the hour unit of the current time is 3:00 pm as described above, a row address of "15" is specified in the RAM 25. Simultaneously with this row address, the sexagesimal counter 26 starts counting the pulse signal φ taken out from the frequency dividing circuit 2 by releasing the restriction of the AND gate 28. and,
The count value 0 to 59 of the sexagesimal counter 26 is the decoder 27
are sent to and decoded sequentially. Therefore, as the count value of the sexagesimal counter 26 changes sequentially from 0 to 59, the decoder 27 outputs the decoded output from 0 to 59 corresponding to the count value of the sexagesimal counter 26 to the RAM 2.
5 to sequentially address the columns of RAM 25. As a result, the information stored at the designated address, that is, the information of "1" or "0" around 3:00 pm, is sequentially read out from the RAM 25.
The data is written to the shift register 29. Then, when 60 bits of information are written to the shift register 29, a carry signal C is sent from the sexagesimal counter 26.
is output, the flip-flop 20 is reset, and the AND gate 15 is released, so the parallel data of each bit of the shift register 29 is transferred to the display latch circuit 8 via the AND gate 15 and the OR gate 7, and held. be done. Therefore, the time information on the timetable is displayed in analog on the analog display section 11 of the display device 10.
For example, as shown in FIG. 5, "5", "50",
When information "1" is stored in the column address "59", as shown in FIG.
While the electrode elements of the PM display body 11 are driven, the PM display body 11
c is driven to display the 3:00 p.m. time, and the selected second one of the second liquid crystal electrode elements 11b is driven.
The electrode elements are driven to display the minute-by-minute times on the 3:00 p.m. timetable, such as "5 minutes,""50minutes," and "59 minutes." Also, since the Sunday detection signal f is not output from the date counting circuit 4, the fifth
As shown in FIG. 1, the WEEKDAY display 11d is driven to clearly indicate that the displayed time on the timetable is on weekdays.

Therefore, when the signal f is output from the date counting circuit 4, that is, on Sunday, the switch
Operate S ₁ to switch to timetable display mode, and
When you operate Switch S ₂ , the time on Sunday's timetable is displayed. That is, since the AND gate 21 is deregulated by outputting the detection signal f from the date counting circuit 4, the decoder 24 corresponds to the hourly information (0:00 to 23:00) of the counting circuit 3. Give the decoded outputs of 24 to 47 to the RAM 25,
Specify row addresses 24 to 47 of RAM25. Then, as described above, the information stored in the RAM 25 is read out and sent to the display device 10 via the shift register 29, display latch circuit 8, and decoder 9.
and displayed in analog form. For example, when the current time is in the 15:00 range, the row address "39" corresponding to the hourly information of 15:00 is specified in the RAM 25, and the 6th row address in the row address "39" is specified.
As shown in FIG. 2, when information “1” is stored in the column addresses “3”, “8”, and “53”,
As shown in Figure 6 1, the 3:00 p.m. time is displayed, and the time in minutes is ``3 minutes,'' ``8 minutes,'' and ``53 minutes.''
is displayed. In addition, the display device 10 also includes FIG.
As shown in FIG. 2, the HOLIDAY display 11e is activated to clearly indicate that the displayed time on the timetable is for Sunday.

In this way, in the above embodiment, the time on the holiday timetable can be displayed on Sundays, and the time on the weekday timetable can be displayed on Mondays to Saturdays when selected. Furthermore, in the above embodiment, at least the hours and minutes are displayed by switching the time on the timetable that is stored in advance in the analog display section that optically displays the hands. It is possible to display both at the same time.

In the above embodiment, the holiday is Sunday, but the present invention is not limited to this, and may be a national holiday, a holiday during New Year's holidays, or any other holiday stipulated by law.

As described in detail above, the present invention includes counting means 3 and 4 that count the reference signal to obtain current time information and current date information, and output a discrimination signal f indicating whether the current date information is a weekday or a holiday; Time information storage means 25 having a weekday time information storage area for storing time information on the weekday timetable and a holiday time information storage area for storing time information on the holiday timetable.
and addressing means 24, 26, 27 for addressing the storage area of this time information storage means,
Externally operated switch means _S2 is operated by being supplied with a switch signal from this externally operated switch means _S2 , and when the discrimination signal indicates a weekday, the weekday time information storage area of the time information storage means is operated. The time information on weekdays stored by specifying the address is read out, and when the discrimination signal indicates a holiday, the time information on the holiday stored by specifying the address in the holiday time information storage area of the time information. Time information readout control means 18, 19,
20, 28, 21, 22, 23, and display means 29, 15, 7, 8, 9, 10 for displaying the time information read out by the time information readout control means.
The timetable on the weekday is automatically displayed on weekdays, and the time on the holiday timetable is automatically displayed on holidays. It is possible to prevent confusion between weekdays and holidays, and the time table can fully function as a timetable, allowing smooth use of transportation.

[Brief explanation of the drawing]

The drawings show one embodiment of the present invention, and FIG. 1 is a circuit diagram of an electronic timepiece, FIG. 2 1 is a diagram of an analog display section of a display device, and FIG. Part configuration diagram, Figure 3 is RAM
Figure 4.1 is a diagram showing the normal time display. Figure 4.2 is a diagram showing the date display. Figures 5.1 and 6.1 are diagrams showing the storage contents. FIG. 5 2 and FIG. 6 2 are diagrams showing a state in which times on a timetable are displayed, and are diagrams showing a part of the RAM. 1...Oscillation circuit, 3...Counting circuit, 4...
Date counting circuit, 10...Display device, 24...Decoder, 25...RAM, 26...Sexagesimal counter,
27...Decoder.

Claims (1)

[Claims] 1. Counting means for counting reference signals to obtain current time information and current date information, and outputting a discrimination signal indicating whether the current date information is a weekday or a holiday; Time information storage means having a weekday time information storage area for storing time information and a holiday time information storage area for storing time information on a holiday timetable; and addressing means for specifying an address for the storage area of the time information storage means. and an external operation switch means, which is operated by being supplied with a switch signal from the external operation switch means, and when the discrimination signal indicates a weekday, addresses the weekday time information storage area of the time information storage means. read out the stored weekday time information, and when the discrimination signal indicates a holiday, address the holiday time information storage area of the time information and read the stored holiday time information. An electronic timepiece comprising: time information read control means; and display means for displaying time information read by the time information read control means.