JPS6259951B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to the configuration of an automatic gain control circuit (hereinafter referred to as an AGC circuit in the present invention) used in television receivers, etc., and in particular, the present invention relates to the configuration of an automatic gain control circuit (hereinafter referred to as an AGC circuit in the present invention) used in television receivers and the like. It is an object of the present invention to provide a novel configuration of a circuit device for eliminating unstable or erroneous operation. More specifically, when the video detection stage of the receiver is configured with a synchronous detection circuit using a well-known phase-locked loop (hereinafter referred to as synchronous detection in the present invention), the synchronous state and asynchronous state of the phase-locked loop Regardless of the situation, the output signal of the video detection stage, i.e., the video signal in the synchronous state, the beat signal in the asynchronous state, has a function to keep the amplitude of each approximately constant, and a function that does not respond to external pulse noise as described above, or The present invention provides an AGC circuit configuration having a function of significantly reducing the influence of pulse noise.

A typical receiver is equipped with a tuner 1, a video intermediate frequency circuit (hereinafter abbreviated as ViF circuit) 2, a video detection stage 3, a low-pass filter 4, and an AGC circuit 5 as shown in FIG. AGC circuit 5 is a radio frequency (hereinafter abbreviated as RF) amplification stage of tuner 1 and ViF
It operates to control the gain of a predetermined amplification stage in the circuit 2 to keep the amplitude of the output signal of the video detection stage 3 substantially constant with respect to changes in the level of the signal arriving at the tuner 1, and is used for negative modulation. In television receivers, the peak DC level of the video signal obtained at the output end of the video detection stage 3 (the leading edge level of the synchronization signal) is kept approximately constant by using a known peak value type AGC circuit with excellent quick response. A controlling configuration is usually used. The low-pass filter 4 selects only the signal components necessary for normal operation of the AGC circuit from among the synchronization information, video information, and audio information contained in the output signal of the video detection stage 3, and is a well-known filter. It consists of a Miller integration circuit using RC filters or transistors.

It is known that the above-mentioned known AGC circuit malfunctions due to external pulse noise, and various noise cancellation circuits have been proposed to improve this problem. They detect the output signal of the video detection stage 3, that is, the noise component that occurs in the black direction (synchronization signal side) of the video signal, especially the noise component that exceeds the leading level of the synchronization signal (hereinafter abbreviated as black noise). period
This configuration effectively stops the operation of the AGC circuit. However, detection of black noise and noise cancellation in forming a negative feedback loop such as an AGC circuit have various limitations and accompanying drawbacks.

First, the AGC circuit requires DC coupling at all stages, and when noise cancellation is performed, the mode of the AGC loop completely changes from negative feedback to positive feedback. On the other hand, black noise can be detected using amplitude separation type and frequency separation type, but usually, the amplitude separation type is mainly used because of its accurate detection, and the frequency separation type is provided auxiliary. In this case, the noise detection circuit configured with amplitude separation type requires direct current coupling with the video detection stage, and the AGC circuit cannot respond instantaneously if the level of the incoming input signal suddenly increases. The noise cancellation operation may be started when the video signal exceeds the operation start level of the noise detection circuit. Such operation occurs because the input video signal level of the AGC circuit is reduced by the noise cancellation operation even though the incoming input signal increases, or because the noise detection circuit stops the operation of the AGC circuit.
The AGC circuit operates to further increase the gains of the RF amplification stage and ViF amplification stage of the tuner, thereby causing a so-called lockout phenomenon. Therefore, conventional receivers require a new circuit to prevent the occurrence of this lockout phenomenon, and receivers equipped with this have the drawback of deteriorating noise cancellation characteristics.

The second drawback is the same as the first drawback mentioned above.
This is based on the response of the AGC circuit, which means that a margin must be given to the detection level so that the noise detection circuit does not operate in the sync signal portion of the video signal. In particular, when the AGC circuit cannot accurately respond to the fluctuation period of the amplitude of the incoming signal, for example when a flutter phenomenon occurs when an airplane passes by, the above-mentioned margin must be made relatively large. The problem is that the residual component of the noise after cancellation becomes large. In other words, the noise cancellation performance cannot be sufficiently improved.

Next, when applying a synchronous detection circuit that uses a known phase-locked loop in the video detection stage, the AGC
We will explain that a new problem arises due to the low-pass filter placed on the input side of the circuit. In the asynchronous state of the phase-locked loop, the output signal waveform of the video detection stage is significantly different from the waveform of the output signal in known envelope detection or so-called quasi-synchronous detection, which uses the carrier component recovered from the ViF signal. A beat signal waveform is formed, and the frequency of this signal corresponds exactly to the difference between the frequency of the ViF signal and the oscillation frequency of a predetermined oscillator in the phase-locked loop. Therefore, since the aforementioned low-pass filter attenuates the beat signal according to its frequency, the AGC circuit operates to compensate for this and increases the gain of the amplifier stage in the tuner and ViF circuit. This increase in gain becomes larger as the frequency of the beat signal becomes higher.
Since the ViF amplification stage, the video detection stage, and the known phase comparison stage in the phase-locked loop may be brought into an unstable region, a balance between the two is necessary, and therefore the cutoff frequency of the low-pass filter must be There was a drawback that it could not be made low enough.

In the AGC circuit of the present invention, the output DC level of the synchronous detection circuit equivalent to the zero level of the video signal carrier (hereinafter referred to as the video signal carrier a level detection means responsive to amplitude information exceeding the zero level (abbreviated as zero level);
A first constant current circuit for applying a charging or discharging current to a capacitor forming a part of the AGC filter, and a second constant current circuit for applying a discharging or charging current to the capacitor during other periods. , A.G.C.
filtering means, and is configured to cut off electrical coupling between the capacitor constituting the AGC filtering means and the first and second constant current circuits using the output of the level detection means described above. . The AGC circuit of the present invention will be explained in detail below with reference to the drawings, and in each drawing, the same numbers have the same functions.

Figure 2 shows an example of the RF-IF stage of a television receiver equipped with an AGC circuit according to an embodiment of the present invention. A synchronous detection stage 30 is shown that includes an oscillator 31 that generates a synchronized carrier wave and a multiplier 32 that receives the oscillator and the signal from the ViF circuit 2 as inputs. The AGC circuit selects only the amplitude information necessary for AGC operation from the output video signal of the synchronous detection stage 30.The AGC circuit selects only the amplitude information necessary for AGC operation from the output video signal of the synchronous detection stage 30. or the first one for charging the AGC filter 51 during a period including a part of the retrace period.
a charging circuit 52 consisting of a constant current circuit, and a second constant current circuit for discharging the charge of the AGC filter in a part of the retrace period, particularly in a part or all of the synchronizing signal section. Discharge circuit 53 composed of a current circuit
It is equipped with In this circuit, if the output signal of the low-pass filter 4 is extremely small or there is no substantial signal, the charging circuit 52 continues the charging operation.
ViF by increasing the output DC voltage of the AGC filter 51
Amplification stage in circuit 2 or RF-AG amplification circuit 5
4 to increase the gain of the radio frequency amplification stage of the tuner 1, and conversely, if the output signal of the low-pass filter 4 is above a predetermined level, the discharge circuit 5
This device is equipped with a so-called reverse type AGC that operates to reduce the AGC output DC voltage and lower the gain of each amplification stage when the operation starts in step 3, and by increasing the gain of the AGC loop. It has a part of the configuration of a known AGC circuit that operates to maintain the peak level of the synchronization signal at a predetermined DC level and keep the signal amplitude substantially constant.

In the AGC circuit of this embodiment, the first
In addition to the AGC loop, its input terminal is DC-coupled to the output terminal of the synchronous detection stage 30, and all amplitude information exceeding the prescribed white level when receiving a negatively modulated television signal, e.g. A level detection circuit 55 configured to respond to generated white noise or beat signal components, etc. is disposed, and its output is a second level detection circuit 55 that controls the electrical coupling between the AGC filter 51 and the charging and discharging circuits 52 and 53. It has an AGC loop. This arrangement allows the second AGC loop to serve two different functions.

One of them is the noise cancellation operation of the level detection circuit 55, which is performed when the synchronous detection stage 30 correctly performs the video detection operation, in other words, when the oscillator 31 is synchronized with the video carrier wave of the ViF signal. The signal waveform diagram in FIG. 3a is the output signal waveform of the synchronous detection stage 30 in such a state, and shows one cycle of the video signal V ₅ and the noise V _N1 superimposed thereon enlarged on the time axis. It is. The level detection circuit 55 arranged according to the present invention is detected in the direction exceeding the prescribed white level _V1 of the video signal (in the upper direction of the figure).
In this case, white noise V
Detect _N1 . It should be noted here that the noise-related operation of the video detection stage using synchronous detection is significantly different from that of known envelope detection. That is, the frequency components of the pulse noise superimposed on the input signal arriving at the tuner 1 are selected by the tuner 1 and the ViF circuit 2 in the same manner as the television signal, and reach the video detection stage. Since this noise component does not have a fixed phase relationship with the output of the oscillator 31, it is only subjected to the frequency conversion effect by the multiplier 32. Therefore, the noise superimposed on the video signal shown in Figure 3a has a waveform that oscillates irregularly in terms of amplitude and phase in the white and black directions, and black noise and white noise have envelope responses that match in the time domain. becomes. (The figure shows only one period of such noise.) The level detection circuit 55 according to the present invention responds to the white component of such noise and also obtains an envelope response of pulsed noise. Alternatively, the noise pulse is delayed or the noise pulse width is expanded, and waveform processing is performed so that the detected white noise coincides with or includes the noise in the black direction in the time domain. Therefore, the configuration in which the charging and discharging operation to the AGC filter 51 is stopped by the output of the level detection circuit 55 as shown in FIG. Although this circuit stops the operation of the circuit, it is clearly different from conventional circuits in that noise detection is performed using noise in the white direction. In other words, in conventional circuits, due to the presence of the black-direction noise detection circuit, the AGC circuit does not respond quickly to a sudden increase in the incoming input signal, which causes the noise detection circuit to operate, resulting in malfunction of the AGC circuit. However, in the present invention, no matter how much the output video signal of the video detection stage increases, the level detection circuit, that is, the noise detection circuit does not respond to such a video signal, so it is necessary to specially arrange a malfunction prevention circuit. Not only is the noise detection level not only zero, but also the value can be set very close to the white level of the video signal specified when setting the noise detection level, so the AGC has significantly improved noise cancellation performance.
A circuit is provided.

The other function of the second AGC loop described above is to control the beat signal generated at the output terminal when the synchronous detection stage 30 operates as a normal mixing stage, that is, when the oscillator 31 is not synchronized with the video carrier of the ViF signal. This second AGC loop controls the level. The above-mentioned first AGC loop also performs normal processing for the output beat signal of the synchronous detection stage 30.
The AGC operation is the same as that of known AGC circuits, and since the input signal level of the AGC circuit, that is, the output signal level of the low-pass filter 4 is kept constant, the output terminal of the synchronous detection stage 30 In this case, a beat signal that increases or decreases depending on the frequency selection characteristics of the low-pass filter is obtained. On the other hand, the level detection circuit 55 of the second AGC loop is given a detection level higher than the video signal carrier zero level _V2 for the beat signal as shown in FIG. 3b, for example.
Assuming that it responds to a beat signal exceeding the level of V ₃ , it will have at its output a pulse signal that is approximately synchronized with the positive half period of this signal. Here, the width of this pulse signal is such that the beat signal vibrates in an approximately sinusoidal waveform as shown in _FIG. If the _pulse of
This corresponds precisely to the amplitude of the output beat signal. Through the above-described operation, the level detection circuit 55 sends out a control signal having a pulse width corresponding to the amplitude of the beat signal during the half cycle of the beat signal that oscillates around the video signal carrier zero level _V2 , and
Electrical coupling between filter 51 and charging and discharging circuits 52 and 53 is controlled. Therefore, the first AGC loop performs low-pass filtering by discharging near the peak value in the negative direction of the video signal or beat signal output by the low-pass filter 4 and charging during other periods. The above-mentioned second AGC loop operates to keep the negative direction peak value level of the signal at the output end of the wave generator 4 constant, and as a result, the output signal level of the synchronous detection stage 30 increases. The level detection circuit 55 that constitutes the
The first AGC loop operates so as to cause the AGC filter 51 to stop part of the period during which the charging circuit 52 performs the charging operation. As a result, AGC filter 5
1 decreases, and the gain of the amplification stage of the VIF circuit 2 or the FR amplification stage of the tuner 1 decreases. In this way, when the output beat signal of the synchronous detection stage 30 becomes smaller, the width of the output pulse of the level detection circuit 55 becomes narrower, and the charging stop period of the charging circuit 52 is automatically controlled in the direction of decreasing. After repeating these operations, both the first and second AGC loops reach a stable state. That is, the second AGC loop arranged according to the present invention forms an AGC negative feedback loop like the first AGC loop while the synchronous detection stage 30 is operating as a normal mixing stage, and adjusts the amplitude of the beat signal. is controlled so that it remains approximately constant at a desired value. This second AGC loop does not have a low-pass filter placed between the input terminal of the level detection circuit and the output terminal of the synchronous detection stage 30, so it operates according to the amplitude of the beat signal regardless of its frequency. As a result, in the AGC circuit of the present invention controlled by this second loop, the output beat signal of the synchronous detection stage 30 is kept substantially constant regardless of its frequency.

FIG. 5 is a block diagram showing another embodiment of the AGC circuit according to the present invention. This configuration shows that the charging and discharging circuits 52 and 53 are controlled by the level detection circuit 55. That is, when applying the constant current characteristics of active elements such as transistors to the charging circuit 52 and the discharging circuit 53, by cutting off these transistors, the AGC filter 51 and its preceding stage circuit described in the explanation of FIG. (charging and discharging circuits), it is suitable for practical use of the present invention.

FIG. 6 is an example of a specific circuit showing the AGC circuit of the present invention. The PNP type transistor 551 has its base electrode supplied with a signal with the video signal zero carrier level V ₂ shown in FIG. 3 from the synchronous detection stage 30, and the emitter electrode connected to the V A bias voltage 0.7V higher than ₃ is supplied, and a load resistor 55 is connected to the collector electrode.
5 is connected. When the synchronous detection stage 30 normally performs the video detection operation and the video signal shown in _{FIG .} is detected, a negative polarity noise panel is generated in the load resistor 555 connected to the collector electrode, and the noise panel is transmitted to the base electrode of the transistor 553 via the NPN type amplification transistor 552 whose collector electrode is connected to the load resistor 556. A positive noise pulse is supplied to cut off the transistor 563 to eliminate noise. By determining circuit constants such that transistors 551 and 552 reach the saturation region upon detection, known delay and accumulation effects in transistor switching operations can be utilized. In other words, this effect is
For example, the detected white noise is delayed and the pulse width is expanded with respect to the input signal, so that the phase of the detected white noise can be substantially matched with the black noise. A pair of transistors 5 having an active load consisting of resistors 557, 558, a diode 559 and a transistor 560, whose emitters are commonly connected.
61 and 562 constitute a differential amplifier, and the emitter circuit is connected to a constant current source via a transistor 563. Transistor 560 is transistor 56
This is a charging transistor driven by the conduction of 1, and charges a capacitor 564 forming an AGC filter corresponding to the charging circuit 52 of FIG. On the other hand, the transistor 562 discharges the electric charge of the capacitor 564 by its conduction operation, and these charging and discharging operations are performed by comparing the base reference voltage source _E1 of the transistor 562 with the input video signal level of the base of the transistor 561. It is done by twisting. The resistor 558 is selected to be ten to several tens of times larger than the resistor 557, as in the known circuit.
Next, when the synchronous detection stage 30 supplies a beat signal as shown in FIG. 3b to the base electrode of the PNP transistor 551, this transistor 5
51 detects a component exceeding the DC level of V ₃ in the positive half cycle of the beat signal shown in FIG. 4a,
A positive pulse signal as shown in FIG. 4b is supplied to the base electrode of the transistor 553. The pulse width of this pulse signal becomes wider as the amplitude of the beat signal supplied to the base electrode of the transistor 551 increases, and as a result, the cut-off period of the transistor 563 changes with the amplitude of the beat signal. Therefore, the aforementioned charging transistor 560 and discharging transistor 5
62, in response to an undesirable increase in the amplitude of the beat signal, the interruption period becomes longer as shown by _T1 in FIG. In the present invention, the output transistor 553 of the level detection circuit blocks the aforementioned transistor 563 during at least a portion of the positive half period of the white noise or beat signal, thereby blocking both charging and discharging transistors 560 and 562. It is located in Therefore, when a noise arrives, the configuration is to eliminate the noise by retaining the charged charge of the capacitor 564 up to the moment before the noise arrives. On the other hand, when a beat signal arrives, a new AGC negative feedback loop is established to control the conduction angle of the charging transistor 560. It is something that forms. Resistor 5 connected to transistor 561
65 and a capacitor 566 are known Miller integration circuits and constitute the low-pass filter 4 in FIG.

FIG. 7 shows another specific circuit configuration example of the AGC circuit according to the present invention, and unlike the example shown in FIG.
It is configured to be suitable for AGC, that is, the AGC output voltage increases as the incoming input signal increases. In this configuration example, transistor 5
53', 560', 561', 562' and 56
The only difference from FIG. 6 is the conductive polarity of 3'. Therefore, the capacitor 564 of the AGC filter is configured to be charged and discharged by the transistors 562' and 560, respectively, and the charging and discharging transistor 5 is charged and discharged in the same way as in FIG.
62' and 560' are both cut off to hold the charge in the capacitor 564 just before the capacitor 564 to eliminate noise. However, when a beat signal arrives, the conduction angle of the discharge transistor 560' is changed, unlike the operation shown in FIG. Forms a negative feedback AGC loop for control.

As described above, the present invention arranges a level detection circuit that responds to the amplitude of the output signal of the synchronous detection stage in a direction that exceeds the prescribed video signal white level, and uses its output to charge the capacitor of the AGC filter. It is characterized by a configuration that cuts off electrical connection with a charging/discharging circuit that provides a discharge current, and is not limited to the circuit configuration used for explaining the present invention. For example, in the explanation, the level detection circuit has the functions of both a white noise detector and a substantial AGC detector for the second AGC loop, but it goes without saying that these can also be placed separately. It is. Furthermore, even if a known AGC circuit system related to the present invention is equipped with an amplifier consisting of transistors 565, 566, and 567 as shown in FIG. 8, the effects of the present invention will not differ in any way.

The AGC circuit of the present invention significantly improves the noise cancellation effect as described above, or forms a second AGC loop while the synchronous detection stage operates as a mixing stage to keep the amplitude of the beat signal approximately constant, so it is possible to reduce the noise in the low frequency range. The cut-off frequency of the filter can be set sufficiently low, so that
The circuit of the present invention not only has performance advantages such as improved performance of the AGC circuit, but also eliminates the need for a lockout prevention circuit for the AGC circuit, and is also extremely suitable for forming an integrated circuit as shown in the concrete circuit. It is of extremely great industrial value.

[Brief explanation of the drawing]

Figure 1 shows the RF-IF of a known television receiver.
FIG. 2 is a block diagram showing stages according to the present invention.
A main part block diagram of a television receiver equipped with an embodiment of the AGC circuit, FIGS. 3 and 4 are signal waveform diagrams used to explain the present invention, and FIG. 5 is another embodiment of the present invention. Figure 6 is a circuit diagram of an embodiment suitable for reverse type AGC, Figure 7 is a block diagram showing the
The figure is a circuit diagram of an embodiment suitable for forward type AGC, and FIG. 8 is a circuit diagram of an embodiment that can be applied to other AGC circuits. 1... tuner, 2... ViF circuit, 4... low pass filter, 30... synchronous detection stage, 31... oscillator,
32... Multiplier, 51... AGC filter, 52...
...Charging circuit, 53...Discharging circuit, 54...RF-
AGC amplifier circuit, 55...level detection circuit.

Claims (1)

[Claims] 1. AGC for controlling the output signal of a video synchronized detection means using a phase-locked loop to a predetermined level.
a first low-pass filter means which is DC-coupled to the output terminal of the synchronous detection means; and a synchronization signal side of the video signal supplied from the first low-pass filter means. Detect the peak DC level of
An AGC voltage generation circuit including an AGC detector and a second low-pass filter means for converting the output of the AGC detector into a DC signal; and a level detection circuit for detecting amplitude information in a direction exceeding the output DC level of the synchronous detection means equivalent to the signal carrier zero level, and one end of the second low-pass filter means is connected to a reference potential. and a charging circuit and a discharging circuit configured with a constant current circuit, each output terminal being connected to the other end of the capacitor, and the charging circuit and the discharging circuit being An AGC circuit characterized in that one of the AGC detectors is controlled to operate, and the electrical coupling between each output terminal and the capacitor is controlled by a level detection circuit. 2. The AGC according to claim 1, wherein the AGC is configured to substantially stop the operation of the charging circuit and the discharging circuit with amplitude information in a direction exceeding a predetermined DC level detected by the level detection circuit.
circuit. 3. The level detection circuit includes an amplitude detector for detecting amplitude information exceeding a predetermined DC level, and waveform shaping for obtaining a substantially envelope response or extending the pulse width of the output signal of the amplitude detector. The AGC circuit according to claim 1, characterized in that the AGC circuit comprises a circuit. 4. Claim 3, characterized in that the waveform shaping circuit extends the pulse width of the output signal of the amplitude detector using the saturation operation of a transistor amplifier.
AGC circuit described in section.