JPS6259507B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a recording device for recording facsimile signals in a facsimile receiver.

In a conventional facsimile receiver, for example, three recording pens are fixed to an endless belt having a length three times the width of the recording paper at intervals of the width of the recording paper. Then, while rotating the endless belt at a cycle three times the cycle of the facsimile signal, when the recording pen runs on the recording paper, the facsimile signal is supplied to the recording pen to perform recording.

Therefore, in this case, recording distortion occurs unless the recording pens are arranged accurately at each paper width interval, so there is a drawback that very high recording pen mounting accuracy is required.

As described above, the present invention provides a device that can accurately record facsimile signals without increasing the mounting precision of the recording pen.

This will be explained below with reference to the embodiments shown in the drawings.

In FIG. 1, a facsimile signal received by a receiver 1 is sent to a synchronization pulse selection circuit 2 and simultaneously sent to a storage circuit 3.

The synchronization pulse selection circuit 2 selects the synchronization pulse Ps from among the facsimile signals (FIG. 2a). For example, the synchronization pulse Ps is selected by integrating the facsimile signal a.

The selected synchronization pulse Ps is sent to the reset terminal of the write counter 4 to reset its count value.

The write counter 4 counts the clock pulses sent from the frequency divider circuit 5. Then, the frequency dividing circuit 5 divides the frequency of the clock pulse sent out by the clock pulse generating circuit 6, and divides the frequency of the clock pulse into one part of the facsimile signal a.
At period To, an n-bit clock pulse (FIG. 2b) is sent to the write counter 4 as a write pulse. Further, the frequency dividing circuit 5 sends out the clock pulse (FIG. 2c) obtained from the frequency dividing process to the read counter 7 as a read pulse.
Read pulse c is one period of facsimile signal a
nk bits are sent to To.

The write counter 4 counts the write pulses b and sends the counted value as a binary code signal to the storage circuit 3 via the changeover switch 8.

On the other hand, the read counter 7 similarly counts the read pulses c and sends the counted value to the storage circuit 3 via the changeover switch 8 as a binary code signal.

The storage circuit 3 has a storage section for n sections from the first to the nth section, and when the count value of the write counter 4 changes from "0" to "n-1", each section from the first to the nth section is stored. Storage units are specified in order. Then, the facsimile signal led from receiver 1 is
The count value of the write counter 4 is guided to and stored in the designated storage section.

The count value of the write counter 4 is reset when the synchronization pulse Ps is selected. and,
After being reset, write pulses are counted, and when n bits have been counted, it is reset again.

Therefore, the write counter 4 receives the synchronization pulse
It is reset every Ps, and the 1 of facsimile signal a
Count n bits every cycle To. Therefore, one cycle To of the facsimile signal a is divided into n sections, and the signal for each section is stored in the first section of the storage circuit 3.
The data is sequentially distributed and stored from the partition to the n-th partition.

After the facsimile signal a is stored as described above, when the count value of the read counter 7 is applied, the storage circuit 3 sends out the storage signal of the section corresponding to the count value of the read counter 7. A read counter 7 counts read pulses c. Since the read pulse c has a repetition frequency k times that of the write pulse b, the read counter 7 reads the stored signal at a speed k times as fast as the write counter 4.

The count value of the write counter 4 and the count value of the read counter 7 are switched by a switch 8, and either count value is guided to the storage circuit 3.

The switch 8 performs a switching operation in response to a switching pulse sent from the write counter 4. As shown in FIG. 3d, the switching pulse is generated in coincidence with the write pulse so that its pulse width Tw is smaller than 1/k of the period To/n of the write pulse b. Then, the switch 8 guides the count value of the write counter 4 to the storage circuit 3 during the pulse duration Tw of the switching pulse d, and guides the count value of the read counter 7 to the storage circuit 3 during other times T _R .

Therefore, within the time To/n obtained by dividing one cycle To of the facsimile signal a by n, the memory circuit 3
As a result of performing storage and read operations in a time-sharing manner,
A storage operation and a read operation are performed in parallel throughout one period To of the facsimile signal a. Since the read pulse c has a repetition frequency k times higher than that of the write pulse b, the read operation is performed at a speed k times higher than the storage operation.

The storage signal read out from the storage circuit 3 is sent to the recorder 9.
be led to.

The recorder 9 includes an endless belt 91, a recording pen 92,
It is composed of an energizing rail 93 and recording paper 94.

The endless belt 91 has a length k times the effective recording width W of the recording paper 94, and is connected to the electric motor 9 via a speed governor 95.
6, it is rotated at the same period as the period To of the facsimile signal a. Further, a recording pen 92 is fixed to the endless belt 91, and when the recording pen 92 is fed over the recording paper 94, a recording signal is supplied to the recording pen 92 via the current-carrying rail 93.

A storage signal read out from the storage circuit 3 is supplied as the recording signal. That is, when the recording pen 92 reaches the recording start position on the recording paper 94, a pulse wave is emitted from the cam switch 97, and the read counter 7 is reset by this pulse wave.

Since the read counter 7 starts counting anew after being reset, the memory contents of the memory circuit 3 are
The data is sequentially read from each section and supplied to the recording pen 92.

The endless belt 91 has a length k times the effective recording width w, and rotates at a period To. Therefore, the recording pen 9
2 travels the effective recording width w, the time To/k is n.
Since the bit read pulse c is generated, when the recording pen 92 travels from the recording start position to the recording end position on the recording paper 94, the entire stored contents of the memory circuit 3 are supplied to the recording pen 92. Therefore, one cycle of the facsimile signal a is recorded on the recording paper.

In the above, the recording operation of the recording pen 92 and the writing operation of the facsimile signal a to the storage circuit 3 do not necessarily have to match in phase;
It is possible to perform ideal recording by performing phase synchronization.

That is, when the recording operation of the recording pen 92 is performed, as shown in the recording waveform of FIG.
When reading is performed for To/k time from an arbitrary time within the cycle, the count value of the read counter 7 changes from 1 to n from the rise to the fall of the recording waveform e. On the other hand, the count value of the write counter 4 changes from 1 to n every cycle of the facsimile signal a.

Therefore, when comparing the count value of the write counter 4 and the count value of the read counter 7, it is found that the count value of the write counter 4 is ahead when the count of the read counter 7 starts (at the rising edge of the recording waveform e). On the other hand, when the reading counter 7 finishes counting (at the falling edge of the recording waveform e), the count value of the reading counter 7 is ahead.

This means that when the read counter 7 starts counting, the current period of the storage signal written by the write counter 4 is read out, whereas
This indicates that the storage signal of the previous cycle is read out when the reading counter 7 finishes counting. Therefore, on the recording paper 94, when the count value of the read counter 7 and the count value of the write counter 4 match, the facsimile signal of the current cycle is recorded before the match, and the facsimile signal of the previous cycle is recorded after the match. facsimile signals are recorded.

Therefore, consider a case where the falling edge of the recording waveform e' is made to coincide with the synchronization pulse Ps, as shown in e' in FIG. 2.
In this case, the count value of the write counter 4 precedes the count value of the read counter 7 for one period of the facsimile signal a. Therefore, from the time when the reading counter 7 starts counting until it ends, the current period's storage signal is read out and recorded on the recording paper 94. Therefore, in this case, facsimile signals having a common cycle can be recorded while the recording pen 94 travels from the starting end to the ending end.

Also, as shown in Figure 2 e'', even if the rising edge of the recording waveform matches the synchronization pulse Ps, it is possible to record a facsimile signal with a common cycle in the same way as above.However, in this case, the write counter 4P
Since the count value of the read counter 7 always precedes the read counter 7, the read counter 7 always reads the stored signal of the previous cycle.

As mentioned above, in order to match the recording operation and the writing operation to the memory circuit 3, the cam switch 9
Pulse wave generated in 7 and synchronous pulse selection circuit 2
If the rotational phase of the motor 96 is controlled so that the synchronization pulse selected in Ps coincides with the synchronization pulse Ps, the rising edge of the recording waveform can be made to coincide with the synchronization pulse Ps, as shown in FIG. As shown in Figure 2 e', in order to match the falling edge of the recording waveform with the synchronization pulse, when the count value of the read counter 7 reaches n, a pulse wave is sent out, and this pulse wave and the synchronization pulse Ps What is necessary is to control the rotational phase of the electric motor 96 so that they match.

The comparison circuit 10 performs the above-mentioned comparison operation, and when the rising edge of the recording waveform e'' is to match the synchronization pulse Ps, it performs comparison matching control between the pulse wave and the synchronization pulse Ps for the count value n of the read counter 7. , the falling edge of the recording waveform e′ is synchronized with the pulse Ps
If the pulse wave of the cam switch 97 and the synchronizing pulse Ps are to match, control is performed to compare and match the pulse wave of the cam switch 97 and the synchronizing pulse Ps.

As explained above, in the present invention, since the facsimile signal is temporarily stored and recorded, there is no need to maintain the mounting accuracy of the recording pen as high as in the prior art.

Furthermore, since storage and reading are performed in parallel in the memory circuit 3 as a set of memory circuits, the circuit configuration of the memory circuit can be extremely simplified.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of this invention.
FIGS. 2 and 3 show waveform diagrams for explaining the operation.

Claims (1)

[Scope of Claims] 1. A storage unit having n partitions from 1st to nth,
A storage circuit in which writing and reading to and from each partition storage section are performed independently for each storage section, and one period of a facsimile signal transmitted for a period of T ₀ at a period of T ₀ is divided into n intervals from the 1st to the nth. a writing circuit that divides and writes each section signal to a section storage section with a corresponding number of the storage circuit; a recorder that travels; and a readout circuit that sequentially reads the stored contents of each of the first to nth partition storage sections of the storage circuit and guides the recording pen to the recording pen while the recording pen travels a recording section on the recording paper. Equipped with a facsimile receiver.