JPS625359U - - Google Patents

Info

Publication number
JPS625359U
JPS625359U JP9379985U JP9379985U JPS625359U JP S625359 U JPS625359 U JP S625359U JP 9379985 U JP9379985 U JP 9379985U JP 9379985 U JP9379985 U JP 9379985U JP S625359 U JPS625359 U JP S625359U
Authority
JP
Japan
Prior art keywords
output signals
computers
computer
absence
loop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9379985U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP9379985U priority Critical patent/JPS625359U/ja
Publication of JPS625359U publication Critical patent/JPS625359U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Debugging And Monitoring (AREA)
  • Multi Processors (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例を示す回路構成図、
第2図は第1図に示した各マイコンから出力され
るパルス信号を表すタイムチヤート、第3図はプ
ログラム暴走時における第1図に示したウオツチ
ドグ回路への入力信号及びウオツチドグ回路から
の出力信号を表すタイムチヤートである。 1,2,3,4はマイクロコンピユータ、5は
コンピユータシステム、6はウオツチドグ回路で
ある。
FIG. 1 is a circuit diagram showing an embodiment of the present invention;
Figure 2 is a time chart showing the pulse signals output from each microcomputer shown in Figure 1, and Figure 3 is the input signal to the watchdog circuit shown in Figure 1 and the output signal from the watchdog circuit when the program runs out of control. This is a time chart that represents. 1, 2, 3, and 4 are microcomputers, 5 is a computer system, and 6 is a watchdog circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 前段に設けたコンピユータからの出力信号を受
けることにより出力信号を発する複数のコンピユ
ータをループ状に接続し、上記何かのコンピユー
タと接続され、そのコンピユータからの出力信号
の有無を検知する検知手段を設けたことを特徴と
するプログラム暴走検知装置。
A plurality of computers that emit output signals by receiving output signals from a computer provided in the previous stage are connected in a loop, and a detection means is connected to one of the computers mentioned above and detects the presence or absence of an output signal from that computer. A program runaway detection device is provided.
JP9379985U 1985-06-20 1985-06-20 Pending JPS625359U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9379985U JPS625359U (en) 1985-06-20 1985-06-20

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9379985U JPS625359U (en) 1985-06-20 1985-06-20

Publications (1)

Publication Number Publication Date
JPS625359U true JPS625359U (en) 1987-01-13

Family

ID=30956683

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9379985U Pending JPS625359U (en) 1985-06-20 1985-06-20

Country Status (1)

Country Link
JP (1) JPS625359U (en)

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