JPS6253351B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a space signal generating device for controlling the space between adjacent numbers in numerical data printed and displayed using a dot matrix.

Generally, in an electronic desktop calculator with a printer, the numerical data above the decimal point in one line of numerical data is printed as one-digit data using a code separated by three digits. For this reason, in a dot printer that can print 11 digits per line, if you print in 3-digit increments as shown in Figure 1A, only 8 significant digits can be printed. As a result, the number of digits for calculations is limited to eight, resulting in a disadvantage that the number of significant figures printed is small. Furthermore, as shown in FIG. 1B, if printing is performed without three-digit separation, ten significant digits can be printed, but the scale is not clear, making it difficult to read.

This invention was made based on the above-mentioned circumstances, and its purpose is to provide a space equal to the number of dots between every three digits of numbers above the decimal point, and to space between other adjacent numbers. A space signal generator capable of displaying a large number of significant digits even when displaying numerical data in 3-digit divisions by outputting the numerical data by creating spaces for a small number of dots. The goal is to provide the following.

Hereinafter, one embodiment of the present invention will be explained based on FIGS. 2 to 4. Figure 2 is a diagram showing the main circuit configuration of this invention applied to an electronic desk calculator with a printer. Indicates a printer. 1 is a print buffer that stores one line of print data, and when a shift signal O/ _B is given from the CPU (not shown) via an OR circuit 2, it is output in synchronization with this shift signal.
4-bit parallel data for one digit sent from the CPU is written as print data. Thereafter, each time a one-shot signal is input to the print buffer 1 via the OR circuit 2, print data is transferred to the decoder 3 one digit at a time. The decoder 3 decodes the input data and outputs it to the character generator 4. Also, if the input data is decimal point data, it detects this and sends the detection signal to the S of FF5.
Output to the side input terminal. This FF5 set output Q
is output to the AND circuit 6.

The character generator 4 stores various character patterns such as numbers, decimal points, symbols, etc., and a pattern signal according to one digit worth of data input from the decoder 3 is transmitted through 5 x 7 signal lines. Output for each of a ₁ to g ₅ . In other words, each set of seven signal lines a ₁ to g ₁ ,...a ₅
From ~ _g5 , dot pattern signals necessary for printing one column of the print head are sequentially output. Each output line a ₁ to a ₅ ,...g ₁ to a set of five output lines
The dot pattern signal from _g5 is input to the corresponding gate circuits ₁₃₁ to ₁₃₇ .

By the way, when the print head moves by one dot, a print position signal Tp is output from the print head position detection section (not shown), and this signal Tp is input to the binary counter 14 constructed by connecting five flip-flops. do. Then, a signal corresponding to the count value of the binary counter 14 is input to the decoder 15 via signal lines _l1 to _l5 . This decoder 15
depends on the signal input through signal lines L ₁ to _{L 5} ,
2 through the corresponding signal line among signal lines m ₁ to m ₁₉
Outputs a value logic “1” signal. The "1" signal via the signal lines _m1 to _m6 among the signal lines _m1 to _m19 is sent to the gate circuit ₁₆₁ through the signal lines _m7 to m19.
The “1” signal via _m12 is sent to the gate circuit ₁₆₂ ,
Signals via signal lines m ₁₃ to _{m 18} are sent to the gate circuit 16
_Furthermore , the "1" signal via the signal line _m18 is input to the AND circuit 22, and the "1" signal via the signal line _m19 is input to the AND circuit 23. The "1" signal outputted from each AND circuit 22, 23 resets each flip-flop of the binary counter 14 via an OR circuit 24. On the other hand, each of the signal lines m ₁ , m ₇ , m ₁₃
through. “1” signal is the corresponding gate circuit 16
₁ , 16 ₂ , 16 ₃ and further via the signal line n ₁ to the gate circuits 13 ₁ to 13 ₇ to open the gates connected to the signal lines a ₁ to g ₁ and via the OR circuit 18. Each gate 1 of the gate circuit 19
Open 9 ₁ to 19 ₇ . Similarly, each signal line
The “1” signal via m ₂ , m ₈ , m ₁₄ connects each gate connected to the signal lines _{a 2} to g _{2 via the signal line n 2} to each of the signal lines m ₈ , m ₉ , m ₁₅ The "1" signal via the signal line _n3 connects each gate connected to the signal lines _a3 to _g3 , and the "1" signal via the signal lines _m4 , _m10 , _m16 connects the gates connected to the signal lines a3 to g3. Each gate connected to the signal lines _a4 to _g4 via the signal line _n4 is connected to each of the signal lines _m5 , _m11 ,
The " ₁ " signal via the signal line _n5 opens each gate connected to the signal lines _a5 to _g5 , and each "1" signal passes through the OR circuit 18 to the gate circuit 19. Open each gate.

Five output lines output from each of the gate circuits 13 ₁ to 13 ₇ and the gate circuits 19 ₁ to 19 ₇
The corresponding output lines of are connected by wired OR, respectively, and the corresponding AND circuits 20 ₁ to 20
Enter ₇ . On the other hand, each of the gate circuits 19 ₁ -
A “1” signal of a predetermined voltage value is applied to 19 ₇ ,
Further, a print timing signal O/ _P is input to each of the AND circuits 20 ₁ to 20 ₇ . Then, print drive signals _P1 to _P7 are outputted from each AND circuit 201 to ₂₀₇ according to the print timing signal _O / _P .
is output to the print head to drive a predetermined print element.

Further, the "1" signal via the signal lines m ₆ , m ₁₂ , m ₁₈ is input to the S-side input terminal of the FF 21a and the AND circuit 21b via the signal line n ₆ . This FF
21a and AND circuit 21b are one shot circuit 2
1, and the Q output of the FF 21a is input to the AND circuit 21b. On the other hand, the signal O/ ₁ , which is synchronized with the print position signal T _P and delayed from the signal T _P , is input from the CPU to the R side input terminal of the FF 21a, and furthermore, the signal O/ ₁ is input to the AND circuit 21b and the FF
It is also input to the R side input terminal of No. 11. The one-shot signal generated by the one-shot circuit 21 is sent to the print buffer 1 via the OR circuit 2.
and further output to the AND circuit 6. The output of the AND circuit 6 is applied to the set side input terminal of a flip-flop circuit (hereinafter abbreviated as FF) 26. The set side output of this FF 26 is input to one side of an AND circuit 27. The signal line m ₃ is inputted to the other side of the AND circuit 27 . And the output of this AND circuit 27 is FF2
It is applied to the set side input terminal of 8. Said FF26
A print start signal PS sent from the CPU is input to the reset side input terminal of the FF 28. Furthermore,
The output signal from the reset output terminal of the FF 28 is sent to the AND circuit 23 and to the inverter circuit 2.
9 to the AND circuit 22.

Next, the operation of this invention will be explained. now,
The print head is at the print start position, and the timing signal O/ _B from the CPU is input to the print buffer 1 via the OR circuit 7, and numeric data "09, 87654321" is sequentially sent to the print buffer in synchronization with this signal O/ _B . Written to 1. Next, a print start signal PS is sent from the CPU, the motor for driving the print head is operated, and FF 26 and FF 28 are reset. Further, the numerical data "0" to be printed in the first digit is transferred to the decoder 3. The decoded output of the decoder 3 is input to the character generator 4. Also, the print position signal T _P is input from the print head position detection section to the binary counter 14, and as a result, the content of the binary counter 14 becomes "10000", and a "1" signal is output from the signal line _l1 to the decoder 15. . Then, a "1" signal is output from the decoder 15 via the signal line _m1 , and the signal is output from the gate circuit ₁₅₁ to the gate circuit ₁ via the signal line n1.
The gates connected to the signal lines a ₁ to _{g 1} of 3 ₁ to 13 ₇ are opened, and each gate of the gate circuit 19 is opened via the OR circuit 18 . However, gate circuit 1
3 ₂ to 13 ₆ , “1” signals of predetermined voltage values are input to AND circuits 20 ₂ to 20 ₆ . Next, the print timing signal O/ _P is sent to each AND circuit 20 ₁ to 20 ₇
At the same time, the print drive signal "0111110" is given to the print head, and as shown in Figure 3, the numerical data "0" is output to the first column of the first digit of the recording paper.
After one column of dots has been printed, the print head moves to the second column of the first digit.

Next, the second printing position signal T _P is input to the binary counter 14, and the count becomes "00010", and as a result, a "1" signal is output via the signal lines l ₂ , m ₂ , n ₂ The gates connected to the signal lines a ₂ to _{g 2} and the gates 19 ₁ to ₁₉₇ are opened. Then, when the second print timing signal O/ _P is output, the print drive signal "100001" is output from the AND circuits ₂₀₁ to ₂₀₇ , and as a result, the numerical data "0" is displayed in the second column of the recording paper. A second printing is performed, after which the print head moves to the third column. Similarly, as a result of outputting the third print position signal T _P , a “1” signal is output via the signal lines l ₁ , l ₂ , m ₃ , n ₃ and the AND circuits 20 ₁ to 20 ₇ print. The drive signal "100001" is output and the recording paper is
The column is printed. At this time, the "1" signal is also input to the AND circuit 27, but since the "0" signal is applied to the other input terminal of the AND circuit 27, no signal is output from the AND circuit 27. In exactly the same way, each time the 4th and 5th print position signals T _P are applied, a "1" signal is output via the signal lines n ₄ and n ₅ , and as a result, the 4th and 5th columns are printed on the recording paper. Printing is performed sequentially from column to column, and printing of numeric data "0" is completed.

Next, when the sixth print position signal T _P is output, a “1” signal is output from the decoder 15 via the signal line n ₆ and the FF 21 of the one shot circuit 21 is output.
a is set, and this Q output is input to the AND circuit 21b. At the same time, signal O/ ₁ changes to FF21a.
The result output to the R-side input terminal of the AND circuit 21b and the R-side input terminal of the FF5 is the AND circuit 21b.
From there, a one-shot signal is input to the print buffer 1 via the OR circuit 2, and the next numerical data "9" stored in the print buffer 1 is transferred to the decoder 3. At the same time, the one shot signal is also input to the AND circuit 6, but since the Q output of the FF5 is "0", no signal is output from the AND circuit 6. At this time, even if the print timing signal O/ _P is output to each AND circuit ₂₀₁ to ₂₀₇ , the print drive signal is not output, so the print head moves to the 7th column without printing on the 6th column. As a result, a space is created in the sixth column of the recording paper.

Next, when the seventh print position signal is output,
The content of the binary counter 14 becomes "00111", and a "1" signal is input to the AND circuit 23 via the signal line _m19 , and the output from the AND circuit 23 resets the binary counter 14 via the OR circuit 24. . During this time, since no print drive signal is output, the print head moves to the eighth column of the recording paper without performing a printing operation. As a result, a space is created in the seventh column.

Next, each time the 8th to 12th printing position signals T _P are sequentially output, the binary counter 14 starts counting from "1", so the signal is output via the signal lines n ₁ to n ₅ in exactly the same manner as described above. As a result, the numerical data "9" is printed as data for one digit in the 8th to 12th columns of the recording paper. When the 13th print position signal is output, a "1" signal is sent to the one-shot circuit 21 via the signal line _n6 .
As a result, a one-shot signal is outputted and inputted to the print buffer 8 via the OR circuit 2, and the decimal point data is transferred to the decoder 3 as the next print data. Then, the decoder 3 decodes the decimal point data and sends it to the character generator 4.
At the same time, a detection signal is output to the S-side input terminal of the FF 5, and as a result, a "1" signal is output from the output terminal Q of the FF 5 to the AND circuit 6. At this time, the print head moves to the 14th column and prints on the recording paper.
The 13th column creates a space. Next, when the 14th print position signal T _P is output, a reset signal is input to the binary counter 14 via the signal line m ₁₉ , the AND circuit 23, and the OR circuit 24, and the A space will be created in the 14th column.

In exactly the same manner as described above, the 15th to 19th print position signals are sequentially output, and as a result, a decimal point is printed on the recording paper. Next, when the 20th print position signal T _P is output, the one shot signal is input to the print buffer 1 via the signal line n ₆ and the one shot circuit 20, and the next print data "8" is transferred to the decoder 3. At the same time, a "1" signal is input to the AND circuit 27 to set the FF 26 via the AND circuit 6. Next, as a result of the output of the 21st print position signal T _P , the binary counter 14 is reset, creating spaces in the 20th and 21st columns of the recording paper.

Next, the 22nd and 23rd print position signals T _P are output, and the 22nd and 23rd columns are printed on the recording paper, and then when the 24th print position signal is output, the signal The "1" signal output via line _n3 passes through AND circuit 27 and sets FF28. As a result, a "0" signal is output from the output terminal of the FF 28 to the AND circuit 23, and further to the AND circuit 22.
A “1” signal is input to. Then, as a result of outputting the 24th to 26th print position signal T _P , printing of numerical data "8" is completed, and then a one shot signal generated by outputting the 27th print position signal T _P Then, the next numerical data "7" is written into the decoder 3, creating a space in the 27th column of the recording paper. Next, as a result of the output of the 28th print position signal T _P , a "1" signal is input to the AND circuit 23 via the signal line _m19 , but since the AND circuit 23 does not output a "1" signal, the binary counter 14 is not reset. At this time, the signal line m ₇
The “1” signal via the gate circuit 16 ₂ and the signal line
Since the gates of the signal lines _a1 to _g1 are released through _n1 , the numerical data "7" is set to 1 in the 28th column of the recording paper.
Columns are printed. Next, when the 29th to 32nd print position signals T _P are output, the count value of the binary counter 14 is sequentially counted from "8" to "11".
The "1" signal that has passed sequentially through the signal lines _m8 to _m11 passes through the gate circuit ₁₆₂ , passes through the signal lines _n2 to _n5 , and releases the corresponding gates. The numerical value "7" is printed. Next, as a result of the output of the 33rd print position signal T _P , the next print data "6" is written in the decoder 3, creating a space for one column on the recording paper. When the 34th to 38th print position signals T _P are sequentially output in exactly the same manner as described above, the count value of the binary counter 14 becomes "13".
~ Since it is counted sequentially to "17", the signal line m ₁₃ ~
The “ ₁ ” signal sequentially passes through the gate circuit 16 ₃
The corresponding gates are sequentially released through the signal lines _n2 to _n5 , and the numerical value "6" is sequentially printed on the recording paper.

Next, when the 39th to 41st print position signals T _P are output, the count value of the binary counter 14 becomes "18".
~ “20”, and during this time, the “1” signal is not output from the decoder 15, so the recording paper 39 ~
There will be a space in the 41st column. Next, the output of the 42nd print position signal T _P causes the binary counter 1 to start.
4 becomes "21", the binary counter 14 is reset by the "1" signal outputted via the signal line m ₁₈ , the AND circuit 22, and the OR circuit 24, and at the same time, the binary counter 14 is reset by the signal line m ₁₈ and the gate circuit 1
6 ₃ , a one shot signal is input to the print buffer 1 via the signal line n ₆ and the one shot circuit 21, and the next print data “5” is transferred to the decoder 3. At this time, a space is created in the 42nd column of the recording paper.

Thereafter, as mentioned above, the binary counter 14
As a result of repeatedly operating as a 21-decimal counter,
As shown in Figure 4A, after printing the decimal point data,
Each time data for one digit is printed, a space for one column (one dot) is generated, and after the third digit data is printed, a space for four columns (four dots) is generated. In this way, when all the data for 11 digits per line is printed, the recording paper is fed by one line and the print head returns to the print start position, and then the timing signal O/ _B is output and the next print is started. The print data of the line is transferred. When the decimal point is at the lowest digit, the same operation as above is performed, and the fourth
As shown in Figure B, the decimal point is printed first, and subsequent numeric data is printed with four columns of space between every three digits, and one column of space between adjacent digits. .

In the above embodiment, the case where the data is printed is shown, but the same can be applied to the case where the data is displayed on a display device having a dot matrix structure.

As explained above, according to the present invention, the decimal point data is detected from the numerical data for one display, and a space larger than a predetermined dot row is generated for every three digits of the numerical value above the decimal point, and the numerical data is Since we have provided a space signal generating device that generates a space of a predetermined dot row between other digits, numerical data can be displayed or displayed in 3-digit divisions without reducing the number of display digits on the display or the number of digits printed on the printer. Can be printed. Therefore, the displayed significant figures are the same as before, and the display is separated into three digits, making it easier to read and very convenient.

[Brief explanation of the drawing]

1A and 1B are diagrams of the printing state of conventional numerical data, FIG. 2 is a circuit diagram of the main part showing an embodiment of the present invention, and FIG. 3 is a partial diagram showing the printing state of the same embodiment in detail. , and FIGS. 4A and 4B are diagrams showing the printing state of one line of the same embodiment. 1...Print buffer, 3...Decoder, 4...Character generator, 21a...Flip-flop,
14...Binary counter, 21...One shot circuit.

Claims (1)

[Claims] 1. A first signal generating circuit that generates a first space signal for a predetermined number of dots, and a second signal generating circuit that generates a second space signal for a larger number of dots than the first space signal; The decimal point data is detected from the printed data consisting of a series of numeric data, and the second space signal is introduced for every third digit of the number greater than or equal to the decimal point data, and the first space signal is applied to the other digits. 1. A space signal generating device comprising: a control means for controlling the space between adjacent characters by controlling the space between adjacent characters; and an output means for outputting the numerical data according to the control means.