JPS6248052U - - Google Patents

Info

Publication number
JPS6248052U
JPS6248052U JP13851085U JP13851085U JPS6248052U JP S6248052 U JPS6248052 U JP S6248052U JP 13851085 U JP13851085 U JP 13851085U JP 13851085 U JP13851085 U JP 13851085U JP S6248052 U JPS6248052 U JP S6248052U
Authority
JP
Japan
Prior art keywords
ram
data
address
absolute
timing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13851085U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP13851085U priority Critical patent/JPS6248052U/ja
Publication of JPS6248052U publication Critical patent/JPS6248052U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図及び第2図はこの考案の一実施例を示す
もので、第1図は回路構成を示すブロツク図、第
2図は動作の処理内容を示すタイミングチヤート
、第3図乃至第5図は回転ヘツド方式のデジタル
・オーデイオ・テープレコーダの構成を示すもの
で、第3図aは記録/再生ヘツド部の構成を示す
図、第3図bはこの第3図aの記録/再生ヘツド
部に対応した磁気テープ上の記録パターンを示す
図、第4図は磁気テープに書込まれるトラツクフ
オーマツト及びこのトラツクのPCMエリアのブ
ロツクフオーマツトの概略構成を示す図、第5図
は第1RAM、第2RAMに記憶されるデータの
構成を示す図である。 1…記録/再生ヘツド部、1a…回転ドラム、
2…DATテープ、11…第1RAM、12…第
2RAM、13…A/D変換器、14…システム
制御部、15,24〜26…データバス、16…
セレクタ、17…インタリーブアドレス発生器、
18…ECC制御部、19,21〜23…アドレ
スバス、20…ECC・絶対アドレス発生器。
Figures 1 and 2 show an embodiment of this invention, with Figure 1 being a block diagram showing the circuit configuration, Figure 2 being a timing chart showing the processing details of the operation, and Figures 3 to 5. 3 shows the structure of a rotary head type digital audio tape recorder, FIG. 3a shows the structure of the recording/playback head section, and FIG. 3b shows the structure of the recording/playback head section of FIG. 3a. FIG. 4 is a diagram showing a schematic structure of the track format written on the magnetic tape and the block format of the PCM area of this track. FIG. 5 is a diagram showing the recording pattern of the first RAM, FIG. 3 is a diagram showing the structure of data stored in a second RAM. 1... Recording/playback head section, 1a... Rotating drum,
2...DAT tape, 11...1st RAM, 12...2nd RAM, 13...A/D converter, 14...system control unit, 15, 24-26...data bus, 16...
Selector, 17...Interleave address generator,
18... ECC control unit, 19, 21-23... Address bus, 20... ECC/absolute address generator.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 第1RAM及び第2RAMを有し、音声信号を
PCM化したデジタルデータを上記第1RAM、
第2RAMに交互に書込むと共に、書込まれてい
ない側の第1RAMあるいは第2RAM内のデー
タに対してECCを付加し、これを読出した回転
ヘツドによりテープ上に記録するデジタル・オー
デイオ・テープレコーダにおいて、上記第1RA
M、第2RAM内でPCMデータ及びECCの書
込まれない空白領域を指定するアドレス指定手段
と、このアドレス指定手段により指定された第1
RAM、第2RAMのアドレス位置に絶対アドレ
スデータを書込む絶対サドレス書込み手段と、こ
の絶対アドレス書込み手段による書込み動作をE
CCを付加する前のタイミングで行なうように制
御するタイミング制御手段とを具備したことを特
徴とする絶対アドレス記録装置。
It has a first RAM and a second RAM, and the digital data obtained by converting the audio signal into PCM is stored in the first RAM,
A digital audio tape recorder that alternately writes data to the second RAM, adds ECC to data in the first RAM or second RAM on the unwritten side, and records the data on the tape using the rotating head that reads it. In the above first RA
M, an addressing means for specifying a blank area in the second RAM where PCM data and ECC are not written, and a first address designated by this addressing means.
RAM, an absolute sadless write means for writing absolute address data into the address position of the second RAM, and a write operation by this absolute address write means.
1. An absolute address recording device comprising: timing control means for controlling the timing to be performed at a timing before adding a CC.
JP13851085U 1985-09-10 1985-09-10 Pending JPS6248052U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13851085U JPS6248052U (en) 1985-09-10 1985-09-10

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13851085U JPS6248052U (en) 1985-09-10 1985-09-10

Publications (1)

Publication Number Publication Date
JPS6248052U true JPS6248052U (en) 1987-03-25

Family

ID=31043558

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13851085U Pending JPS6248052U (en) 1985-09-10 1985-09-10

Country Status (1)

Country Link
JP (1) JPS6248052U (en)

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