JPS6247139U - - Google Patents
Info
- Publication number
- JPS6247139U JPS6247139U JP1985139233U JP13923385U JPS6247139U JP S6247139 U JPS6247139 U JP S6247139U JP 1985139233 U JP1985139233 U JP 1985139233U JP 13923385 U JP13923385 U JP 13923385U JP S6247139 U JPS6247139 U JP S6247139U
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- heat sink
- holding frame
- recess
- mounting structure
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000011810 insulating material Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Description
第１図は本考案のトランジスタと放熱板の取付
構造の組立て前の状態を示す斜視図、第２図は組
立て後の状態を示す断面図、第３図は従来の取付
構造を示す図、第４図は本考案及び従来の取付構
造に適用されるトランジスタの一例を示す図であ
る。
１…トランジスタ、２…放熱板、３…保持枠、
３ａ…一辺、５…絶縁シート、７…凹部。
FIG. 1 is a perspective view showing the mounting structure of the transistor and heat sink of the present invention before assembly, FIG. 2 is a sectional view showing the state after assembly, and FIG. 3 is a diagram showing the conventional mounting structure. FIG. 4 is a diagram showing an example of a transistor applied to the present invention and the conventional mounting structure. 1... Transistor, 2... Heat sink, 3... Holding frame,
3a... One side, 5... Insulating sheet, 7... Recessed portion.
Claims (1)
なる保持枠の一辺に凹部を形成して該凹部にトラ
ンジスタを嵌め込むと共に、保持枠の弾性力によ
つて前記トランジスタを保持枠に挾持された放熱
板に対し絶縁シートを介して圧接してなることを
特徴とするトランジスタと放熱板との取付構造。 A recess is formed on one side of a U-shaped holding frame made of an insulating material that elastically holds the heat sink, and the transistor is fitted into the recess, and the transistor is held between the holding frame by the elastic force of the holding frame. A mounting structure for a transistor and a heat sink, characterized in that the transistor and the heat sink are pressed into contact with the heat sink via an insulating sheet.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985139233U JPS6247139U (en) | 1985-09-11 | 1985-09-11 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985139233U JPS6247139U (en) | 1985-09-11 | 1985-09-11 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6247139U true JPS6247139U (en) | 1987-03-23 |
Family
ID=31044939
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1985139233U Pending JPS6247139U (en) | 1985-09-11 | 1985-09-11 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6247139U (en) |
-
1985
- 1985-09-11 JP JP1985139233U patent/JPS6247139U/ja active Pending