JPS6247119U - - Google Patents
Info
- Publication number
- JPS6247119U JPS6247119U JP13849285U JP13849285U JPS6247119U JP S6247119 U JPS6247119 U JP S6247119U JP 13849285 U JP13849285 U JP 13849285U JP 13849285 U JP13849285 U JP 13849285U JP S6247119 U JPS6247119 U JP S6247119U
- Authority
- JP
- Japan
- Prior art keywords
- laminated
- circuit board
- board
- layers
- edge
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004020 conductor Substances 0.000 claims description 3
- 239000000919 ceramic Substances 0.000 claims 1
Landscapes
- Semiconductor Integrated Circuits (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
- Structure Of Printed Boards (AREA)
Description
第１図は本考案の実施例を示す正面断面図、第
２図は従来の積層回路基板を示す正面断面図であ
る。
１２，１３……導体パターン。
FIG. 1 is a front sectional view showing an embodiment of the present invention, and FIG. 2 is a front sectional view showing a conventional laminated circuit board. 12, 13... Conductor pattern.
Claims (1)
が積層されて内部に回路素子が形成された積層回
路基板において、基板端部に引き出される導体パ
ターンが二層以上並列に形成されたことを特徴と
する積層回路基板。 A laminated circuit board in which a ceramic green sheet and a printed conductor pattern are laminated to form a circuit element therein, the laminated circuit board being characterized in that two or more layers of conductor patterns drawn out to the edge of the board are formed in parallel.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13849285U JPS6247119U (en) | 1985-09-10 | 1985-09-10 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13849285U JPS6247119U (en) | 1985-09-10 | 1985-09-10 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6247119U true JPS6247119U (en) | 1987-03-23 |
Family
ID=31043522
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13849285U Pending JPS6247119U (en) | 1985-09-10 | 1985-09-10 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6247119U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01101656A (en) * | 1987-10-15 | 1989-04-19 | Tdk Corp | Laminated integrated circuit |
| JP2010087260A (en) * | 2008-09-30 | 2010-04-15 | Tdk Corp | Multilayer capacitor |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5221663A (en) * | 1975-08-11 | 1977-02-18 | Matsushita Electric Ind Co Ltd | Method of manufacturing glassy capacitor |
| JPS6025135B2 (en) * | 1974-04-29 | 1985-06-17 | オルバ−ト ウイリアム ロジヤ−ス | A structure in which a porcelain material is bonded to a metal matrix for application to teeth, and a method for bonding the same |
-
1985
- 1985-09-10 JP JP13849285U patent/JPS6247119U/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6025135B2 (en) * | 1974-04-29 | 1985-06-17 | オルバ−ト ウイリアム ロジヤ−ス | A structure in which a porcelain material is bonded to a metal matrix for application to teeth, and a method for bonding the same |
| JPS5221663A (en) * | 1975-08-11 | 1977-02-18 | Matsushita Electric Ind Co Ltd | Method of manufacturing glassy capacitor |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01101656A (en) * | 1987-10-15 | 1989-04-19 | Tdk Corp | Laminated integrated circuit |
| JP2010087260A (en) * | 2008-09-30 | 2010-04-15 | Tdk Corp | Multilayer capacitor |
| JP4600561B2 (en) * | 2008-09-30 | 2010-12-15 | Ｔｄｋ株式会社 | Multilayer capacitor |