JPS6245208A - Edge detection filter - Google Patents

Abstract

PURPOSE:To detect an edge surely even at the inside of an isolated point and inside of a minute line by giving a digital signal in the order of a primary differentiation device, an absolute value circuit and an adder and using a resulting output as an edge output. CONSTITUTION:The primary differentiation device comprising latches 1-3 and a subtractor 4 detects a change point of an input digital signal data. After the absolute value of the detected output is obtained by an absolute value circuit 5, the result is fed respectively to latch circuits 6-8. Then a continuous data string stored in the latches 6-8 by adders 9-11 is added and the result of addition is outputted as an edge output. Thus, an edge is detected surely even at the inside of an isolated point or the inside of a minute line.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to improving the characteristics of an edge detection filter as a digital filter used for contour processing of a digital image Q9.

[Prior Art] When looking at an image, the things that are most noticeable are edges and lines, and it can be seen that the structure of the image is formed by the combination of lines, making it easier to recognize. Therefore, research into extracting lines and edges from images has been conducted for a long time, and a large number of methods have been published. The basic idea of edge detection is that edge portions correspond to areas where the density of the image changes drastically. Therefore, by differentiating the density function f(!, ri) of the image, parts where the density changes rapidly can be extracted.

Since the differentiated value is multivalued, it must be binarized at a certain level to determine the location of the edge.
Due to the nature of such non-linear processing, edge detection requires #
It is usually discussed as part of feature extraction.

However, since the differential is a type of high-pass filter, it has the problem of easily picking up noise components.

Therefore, various types of edge detection operators using digital filters that are as resistant to noise as possible and as simple as possible have been considered. Among these various differential operators, the 5obel operator is said to have relatively good properties as a two-dimensional first-order differential operator because it includes smoothing and is relatively less affected by miscellaneous RF, and is suitable for edge detection. Often used.

1- The 5obe1 operator described above is denoted as is well known. Therefore, according to this operator of 5obe+, for example, the output of an isolated point with a value of 1" is as follows.
A differential value of 2'' appears in the pixel.

[Problem to be solved by the invention 1 However, other than isolated points, e.g. ooooo.

ooooo.

ooooo.

When we apply the data of 5 obel operation 1/-even, we get oo
ooooo.

Differential values are obtained on both sides of the edge part as shown in 04"646:4 L------H. This is also the case with other conventionally known first-order differential converters. .

In this way, the inside of an isolated point is not detected as an edge using the conventionally known first-order differential operator such as 5ohe1oper1/-yet, but if the sampling rate is doubled, for example, that point will no longer be an isolated point. , it has the disadvantage of causing inconsistencies such as detecting edges even inside the boundaries.

So, uninvented! - It is an object of the present invention to provide a new edge detection filter that can eliminate the above-mentioned drawbacks and reliably detect edges even inside isolated points or thin lines.

[Means for Solving the Problems] [To achieve the object, the present invention includes a first-order differentiator that detects a change point in an input data string of a digital signal, and a first-order differentiator that detects the absolute value of the output of the first-order differentiator. The present invention is characterized in that it includes an absolute value circuit and an adder that adds two or more consecutive pieces of data in a data string output from the absolute value circuit and outputs the addition result as an edge output.

[Function] In the present invention, a digital signal is passed through a first-order differentiator, an absolute I + r path, and an adder in this order, and the resulting output is used as an edge output. That is, a first-order differentiator detects a changing point (edge) in an input data string of a digital signal, the absolute value of this detected output is written by an absolute value circuit, and an adder is used to write, for example, a continuous point in the data string of the absolute value. The three pieces of data are added together, and the result of this addition is output as an edge output. Thereby, according to the unreleased IJI, isolated point edges of the input digital data string can be detected both inside and outside.

[Example 1 The present invention will now be described in detail with reference to the F1 drawing.

In order to simplify the explanation IN+, edge detection using a first-order differential filter (first-order differentiator) for one-dimensional data will be explained. That is, the kernel of the -order differential filter is set to [10-11.

FIG. 1 shows a circuit configuration of an embodiment of the present invention, where 1
~3 is a latch (latch circuit) that temporarily stores data
, and are connected in series in the order of 1.2.3,
When a human input data signal, for example D8, is input to the input terminal (DATA IN) of latch 1 before the input of the clock signal (CLOCK), the outputs of latches 1 to 3 become 07 +D6 +OS, respectively. However, the input data is o, +D7 +..., D5. El.

It is assumed that input is performed in the order of 07.0!1. In addition, in this previous stage Qi 2,011, for example, the amount f is set to 4 bits.
The converted input data signals are sent to the input terminal (DATA) one after another.
IN).

For example, 4 is a general-purpose MS! (Medium-sized integrated circuit), etc., and if the human power is A, B and the output is F, then
It has an arithmetic unit tE with F=A−H. One input terminal A (Ao to A3) of the subtracter 4 is connected to the output terminal Q0 of the latch 1.
~Q3 is connected, and the other input terminal B (80~B3
) are connected to the output terminals Q0 to Q3 of latch 3, so the output of latch 1 is 07 and the output of latch 3 is D5.
At this time, the output F of the arithmetic unit 4 obtains the calculation result of D7 to D5. Since the input terminals A and B of the subtractor 4 are input with positive value data, the carry (Ca
rry.

The output can be viewed as one negative sign bit. Therefore, it can be seen that the latches 1 to 3 and the arithmetic unit 4 described above constitute a first-order differentiator with a kernel of [10-1] that detects the changing point (edge) of the input data string when the digital value is 0. Ru.

5 is an absolute 11 circuit composed of, for example, a ROM (read only memory), which outputs the output of the subtracter 4 as it is in accordance with a carry signal, which is a sign bit, sent from the carry output terminal of the subtracter 4. For example, output D7-0 of subtractor 4 at the current time. Assuming that E6 is E6, the output of the absolute value circuit 5 is IE&+, which indicates the absolute value of the first differential of the input data string.

6.7.8 is a latch connected in series with the absolute value circuit 5, and the output from the absolute value circuit 5 is IE+l.

IE>l, IE3 1. IE4 1. IEs l
.

Assuming that they are output in the order of 1E61...
The latch 37.8 before the clock signal (C: LOCK) is input when the output of the absolute value circuit 5 is IE61
The output of IE, 1. lE, tl.

IE, 1.

9 is an adder, one input terminal A0 to A3 is connected to the output terminal of latch 6, and the other input terminal (' B0 to B
3 is connected to the output terminal of the latch 7, and thereby the output of the 7-channel 6 and the output of the latch 7 are added together. 10 and 11 are also adders, and by cascading these two 4-bit adders, it is possible to perform 5-bit addition, and the output of adder 9 and latch 8 are It is possible to add the output. That is, when the output of latch 6 is IE-, I, the output terminal of latch 7 is I
E, II, and the output of latch 8 is IE31, so adders 10, 11 (7) Output side (DATA 0UT)
D is IE, the addition result of l+lE41+lE3+ is output.

Therefore, if the signal flow in this embodiment is expressed by assuming that the manually input data string input to latch 1 is a binary signal of O and 1, the result will be as shown in the table below. It turns out that it is possible to detect.

Table 1, // Although this embodiment has been described using a first-order differential filter with three -dimensional pixels, the present invention is not limited thereto, and may be applied to a first-order differential filter with three or more pixels, for example, 5.7 pixels. It can also be applied to a two-dimensional first-order differential filter. That is, a conventional, well-known first-order differential operator can be used as the first-stage first-order differential filter.

[Effects of the Invention] As explained above, according to the present invention, an absolute value circuit and an adder are sequentially connected to the output side of a first-order differential filter similar to the conventional one, and the i! Since consecutive absolute value data strings are added, it is possible to reliably detect the inside and outside of an isolated knee in the input data string.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an example of the circuit configuration of an embodiment of the present invention. 1.2.3, 8, 7.8...Latch, 4...Subtractor, 5...Absolute value circuit, 9.10.11...Adder.

Claims (1)

[Claims] 1) a) a first-order differentiator that detects a change point in an input data string of a digital signal; b) an absolute value circuit that takes the absolute value of the output of the first-order differentiator; and c) the absolute value. An edge detection filter comprising: an adder that adds two or more consecutive pieces of data in a data string output from a circuit, and outputs the addition result as an edge output.