JPS624396A - Manufacture of printed wiring board by tin alloy through hole plating - Google Patents

Manufacture of printed wiring board by tin alloy through hole plating

Info

Publication number
JPS624396A
JPS624396A JP14261085A JP14261085A JPS624396A JP S624396 A JPS624396 A JP S624396A JP 14261085 A JP14261085 A JP 14261085A JP 14261085 A JP14261085 A JP 14261085A JP S624396 A JPS624396 A JP S624396A
Authority
JP
Japan
Prior art keywords
plating
printed wiring
wiring board
tin alloy
tin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14261085A
Other languages
Japanese (ja)
Inventor
小西 陽夫
福岡 万博
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
KOSAKU KK
Original Assignee
KOSAKU KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by KOSAKU KK filed Critical KOSAKU KK
Priority to JP14261085A priority Critical patent/JPS624396A/en
Publication of JPS624396A publication Critical patent/JPS624396A/en
Pending legal-status Critical Current

Links

Landscapes

  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 Cmm上上利用分野) 本発明は改良されたスルーホールめっきによるプリント
配線板の製造方法に関する。さらにくわしくは、はんだ
スルーホールめっきのもつ欠点を改良したスズ合金スル
ーホールめっきによるプリント配線板の製造法に関する
DETAILED DESCRIPTION OF THE INVENTION Field of Application The present invention relates to an improved method of manufacturing printed wiring boards by through-hole plating. More specifically, the present invention relates to a method for manufacturing printed wiring boards using tin alloy through-hole plating, which improves the drawbacks of solder through-hole plating.

プリント配線板は半導体素子を実装する部品として、電
子機器には不可欠の部品である。
Printed wiring boards are essential parts for electronic devices as they are used to mount semiconductor elements.

(従来の技術) スルーホールめっき配線板にはエツチングレジストに金
属を用いた金スルーホール、はんだスルーホール等が、
又有機レジストを用いてエツチングをした回路部が鋼の
ま\の鋼スルーホール等がある。
(Conventional technology) Through-hole plating wiring boards have gold through-holes using metal as etching resist, solder through-holes, etc.
There are also steel through-holes whose circuit parts are made of steel and are etched using organic resist.

本発明は広く一般的に用いられているはんだスルーホー
ルプリント配線板の改良に関するものであシ、はんだス
ルーホールについて説明する。
The present invention relates to improvements in solder through-hole printed wiring boards that are widely and generally used, and the solder through-holes will be explained.

まずはんだスルーホールの配線板の一般的な製造工程に
ついて説明する。即ちこの配線板は銅張シプラスチック
ス製積層板により、図面に示すような工程で製造される
First, a general manufacturing process for solder through-hole wiring boards will be explained. That is, this wiring board is manufactured using a copper-clad laminate made of Siplastics through the steps shown in the drawings.

次にこの工程について説明する。Next, this process will be explained.

(1)穴あけ。(1) Drilling.

(2)無電解鋼めつき; 化学めっきによυ0.2〜0.5μの厚さのめつき膜を
形成させる。
(2) Electroless steel plating: A plating film having a thickness of υ0.2 to 0.5μ is formed by chemical plating.

(3)−次鋼電気めつき; 前記のめつき膜上に、電解によシ15〜20μの厚さの
第一次銅電気めっき膜を形成させる。
(3) - Secondary steel electroplating; A primary copper electroplating film having a thickness of 15 to 20 μm is formed on the plated film by electrolysis.

(4)必要部分にレジスト膜を形成させる。(4) Form a resist film on the necessary portions.

(5)二次鋼めりき; レジスト膜のない部分に15〜20μの厚さの第二次電
解鋼めっき膜を形成させる。
(5) Secondary steel plating: A secondary electrolytic steel plating film with a thickness of 15 to 20 μm is formed on the areas where there is no resist film.

(6)はんだめっきをする。(6) Solder plating.

(7)  レジスト膜のみをとかし、はんだをとかさな
いような処理をしてレジスト膜をはがす。
(7) Remove the resist film by melting only the resist film and not melting the solder.

(8)  エツチング; レジスト膜をはがされた部分の銅をとかす。(8) Etching; Melt the copper in the area where the resist film was removed.

(9)  とエージング; はんだの融点にまで温度を上げて粗雑なはんだの表面を
平滑にする。
(9) Aging: The rough solder surface is smoothed by raising the temperature to the melting point of the solder.

αG 端子部以外をマスクし、例えば氷酢酸19部、3
ON過塩素酸1部よシなる混酸を用いて処理をしてはん
だをはがす。
Mask the area other than the αG terminal, for example, 19 parts of glacial acetic acid, 3
Treat with a mixed acid containing 1 part of ON perchloric acid to remove the solder.

圓 はんだをはがした端子部分のコネクタとの電気的接
触を良好にするため、金めつき、ニッケルめっき等を行
なう。
En: Gold or nickel plating is applied to the terminals after removing the solder to ensure good electrical contact with the connector.

この工程に例えば次のような欠点がある。This process has the following drawbacks, for example:

工程が全般的に複雑であシ、又端子のコネクタとの接触
を良好にするため、この部分のみのはんだのはくυ、更
にはくシ后のめつき処理等が必要である。そしてさらに
、はんだめっきにはホウ7ツ化浴が一般的に用いられ、
これらの処理において、排水等において公害を起さない
よう配慮する必要がある。又はんだはくシの際に有毒ガ
スの発生があるが労働衛生上十分に配慮する必要もある
The process is generally complicated, and in order to make good contact between the terminal and the connector, it is necessary to apply solder to only this part, and then perform plating after the soldering process. Furthermore, a borosilicate bath is commonly used for solder plating.
In these treatments, it is necessary to take care not to cause pollution in the wastewater, etc. Toxic gas is generated when soldering or soldering, but due consideration must be given to occupational hygiene.

以上のような理由によυ、この工程の簡素化や公害の心
配のない処理法の開発が強く要望されている。
For the reasons mentioned above, there is a strong desire to simplify this process and develop a treatment method that does not cause pollution.

(本発明が解決しようとする問題点) 本発明者らはこの要望に応じたプリント配線板の製造方
法を開発する目的で種々研究の結果、前記工程のはんだ
めっき工程の代シにスズ合金めっき工程をもうけること
によシ、上記はんだスルーホールめっき法のもつ欠点を
すべて解消することを確認して本発明を完成した。
(Problems to be Solved by the Present Invention) As a result of various studies for the purpose of developing a method for manufacturing printed wiring boards that meets this demand, the present inventors have found that tin alloy plating can be used instead of the solder plating process in the above process. The present invention was completed after confirming that all the drawbacks of the solder through-hole plating method described above can be overcome by adding an additional process.

(問題点を解決するための手段) 即ち本発明は、プリント配線板のスルーホールめっき工
程において、二次銅電気めっき后に、スズ合金めっきを
行なうことを特徴とするスズ合金スルーホールによるプ
リント配線板の製造法に関する。
(Means for Solving the Problems) That is, the present invention provides printed wiring using tin alloy through holes, characterized in that tin alloy plating is performed after secondary copper electroplating in the through hole plating process of printed wiring boards. Concerning the manufacturing method of boards.

本出願人はさきに、スズ合金電気めっき浴組成物に関す
る発明について特許出願を行ない、特許第102729
2号、第1166434号、第1180236号の権利
を確立した。特許第1027292号の組成物はスズ、
コバルト又はスズとニッケルのそれぞれの塩化物、硫酸
塩又はスルファミン酸の塩に1−ヒドロキシエタン1,
1第2リン酸工ステル文はその塩、電導度塩、アルデヒ
ド、ベタインを含有するものであシ、特許第11664
34号および第1180236号の組成物はスズとニッ
ケル又はスズとコバルトの塩化物、硫酸塩にそれぞれ電
導性塩、酒石酸又はその塩、グリフールエーテルを含有
するものである。本発明のプリント配線板の製造におい
て、二次銅電気めっき后に行なわれるスズ合金めっきに
おいて、前記の各特許のめつき浴組成物を用いることは
可能であるが、それらに限られるものではなく、スズ合
金めっき被膜を銅膜上に形成しうるものであればよい。
The applicant previously filed a patent application for an invention related to a tin alloy electroplating bath composition, and patent No. 102729 was filed.
2, No. 1166434, and No. 1180236 were established. The composition of Patent No. 1027292 contains tin,
Cobalt or tin and nickel chlorides, sulfates or sulfamic acid salts with 1-hydroxyethane 1,
1 The secondary phosphoric acid compound contains its salt, conductivity salt, aldehyde, and betaine, Patent No. 11664
The compositions of No. 34 and No. 1180236 contain a chloride or sulfate of tin and nickel or tin and cobalt, a conductive salt, tartaric acid or a salt thereof, and glyfur ether, respectively. In the production of the printed wiring board of the present invention, it is possible to use the plating bath compositions of the above-mentioned patents in the tin alloy plating performed after the secondary copper electroplating, but it is not limited to them. Any material that can form a tin alloy plating film on a copper film may be used.

次に好ましい本発明に用いられるめっき浴組成物の各成
分および含有量についてのべる。
Next, each component and content of the plating bath composition preferably used in the present invention will be described.

(a)合金被膜形成剤として、スズ、ニッケル、又はス
ズ、コバルトのそれぞれの塩化物又は硫酸塩を金属スズ
、金属ニッケル、金属コバルトとして、それぞれ15.
0 ?μ〜22.0 f/l 。
(a) As an alloy film forming agent, tin, nickel, or a chloride or sulfate of each of tin and cobalt is used as metal tin, metal nickel, and metal cobalt, and 15.
0? μ~22.0 f/l.

15 f/L M−10f/L 、 2..5危〜10
危(6)  電導性塩100fμ〜200 f/Lさら
に錯化剤として、1−ヒドロキシエタン1.1第2リン
酸エステル30〜55 f/L :酒石酸、クエン酸等
の有機酸50 f/l〜70 f/L ニゲリコール酸
30 t/L〜40 f/Lの111以上を共存させる
15 f/L M-10 f/L, 2. .. 5-10
Danger (6) Conductive salt 100 fμ ~ 200 f/L Furthermore, as a complexing agent, 1-hydroxyethane 1.1 secondary phosphate ester 30 ~ 55 f/L: Organic acid such as tartaric acid, citric acid, etc. 50 f/L ~70 f/L nigericolic acid 30 t/L ~ 40 f/L of 111 or more are allowed to coexist.

なお上記の錯化剤はそれぞれす) IJウム、カリウム
等の塩も用いられる。
Note that the above-mentioned complexing agents include salts of IJum, potassium, and the like.

又めつき液の表面張力を低下させて、めっき液が被めっ
き物に付着してめつき槽外に排出されないよう、めっき
液に少量の界面活性剤、例えばフルオロベンゼンスルホ
ン酸ナトリウムをo、oos vμ〜0.01f/を種
混合するとよい。
In addition, a small amount of surfactant, such as sodium fluorobenzenesulfonate, is added to the plating solution to reduce the surface tension of the plating solution and prevent the plating solution from adhering to the object to be plated and being discharged out of the plating tank. It is preferable to mix vμ to 0.01f/.

めっき条件は公知の条件でよいが、とくに好ましいのは
浴温30℃〜60℃であシ、又陽極としては炭素又はフ
ェライト電極を用いる。そして電流密度は0.5A/d
−〜2174m”の範囲が好ましい。
Although known plating conditions may be used, a bath temperature of 30 DEG C. to 60 DEG C. is particularly preferred, and a carbon or ferrite electrode is used as the anode. And the current density is 0.5A/d
- to 2174 m'' is preferred.

(発明の効果) スズ合金めっきを本発明のように行なってプリント配線
板を製造した場合、はんだスルーホール法に比して次の
ような利点がおる。
(Effects of the Invention) When a printed wiring board is manufactured by carrying out tin alloy plating as in the present invention, there are the following advantages over the solder through-hole method.

即チハんだスルーホールの場合のように7二−ジングエ
程の必要がない。又端子をコネクタとの電気的接触を良
好にするためはんだスルーホールの場合は端子部分のは
んだのはくシが必要であシ、このは〈多処理は他の部分
のはんだがはくシしないよう、端子部分以外をマスキン
グして行う必要があるが、本発明では端子部分はスズ合
金めっき膜ができているので、はく多処理は必要はない
In other words, there is no need for as many as 7 second inserts as in the case of a chipped through hole. Also, in the case of solder through-holes, it is necessary to use solder foil for the terminal part in order to make good electrical contact between the terminal and the connector. However, in the present invention, since the terminal portion is coated with a tin alloy plating film, there is no need for multiple masking treatments.

さらにはんだめっき処理やはんだめっき展は〈多処理の
際発生する公害問題も本発明においては全く考慮する必
要がない。
Furthermore, in the solder plating process and solder plating process, there is no need to consider the pollution problem that occurs when multiple processes are performed in the present invention.

(実施例) 次に実施例によシ本発明を説明する。(Example) Next, the present invention will be explained with reference to examples.

実施例1 厚さ1.6 smの基材の両側に35μの銅箔を貼着し
た銅張シ積層板に径l■の穴をあけた後、まず厚さ0.
5μの無電解鋼めっき層を両側にもうけ、ついで厚さ2
5μの二次−めつき層をそれぞれの側にもうけた。つい
で前記二次鋼めっき層の必要部分にドライ7キルムのレ
ジスト膜をもうけたO 次にこのレジスト膜のもうけられているプリント配線用
板を次に示すめっき浴組成物を電解浴とし、次に示す条
件でめっき処理を行った。
Example 1 After drilling a hole with a diameter of 1 in a copper-clad laminate in which a 35 μm copper foil was attached to both sides of a base material with a thickness of 1.6 sm, first a hole with a diameter of 0.0 mm was made.
A 5μ electroless steel plating layer is applied on both sides, and then a 2μ thick electroless steel plating layer is applied on both sides.
A 5μ secondary plating layer was applied on each side. Next, a dry 7-kilometre resist film was formed on the necessary parts of the secondary steel plating layer. Next, the printed wiring board on which this resist film was formed was treated with the following plating bath composition as an electrolytic bath. Plating treatment was performed under the conditions shown.

めっき浴組成物 (1)  スズ合金膜用化合物;塩化第二スズ・5水物
60 f/L 、塩化ニッケル・6水物13fμ(2)
  NH40L 200φ (3)  クエン酸ナトリウム、及びゲルコール酸35
tμ めっき条件 陽極 物質名;カーボン、電流密度;1.0ム浴温;3
5℃、電解時間;10分間 以上の結果二次鋼めっき層の上にスズ70重量に、ニラ
クル30重量にの厚さ2μのスズ−ニツケル合金被膜を
形成した。
Plating bath composition (1) Compound for tin alloy film; stannic chloride pentahydrate 60 f/L, nickel chloride hexahydrate 13 fμ (2)
NH40L 200φ (3) Sodium citrate and gelcholic acid 35
tμ Plating conditions Anode Material name: Carbon, Current density: 1.0μ Bath temperature: 3
As a result of electrolysis at 5 DEG C. for 10 minutes or more, a tin-nickel alloy film having a thickness of 2 microns and containing 70 weight tin and 30 weight Niracle was formed on the secondary steel plating layer.

次にこのものを濃度3〜5%のNαOH溶液によりレジ
スト膜を除去し、さらに亜塩素酸ナトリウム、重炭酸ア
ンモニウムを含むPH&5のアンモニヤ性水溶液である
エツチング液で処理してレジスト膜の除去された部分の
銅をはくシした。
Next, the resist film was removed using an NaOH solution with a concentration of 3 to 5%, and then treated with an etching solution, which is an ammoniacal aqueous solution with a pH of &5 containing sodium chlorite and ammonium bicarbonate, to remove the resist film. I removed the copper from the part.

この処理板の端子部分はスルーホール部と同じ2μ厚の
スズ−ニツケル合金被膜が形成しておシ、はんだスルー
ホールの場合のようにはく多処理を行なうことなく、そ
のま\金めつきを行なうことができた。
The terminal portion of this treated plate is coated with a tin-nickel alloy film with the same thickness of 2μ as the through-hole portion, and is plated with gold without having to undergo multiple treatments as in the case of solder through-holes. I was able to do this.

さらに所要の処理を行なってプリント配線板とした。Further, necessary processing was performed to obtain a printed wiring board.

スズ合金によるめっき処理中その他の処理において何ら
公害の原因となる排液を生じなかった。即ちこの実施例
によυ本発明方法は従来のはんだスルーホールめっきに
よるプリント配線板の製造に比して工程が簡素化され、
かつ公害問題もない等すぐれていることはあきらかであ
るO 実施例2〜8 実施例Iにおいてレジスト膜のもうけられているプリン
ト配線用板のめつき条件を第1表に示す如くにした以外
すべて実施例1と同条件で処理した。その結果二次鋼め
っき層の上に第2表に示すスズ合金被膜を形成した。次
に実施例1と全く同様に処理してプリント配線板を製造
し九0実施例1と全く同様にはんだスルーホールめつき
に比し工程が簡素化され、かつ公害問題も全く起らなか
った。又本法によるスズ合金被膜のはんだに対するぬれ
性を日本スズセンターのはんだ付便らんに規定されたぬ
れ天秤法による測定結果を第3表に示す。
During the tin alloy plating process and other processes, no effluent that caused any pollution was generated. That is, according to this embodiment, the process of the present invention is simplified compared to the conventional method of manufacturing printed wiring boards by solder through-hole plating,
It is clear that the results are excellent, as there is no pollution problem.Examples 2 to 8 All of the methods used in Example I except that the plating conditions for the printed wiring board on which the resist film was formed were as shown in Table 1. The treatment was carried out under the same conditions as in Example 1. As a result, a tin alloy coating shown in Table 2 was formed on the secondary steel plating layer. Next, a printed wiring board was manufactured using the same process as in Example 1, and the process was simplified compared to solder through-hole plating, and no pollution problems occurred. . Table 3 shows the results of measuring the solder wettability of the tin alloy film produced by this method using the wet balance method specified in the Japan Tin Center's soldering guide.

第  3  表 フラックスはザーシン2010を用いた。Table 3 As the flux, Zersin 2010 was used.

【図面の簡単な説明】[Brief explanation of drawings]

図面紘スルーホールの配線板の一般な製造工程を示す。 The drawing shows the general manufacturing process for through-hole wiring boards.

Claims (3)

【特許請求の範囲】[Claims] (1)プリント配線板のスルーホールめつき工程におい
て、二次銅電気めつき后にスズ合金めつきを行なうこと
を特徴とするスズ合金スルーホールめつきによるプリン
ト配線板の製造方法。
(1) A method for producing a printed wiring board by tin alloy through-hole plating, which comprises performing tin alloy plating after secondary copper electroplating in the through-hole plating process of the printed wiring board.
(2)スズ合金めつきはスズ−コバルト合金めつきであ
る特許請求の範囲第1項のプリント配線板の製造方法。
(2) The method for manufacturing a printed wiring board according to claim 1, wherein the tin alloy plating is tin-cobalt alloy plating.
(3)スズ合金めつきはスズ−ニツケル合金めつきであ
る特許請求の範囲第1項のプリント配線板の製造方法。
(3) The method for manufacturing a printed wiring board according to claim 1, wherein the tin alloy plating is tin-nickel alloy plating.
JP14261085A 1985-07-01 1985-07-01 Manufacture of printed wiring board by tin alloy through hole plating Pending JPS624396A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14261085A JPS624396A (en) 1985-07-01 1985-07-01 Manufacture of printed wiring board by tin alloy through hole plating

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14261085A JPS624396A (en) 1985-07-01 1985-07-01 Manufacture of printed wiring board by tin alloy through hole plating

Publications (1)

Publication Number Publication Date
JPS624396A true JPS624396A (en) 1987-01-10

Family

ID=15319329

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14261085A Pending JPS624396A (en) 1985-07-01 1985-07-01 Manufacture of printed wiring board by tin alloy through hole plating

Country Status (1)

Country Link
JP (1) JPS624396A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS568513A (en) * 1979-07-02 1981-01-28 Sumitomo Electric Ind Ltd Liquid amount detector
JPS5999793A (en) * 1982-11-29 1984-06-08 山下サーキテック株式会社 Printed circuit board
JPS613494A (en) * 1984-06-15 1986-01-09 富士通株式会社 Method of producing printed board

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS568513A (en) * 1979-07-02 1981-01-28 Sumitomo Electric Ind Ltd Liquid amount detector
JPS5999793A (en) * 1982-11-29 1984-06-08 山下サーキテック株式会社 Printed circuit board
JPS613494A (en) * 1984-06-15 1986-01-09 富士通株式会社 Method of producing printed board

Similar Documents

Publication Publication Date Title
US6015482A (en) Printed circuit manufacturing process using tin-nickel plating
JPH0575246A (en) Printed-circuit forming method
US4144118A (en) Method of providing printed circuits
JP3387507B2 (en) Pretreatment solution and pretreatment method for electroless nickel plating
NL8002375A (en) METHOD FOR MANUFACTURING PRINTED WIRES.
JP2005520936A (en) Method of peeling silver plating from printed circuit board
GB2070647A (en) Selective chemical deposition and/or electrodeposition of metal coatings, especially for the production of printed circuits
JP4129665B2 (en) Manufacturing method of substrate for semiconductor package
US4976808A (en) Process for removing a polyimide resin by dissolution
JP2666470B2 (en) Electroless plating method
JP4143694B2 (en) Palladium catalyst remover for electroless plating
JPH0590737A (en) Manufacture of copper polyimide board
WO2001076334A1 (en) Method for producing solderable and functional surfaces on circuit carriers
US4968398A (en) Process for the electrolytic removal of polyimide resins
JPS624396A (en) Manufacture of printed wiring board by tin alloy through hole plating
JP2009272571A (en) Printed circuit board and method of manufacturing the same
JPH0621157A (en) Manufactured of copper polyimide substrate
US4686015A (en) Nickel/indium alloy and method of using same in the manufacture of printed circuit boards
JP3388298B2 (en) Etching solution for pretreatment in plating on glass surface, plating method and method for manufacturing glass substrate
US3582415A (en) Method of etching cu with use of pb and sn layers as a mask
JPS63222497A (en) Manufacture of printed wiring board by applying double-layer nickel-tin alloy plating to through-hole
JPH03138392A (en) Electroplating of electrically activated polymer
JPH0598491A (en) Electro-copper plating method
JPH07235752A (en) Method for removing chlolrine ion from etching solution and wiring board producing methods using this solution
US3528892A (en) Plating method