JPS6243300A - Channel line concentrator - Google Patents

Channel line concentrator

Info

Publication number
JPS6243300A
JPS6243300A JP18333885A JP18333885A JPS6243300A JP S6243300 A JPS6243300 A JP S6243300A JP 18333885 A JP18333885 A JP 18333885A JP 18333885 A JP18333885 A JP 18333885A JP S6243300 A JPS6243300 A JP S6243300A
Authority
JP
Japan
Prior art keywords
time division
highway
highways
communication path
division multiplexed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP18333885A
Other languages
Japanese (ja)
Other versions
JPH0417598B2 (en
Inventor
Wataru Takeuchi
竹内 亘
Nobutaka Yokoi
信孝 横井
Koji Kogure
木暮 光司
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Nippon Telegraph and Telephone Corp
Original Assignee
NEC Corp
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Telegraph and Telephone Corp filed Critical NEC Corp
Priority to JP18333885A priority Critical patent/JPS6243300A/en
Publication of JPS6243300A publication Critical patent/JPS6243300A/en
Publication of JPH0417598B2 publication Critical patent/JPH0417598B2/ja
Granted legal-status Critical Current

Links

Abstract

PURPOSE:To use effectively time division multiplex highways by allowing time division multiplex up highways and time division multiplex down highways to exist together on time division multiplex junctor highways. CONSTITUTION:Time division multiplex up highways 16 and 17 and a time division multiplex down highway 21 of outputs of the first channel memories 1, 3, and 6 are stored in a select switch 35. Information which is used to select one of highways of outputs of the first channel memories 1, 3, and 6 is written in a select switch control memory 13, and this information is outputted from a control line 28 to select one of highways of outputs of the first channel memories by the select switch 35. Outputs of the second channel memories 2 and 4 are time division multiplex down highways 19 and 20, and the output of the second channel memory 5 is a time division multiplex up highway 18.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は時分割交換機における通話路集線装置に関する
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a call path concentrator in a time division switch.

〔従来の技術〕[Conventional technology]

従来の通話路メモリUは、第2図に示すように、上9ハ
イウェイ43,44.45.46(図中の右方向矢印)
のランダム書き込み(RW)′J?よびシーケンシャル
読み出しくSR)モードで動作する通話路メモリ31.
32と、下9 /Sイウエイ49゜50.51.52(
図中の左方向矢印)のシーケンシャル書き込み(SW)
およびランダム読み出しくRR)モードで動作する通話
路メモリ33゜34と、空間スイッチ59と、直並列変
換回路36゜37と、通話路制御メモリ38,39.4
0.41と、空間スイッチ制御メモリ42とから構成さ
nる。このように構成さnる通話路集線装置において、
通話路メモIJ 31 、32の入力側の時分割多重上
りハイウェイ43.44の各チャネル番号(LEN )
の内容は制御線54.55より入力さnる通話路制御メ
モI738 、39の内容に基いて通話路メモIJ 3
1 、32にランダムに書き込tnる。通話路メモリ3
1.32の出力側の時分割多重上りハイウェイ45.4
6へは通話路制御メモリ38.39の内容に基いてシー
ケンシャルに読み出さ扛る。通話路メモIJ 31 、
32の出力の時分割多重上りハイウェイ45.46は空
間スイッチ59に収容さnる。空間スイッチ制御メモリ
42には通話路メモIJ 31 、32の出力の時分割
多重上りハイウェイ45.46のうち1つを選択するた
めの情報が畜き込まnており、制#線58からその情報
が出力さnて空間スイッチ59は時分割多重上りハイウ
ェイ45.46のうちの1つを選択する。空間スイッチ
59からの出力の時分割子l上りハイウェイ47はτ0
並列変換回路36に収容さnて、並列囃直列変換さ汎、
出力・・イウェイ48となる。一方、入力・1イウエイ
53は直並列変換回路37に収容さnlここで直列・並
列変換を施こさnて出力される。直並列変換回路37よ
シ出力さnた時分割多重下りハイウェイ51.52はそ
nぞn通話路メモIJ 33 、34に収容さnる。
As shown in FIG. 2, the conventional communication path memory U includes upper 9 highways 43, 44, 45, 46 (arrows pointing to the right in the figure).
Random write (RW)'J? and a channel memory 31 .operating in sequential readout (SR) mode.
32 and lower 9 /S iway 49゜50.51.52 (
Sequential writing (SW) of the left arrow in the figure)
and a communication path memory 33, 34, which operates in the random read (RR) mode, a space switch 59, a serial/parallel conversion circuit 36, 37, and a communication path control memory 38, 39.4.
0.41 and a space switch control memory 42. In the communication path concentrator configured in this way,
Each channel number (LEN) of the time division multiplexed uplink highway 43, 44 on the input side of the call route memo IJ 31, 32
The contents of are input from the control lines 54 and 55. Based on the contents of the communication path control memo I738 and 39, the communication path memo IJ3 is
Randomly write to 1 and 32. Call path memory 3
1.32 output side time division multiplexed up highway 45.4
6 are sequentially read out based on the contents of the communication path control memories 38 and 39. Call route memo IJ 31,
The time division multiplexed uplink highways 45 and 46 of the outputs of 32 are accommodated in the space switch 59. The space switch control memory 42 stores information for selecting one of the time-division multiplexed uplink highways 45 and 46 output from the communication route memos IJ 31 and 32, and the information is transmitted from the control line 58. The spatial switch 59 selects one of the time-division multiplexed uplink highways 45 and 46. The time division factor l of the output from the space switch 59 is τ0
The parallel music is stored in the parallel conversion circuit 36, and the parallel music is converted into series.
Output: iway 48. On the other hand, the input signal 53 is accommodated in a serial/parallel conversion circuit 37, where it undergoes serial/parallel conversion and is output. The time division multiplexed down highways 51, 52 outputted from the serial/parallel converter circuit 37 are stored in the communication path memos IJ 33, 34, respectively.

通話路メモリ33.34の入力側の時分割多重下りハイ
ウェイ51.52の各チャネル番号(NEN)の内容は
通話路メモI733 、34にシーケンシャルに書き込
まnる。通話路制御メモ’J40,41には通話路メモ
IJ 33 、34′の出力側の時分割多重下りハイウ
ェイ49.50の各チャネル番号(LEN)の何番目に
どのチャネル番号(NEN)の内容を読み出すかという
情報が菩き込まnておシ、この情報は制#腺56,57
全通して出力さ才L1通話路メモIJ 33 、34か
らチャネル番号(LEN)にチャネル番号(NEN)の
内容がランダムに読み出さnる。
The contents of each channel number (NEN) of the time division multiplexed down highway 51, 52 on the input side of the communication path memory 33, 34 are sequentially written into the communication path memo I 733, 34. The communication path control memo 'J40, 41 contains the contents of which channel number (NEN) in which channel number (LEN) of the time division multiplexed down highway 49.50 on the output side of the communication path memo IJ 33, 34'. The information about whether to read it is included, and this information is controlled by the control glands 56, 57.
The contents of the channel number (NEN) are randomly read out from the L1 communication route memo IJ 33, 34 to the channel number (LEN).

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

しかしながら、上述した従来の時分割交換機の通話路集
線装置においては、時分割多重ノ・イウェイが上シハイ
ウェイおよび下シハイウェイともに独立に設けているた
め、たとえば時分側条1上りハイウェイの全チャネルが
使用中であって時分割多重下りハイウェイに空チャネル
が存在しても下クハイウェイを上りハイウェイとして使
用することができない。このため、時分割多重ハイウェ
イの有効利用が達成できない。
However, in the above-mentioned conventional communication path concentrator of the time-division switch, since time-division multiplexing ways are provided independently for both the upper and lower highways, for example, all the channels of the time-division side strip 1 up highway are is in use and there is an empty channel on the time division multiplexed down highway, the lower highway cannot be used as an up highway. Therefore, effective use of the time division multiplex highway cannot be achieved.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の通話路集線装置は、そnぞnシーケンシャル書
き込みおよびランダム読み出しを行なうよう動作し少な
くとも1つが少なくとも1つの時分割多重上シハイウェ
イに接続しかつ少なくとも他の1つが少なくとも1つの
時分割多電下クツ・イウェイに接続した複数の第1通話
路メモリと、これらの第121!!話路メモリに接銃さ
nyc前記上りおよび下りハイウェイに接続し時分割の
単位時間列にこ扛ら上りおよび下りハイウェイの99の
1つのハイウェイ上の情報?選択しかつ少なくとも1つ
の時分割多重ジャンクメハイウェイに東線出力するセレ
クトスイッチと、このセレクトスイッチの出力情報を受
けるよう前記ジャンクタノ・イウエイに接続し前記出力
情報に対するシーケンシャル書き込みおよびランダム読
み出しを行なうよう動作する複数の第2通話路メモリと
金備えたことを特徴とする。
The communication path concentrators of the present invention are operable to perform sequential writes and random reads, respectively, and at least one connects to at least one time-division multiplexed network and at least one other connects to at least one time-division multiplexed network. A plurality of first communication path memories connected to the electric shoes/eway, and these 121st! ! Information on one of the 99 up and down highways connected to NYC's up and down highways in a time-sharing unit time sequence connected to the story memory? a select switch that selects and outputs the east line to at least one time-division multiplex junk mail highway; and a select switch that is connected to the junk highway to receive output information of the select switch, and operates to perform sequential writing and random reading of the output information. The present invention is characterized in that it includes a plurality of second communication path memories.

〔実施例〕〔Example〕

次に、本発明の一実施例について図面を参照して説明す
る。
Next, an embodiment of the present invention will be described with reference to the drawings.

第1図を参照すると、第1通話路メモリ1,3に入力さ
れる時分割多重上pハイウェイ14.15と第1通話路
メモリ6に入力さnる時分割多重下りハイウェイ22と
は各通話路メモリにシーケンシャルに書き込まnる。こ
れらの第1通話路メモリ1.3.6はそれ七〇制御メモ
リ24,26゜30により、内容をランダムに読み出さ
扛る。第1通話路メモリ1,3.6の出力の時分割多重
上pハイウェイ16.17と時分割多重下りノ1イウェ
イ21とはセレクトスイッチ35に収容さnる。
Referring to FIG. 1, the time division multiplexed upper highway 14.15 input to the first communication path memories 1 and 3 and the time division multiplexed downward highway 22 inputted to the first communication path memory 6 are different from each other for each call. sequentially written to the path memory. The contents of these first channel memories 1, 3, and 6 are randomly read out by means of the control memories 24, 26, and 30. The time division multiplexed upper highway 16.17 and the time division multiplexed downstream highway 21 of the outputs of the first channel memories 1, 3.6 are accommodated in a select switch 35.

セレクトスイッチ制御メモリ13には第1通話路メモリ
1.3.6の出力のハイウェイのうちの1つを選択する
ための情報が書き込まnており、制御線28からこの情
報が出力さnることにより、セレクトスイッチ35はこ
nら第1通話路メモリの出力のハイウェイのうちの1つ
を選択する。セレクトスイッチ35により選択さnたハ
イウェイは時分割多重ジャンクタハイウェイ23となっ
て出力ざ1、第2通話路メモリ2,4.5にシーケンシ
ャルに書き込まnる。第2通話路メモリ2゜4.5の内
容は通話路制御メモ+78 、10 、11によりラン
ダムに読、み出さnる。第2通話路メモリ2.4の出力
は時分割多重下りハイウェイ19゜20となり、かつ!
2通話路メモリ5の出力は時分割多重上りハイウェイ1
8となる。なお、第1図において、参照数字24.25
,26,29゜30は制御線金示す。また、各時分割多
重ハイウェイは複数ビットの情報をパラレル伝送するも
のである。
Information for selecting one of the highways output from the first channel memory 1.3.6 is written in the select switch control memory 13, and this information is output from the control line 28. Accordingly, the select switch 35 selects one of the output highways of the first communication path memory. The highway selected by the select switch 35 becomes the time-division multiplexed junctor highway 23 and is sequentially written into the output signal 1 and the second channel memory 2, 4.5. The contents of the second channel memory 2.4.5 are randomly read and extracted by the channel control memos +78, 10, and 11. The output of the second channel memory 2.4 becomes the time division multiplexed down highway 19°20, and!
2. The output of the communication path memory 5 is the time division multiplexed uplink highway 1.
It becomes 8. In addition, in FIG. 1, reference numbers 24.25
, 26, 29, and 30 indicate control wires. Further, each time division multiplex highway transmits multiple bits of information in parallel.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明によ扛ば、時分割多重上りハ
イウェイと時分割多重下りノ・イウエイとを時分割多重
ジャンクタノ・イタエイ上に混在させることにより、時
分割多重上りノ\イウェイと時分割多重下シハイウェイ
との割合を可変にすることができるため、時分割多重ノ
・イウエイの有効使用を図nる0
As explained above, according to the present invention, by mixing the time-division multiplexed uplink highway and the time-division multiplexed downlink highway on the time-division multiplexed highway, the time-division multiplexed uplink highway and the time-division multiplexed downway are mixed. Since the ratio of the multiplexed highway and the multiplexed highway can be made variable, it is possible to make effective use of the time division multiplexed highway.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示す構成図、第2図は従来
の時分割交換機の通話路集線装置の一例を示す構成図で
ある。 1.3.6・・・・・・第1通話路メモリ、2,415
・・・・・・第2通話路メモリ、7〜13・・・・・・
制御メモリ、14〜23・・・・・・時分割多重ハイウ
ェイ、24〜30・・・・・・制御線、35・・・・・
・セレクトスイッチ。 1N−ノ1 箔1図 第2場
FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a block diagram showing an example of a call path concentrator of a conventional time division switch. 1.3.6...First communication path memory, 2,415
...Second communication path memory, 7 to 13...
Control memory, 14-23... Time division multiplex highway, 24-30... Control line, 35...
・Select switch. 1N-no1 Foil 1 Figure Scene 2

Claims (1)

【特許請求の範囲】 それぞれシーケンシャル書き込みおよびランダム読み出
しを行なうよう動作し少なくとも1つが少なくとも1つ
の時分割多重上りハイウェイに接続し、かつ少なくとも
他の1つが少なくとも1つの時分割多重下りハイウェイ
に接続した複数の第1通話路メモリと、 これらの第1通話路メモリに接続された前記上りおよび
下りハイウェイに接続し時分割の単位時間毎にこれら上
りおよび下りハイウェイのうちの1つのハイウェイ上の
情報を選択し少なくとも1つの時分割多重ジャンクタハ
イウェイに集線出力するセレクトスイッチと、 このセレクトスイッチの出力情報を受けるよう前記ジャ
ンクタハイウェイに接続し前記出力情報に対するシーケ
ンシャル書き込みおよびランダム読み出しを行なうよう
動作する複数の第2通話路メモリと、 を備えたことを特徴とする通話路集線装置。
Claims: a plurality of devices, each operable for sequential writes and random reads, at least one connected to at least one time division multiplexed up highway and at least one other connected to at least one time division multiplexed down highway; and the up and down highways connected to these first communication path memories, and select information on one of the up and down highways for each unit time of time division. a select switch for concentrating output to at least one time-division multiplexed junctor highway; and a plurality of select switches connected to the junctor highway to receive output information from the select switch and operating to perform sequential writing and random reading of the output information. A communication path concentrator comprising: a second communication path memory;
JP18333885A 1985-08-20 1985-08-20 Channel line concentrator Granted JPS6243300A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18333885A JPS6243300A (en) 1985-08-20 1985-08-20 Channel line concentrator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18333885A JPS6243300A (en) 1985-08-20 1985-08-20 Channel line concentrator

Publications (2)

Publication Number Publication Date
JPS6243300A true JPS6243300A (en) 1987-02-25
JPH0417598B2 JPH0417598B2 (en) 1992-03-26

Family

ID=16133973

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18333885A Granted JPS6243300A (en) 1985-08-20 1985-08-20 Channel line concentrator

Country Status (1)

Country Link
JP (1) JPS6243300A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4664426B2 (en) 2009-09-14 2011-04-06 株式会社エヌシィシィ Walking stick

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5769965A (en) * 1980-10-21 1982-04-30 Nec Corp Remote station communicating system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5769965A (en) * 1980-10-21 1982-04-30 Nec Corp Remote station communicating system

Also Published As

Publication number Publication date
JPH0417598B2 (en) 1992-03-26

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