JPS6242511A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS6242511A
JPS6242511A JP18217985A JP18217985A JPS6242511A JP S6242511 A JPS6242511 A JP S6242511A JP 18217985 A JP18217985 A JP 18217985A JP 18217985 A JP18217985 A JP 18217985A JP S6242511 A JPS6242511 A JP S6242511A
Authority
JP
Japan
Prior art keywords
film
substrate
opening
insulating film
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18217985A
Other languages
Japanese (ja)
Inventor
Masahiro Susa
匡裕 須佐
Eiji Fujii
英治 藤井
Yoshimitsu Hiroshima
広島 義光
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP18217985A priority Critical patent/JPS6242511A/en
Publication of JPS6242511A publication Critical patent/JPS6242511A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To manufacture a high-quality recrystallized film whose orientation is suitably controlled by a method wherein an insulating film is formed on a substrate, an opening is provided in its part, a single crystalline semiconductor layer is embedded in the opening, and a polycrystalline semiconductor film is formed on the insulating film and recrystallized. CONSTITUTION:An SiO2 film is grown on a P-type Si substrate 1 in water vapor with thermal oxidation for specified time. Then, an opening section reaching the substrate is formed with photolithography and reactive ion-etching with CF4 and H2 as etchant. A single crystalline Si layer is formed within the opening with selective epitaxial growth. After that, a poly-Si film 3 is deposited with depression CVD method which thermally decomposites SiH4 gas. A substrate structure is obtained with photolithography and plasma etching with CF4 and O2 as etchant. Then, the substrate is annealed with CW-AR laser to recrystallize the film 3.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は3次元回路素子等に用いることができる半導体
装置の製造方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a method of manufacturing a semiconductor device that can be used for three-dimensional circuit elements and the like.

従来の技術 近年、半導体装置の製造方法は、ますます高度化・複雑
化されており、3次元回路素子の提案によって、その傾
向には一層拍車がかけられ、5OI(シリコン・オン・
インシュレータ)技術が非常に注目を集めるようになっ
た。また、そのSOI技術のなかでも、良質な再結晶S
iが得られることから、ラテラル・シーディング法を用
いたレーザ再結晶技術は有望視されている。
Conventional technology In recent years, semiconductor device manufacturing methods have become increasingly sophisticated and complex, and the proposal of three-dimensional circuit elements has further accelerated this trend.
(Insulator) technology has started to attract a lot of attention. In addition, among the SOI technologies, high-quality recrystallized S
Since i can be obtained, laser recrystallization technology using the lateral seeding method is considered promising.

以下、図面を参照しながら、上述したような従来の半導
体装置の製造方法について説明する。
Hereinafter, a conventional method for manufacturing a semiconductor device as described above will be described with reference to the drawings.

第3図は従来の半導体装置の製造方法の基板断面構造を
示すものである。第3図において、1はSL基板、2は
S i 02膜、3はポリSi膜である。
FIG. 3 shows a cross-sectional structure of a substrate in a conventional method for manufacturing a semiconductor device. In FIG. 3, 1 is an SL substrate, 2 is an Si 02 film, and 3 is a poly-Si film.

矢印の方向にレーザ・スキャンを行なうことにより、S
t基板1を種結晶として、ポリSi膜3は再結晶化され
る。
By performing laser scanning in the direction of the arrow, S
The poly-Si film 3 is recrystallized using the t-substrate 1 as a seed crystal.

発明が解決しようとする問題点 しかしながら、上記のような構成では、ボ1Jsi膜3
にレーザ照射が行なわれ、ボ1Jsi膜3が溶融したと
きに、溶融St とSi○2膜2とのぬれ性が悪いこと
とS i 02膜2の段差によって、ポリ31膜3がし
ばしば切れてしまうという欠点を有していた。
Problems to be Solved by the Invention However, in the above configuration, the 1Jsi film 3
When laser irradiation is performed and the Bo1Jsi film 3 is melted, the poly 31 film 3 is often cut due to the poor wettability between the molten St and the Si○2 film 2 and the step difference in the SiO2 film 2. It had the disadvantage of being stored away.

本発明は上記欠点に鑑み、ボ17si膜の切断を起こす
ことなく、ボIJSi膜のレーザ再結晶化をすることの
できる半導体装置の製造方法を提供するものである。
In view of the above drawbacks, the present invention provides a method for manufacturing a semiconductor device in which laser recrystallization of a BoIJSi film can be performed without cutting the BoIJSi film.

問題点を解決するための手段 上記問題点を解決するために、本発明の半導体装置の製
造方法は、基板上に絶縁膜を形成する工程と、前記絶縁
膜の一部に基板まで達する開口部を形成する工程と、前
記開口部に単結晶半導体層を埋めこむ工程と、前記単結
晶半導体層と絶縁膜上に多結晶半導体膜を形成する工程
と、前記多結晶半導体膜を再結晶化する工程から構成さ
れている。
Means for Solving the Problems In order to solve the above problems, the method for manufacturing a semiconductor device of the present invention includes a step of forming an insulating film on a substrate, and forming an opening in a part of the insulating film reaching the substrate. , burying a single crystal semiconductor layer in the opening, forming a polycrystalline semiconductor film on the single crystal semiconductor layer and the insulating film, and recrystallizing the polycrystalline semiconductor film. It consists of processes.

作  用 この構成によれば、種結晶となる単結晶半導体層と絶縁
膜との段差が解消されるだめ、多結晶半導体膜の溶融時
における切断を防ぐことができ、良質の単結晶化膜を得
ることができる。
Function: According to this configuration, the difference in level between the single crystal semiconductor layer serving as a seed crystal and the insulating film is eliminated, so that cutting during melting of the polycrystalline semiconductor film can be prevented, and a high quality single crystal film can be obtained. Obtainable.

実施例 以下、本発明の一実施例について、図面を参照しながら
説明する。
EXAMPLE Hereinafter, an example of the present invention will be described with reference to the drawings.

第1図は本発明の一実施例における半導体装置の製造方
法の基板断面構造を示すものである。第1図において、
1はSi基板、2はS i02膜、3はポ1Jsi膜、
4は単結晶S’i層である。
FIG. 1 shows a cross-sectional structure of a substrate in a method of manufacturing a semiconductor device according to an embodiment of the present invention. In Figure 1,
1 is a Si substrate, 2 is a Si02 film, 3 is a Po1Jsi film,
4 is a single crystal S'i layer.

第2図べ本実施例の製造工程を説明するものであって第
2図(a)に示すごとく、P形のたとえば10Ω・cm
(D S i基板1に、水蒸気中、1000°Cで約5
時間の熱酸化により、5102膜を厚さ約1μmを成長
させる。次に同図Φ)のように、光りソグラフィ技術と
、CF4とH2をエッチャントとする反応性イオンエツ
チングによって、基板に達する開口部を形成する。続い
て、同図(C)のように、前記開口部中に、選択エヒリ
キシャル成長を行ない、単結晶Si層を形成する。その
後、S IH4ガスを熱分解する減圧CVD法で、厚さ
約0.5μmのポリSi膜3を堆積し、光リングラフィ
技術とCF4と02をエッチャントとするプラズマエッ
チで、第1図のような基板構造を得た。次に、CW−ア
ルゴン・レーザでアニールして、ポリSi膜3の再結晶
化を行なった。レーザ・アニールば、空気中で、基板温
度400’C,レーザのスキャンスピード20cm/ 
S +レーザ・スポットサイズ4011mjレーザ出力
8Wの条件下で行なった。
Figure 2 (a) explains the manufacturing process of this example.
(D Si substrate 1 was heated in water vapor at 1000°C for about 5
A 5102 film is grown to a thickness of about 1 μm by thermal oxidation for a period of time. Next, as shown in Φ) in the same figure, an opening reaching the substrate is formed by photolithography and reactive ion etching using CF4 and H2 as etchants. Subsequently, as shown in FIG. 3C, selective epitaxial growth is performed in the opening to form a single crystal Si layer. Thereafter, a poly-Si film 3 with a thickness of approximately 0.5 μm is deposited using a low pressure CVD method that thermally decomposes the SIH4 gas, and is then deposited using photophosphorography technology and plasma etching using CF4 and 02 as etchants, as shown in Figure 1. A new substrate structure was obtained. Next, the poly-Si film 3 was recrystallized by annealing with a CW-argon laser. For laser annealing, in air, substrate temperature 400'C, laser scanning speed 20cm/
The experiment was conducted under the conditions of S + laser, spot size 4011 mj, and laser output 8 W.

以上のように、本実施例によれば、基板上に絶縁膜を形
成する工程と、前記絶縁膜の一部に基板まで達する開口
部を形成する工程と、前記開口部に単結晶半導体層を埋
めこむ工程と、前記単結晶半導体層と絶縁膜上の多結晶
半導体膜を形成する工程と、前記多結晶半導体膜を再結
晶化する工程を設けることにより、レーザ照射時にボ1
Jsi膜を切断することなく、配向性のよく制御された
良質の再結晶Si膜を形成することができる。
As described above, according to this embodiment, there are a step of forming an insulating film on a substrate, a step of forming an opening reaching the substrate in a part of the insulating film, and a step of forming a single crystal semiconductor layer in the opening. By providing a burying step, a step of forming a polycrystalline semiconductor film on the single crystal semiconductor layer and an insulating film, and a step of recrystallizing the polycrystalline semiconductor film, it is possible to eliminate the voids during laser irradiation.
A high-quality recrystallized Si film with well-controlled orientation can be formed without cutting the Jsi film.

発明の効果 以上のように、本発明は、基板上に絶縁膜を形成する工
程と、前記絶縁膜の一部に基板まで達する開口部を形成
する工程と、前記開口部に単結晶半導体層を埋めこむ工
程と、前記単結晶半導体層と絶縁膜上に多結晶半導体膜
を形成する工程と、前記多結晶半導体膜を再結晶化する
工程を設けることにより、レーザ照射時にポリSi膜を
凝縮・切断することなく、配向性のよく制御された良質
の再結晶Si膜の形成を実現できるものである。
Effects of the Invention As described above, the present invention includes a step of forming an insulating film on a substrate, a step of forming an opening extending to the substrate in a part of the insulating film, and a step of forming a single crystal semiconductor layer in the opening. By providing a burying step, a step of forming a polycrystalline semiconductor film on the single crystal semiconductor layer and the insulating film, and a step of recrystallizing the polycrystalline semiconductor film, the polySi film can be condensed and It is possible to form a high-quality recrystallized Si film with well-controlled orientation without cutting.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例における半導体装置の製造方
法の基板構造断面図、第2図は本発明の一実施例におけ
る半導体装置の製造工程断面図、第3図は従来の半導体
装置の製造方法における基板構造断面図である。 1・・・・・・SL基板、2・・・・・S i02膜、
3・・・・・ポリSi膜、4・・・・・単結晶St層。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名/−
,5,基板 第1図       1−.5rOz&3−m−ポリ5
1μ( 4−羊趙に5iA 1−jσヨ4彦:(ン 第 2 区 (α) (J) (C)
FIG. 1 is a sectional view of a substrate structure in a method of manufacturing a semiconductor device according to an embodiment of the present invention, FIG. 2 is a sectional view of a manufacturing process of a semiconductor device according to an embodiment of the present invention, and FIG. 3 is a sectional view of a conventional semiconductor device FIG. 3 is a cross-sectional view of the substrate structure in the manufacturing method. 1...SL substrate, 2...S i02 film,
3... Poly-Si film, 4... Single crystal St layer. Name of agent: Patent attorney Toshio Nakao and 1 other person/-
, 5, Board Figure 1 1-. 5rOz&3-m-poly5
1μ (4-Yang Zhao to 5iA 1-jσyo 4hiko: (N 2nd Ward (α) (J) (C)

Claims (1)

【特許請求の範囲】[Claims] 基板上に絶縁膜を形成する工程と、前記絶縁膜の一部に
開口部を形成する工程と、前記開口部に単結晶半導体層
を埋めこむ工程と、前記単結晶半導体層と絶縁膜上に多
結晶半導体膜を形成する工程と、前記多結晶半導体膜を
再結晶化する工程とを備えたことを特徴とする半導体装
置の製造方法。
forming an insulating film on a substrate; forming an opening in a part of the insulating film; burying a single crystal semiconductor layer in the opening; A method for manufacturing a semiconductor device, comprising the steps of forming a polycrystalline semiconductor film and recrystallizing the polycrystalline semiconductor film.
JP18217985A 1985-08-20 1985-08-20 Manufacture of semiconductor device Pending JPS6242511A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18217985A JPS6242511A (en) 1985-08-20 1985-08-20 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18217985A JPS6242511A (en) 1985-08-20 1985-08-20 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS6242511A true JPS6242511A (en) 1987-02-24

Family

ID=16113720

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18217985A Pending JPS6242511A (en) 1985-08-20 1985-08-20 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS6242511A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5402989A (en) * 1991-06-11 1995-04-04 Rohm Co., Ltd. Method for manufacturing semiconductor device having grown layer on insulating layer
JP4509215B2 (en) * 2007-05-21 2010-07-21 パイオニア株式会社 Navigation device, control method, control program, and recording medium

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5402989A (en) * 1991-06-11 1995-04-04 Rohm Co., Ltd. Method for manufacturing semiconductor device having grown layer on insulating layer
JP4509215B2 (en) * 2007-05-21 2010-07-21 パイオニア株式会社 Navigation device, control method, control program, and recording medium
JPWO2008142775A1 (en) * 2007-05-21 2010-08-05 パイオニア株式会社 Navigation device, control method, control program, and recording medium

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