JPS6241027A - Manufacture of substrate for wiring - Google Patents
Manufacture of substrate for wiringInfo
- Publication number
- JPS6241027A JPS6241027A JP60182635A JP18263585A JPS6241027A JP S6241027 A JPS6241027 A JP S6241027A JP 60182635 A JP60182635 A JP 60182635A JP 18263585 A JP18263585 A JP 18263585A JP S6241027 A JPS6241027 A JP S6241027A
- Authority
- JP
- Japan
- Prior art keywords
- paper
- heater
- resin
- substrate
- heating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Laminated Bodies (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
Description
【発明の詳細な説明】
(a)技術分野
この発明は基板の材質して樹脂を混在させた紙を用いる
祇フェノール基板や紙エポキシ基板等の配線用基板の製
造方法に関する。DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field The present invention relates to a method of manufacturing a wiring board such as a phenol board or a paper epoxy board using paper mixed with resin as the material of the board.
(bl従来技術とその欠点
従来、紙フェノール基板や紙エポキシ基板等の配線用基
板は、第2図に示すように出発基材としてローラ1に巻
かれたシート状の紙を用い、このシート状の紙をローラ
3.4で搬送しながら樹脂槽4.5を通して紙白に樹脂
を混在させ、次いでローラ7を介して乾燥工程へ送って
乾燥させ、さらにその乾燥した紙を裁断するとともに、
複数段重ね合わせて上下両面に銅箔を載せて加熱、加圧
するようにしていた。第3図はそのようにして製造され
た配線用基板の断面図を示している。図において10は
複数段に積層された紙を示しており、その上下両面に銅
箔11,12が接着固定されている。祇フェノール基板
は樹脂にフェノール樹脂が用いられ、祇エポキシ基板は
樹脂にエポキシ樹脂が用いられる。このようにして製造
された配線用基板は続いて回路パターンの形成工程およ
びエツチング工程へと送られる。(bl Prior Art and Its Disadvantages) Conventionally, wiring boards such as paper phenol boards and paper epoxy boards use a sheet of paper wound around a roller 1 as a starting base material, as shown in FIG. While conveying the paper with rollers 3.4, resin is mixed with the white paper through a resin tank 4.5, and then sent to a drying process via rollers 7 to be dried, and furthermore, the dried paper is cut,
They were stacked in multiple layers and copper foil was placed on both the top and bottom surfaces to heat and pressurize them. FIG. 3 shows a cross-sectional view of the wiring board manufactured in this manner. In the figure, reference numeral 10 indicates a sheet of paper stacked in multiple stages, and copper foils 11 and 12 are adhesively fixed to the upper and lower surfaces of the paper. A phenol resin is used for the resin of the Mio phenol board, and an epoxy resin is used for the resin of the Mio epoxy board. The wiring board manufactured in this manner is then sent to a circuit pattern forming process and an etching process.
しかしながら、従来、このようにして製造された配線用
基板は後のエツチング工程や半田レジスト、メンキレジ
スト膜を形成するとき等に基板全体が収縮し、パターン
の位置合わせに誤差が生じる不都合があった。特に、エ
ツチングを行うときに太き(収縮し、また半田レジスト
膜やメソキレシスト膜を形成するときにも少しずつ収縮
する不都合があった。このように特に祇フェノール基板
や祇エポキシ基板を製造するときに生じる基板全体の収
縮の原因は、樹脂を混在した紙を複数段に積層してその
上下両面から銅箔を押し付けた状態にしておくために、
その銅箔の存在によって外部から熱が加えられても紙自
身は縮小することができず、またその後エツチングした
ときにはエツチングによって銅箔の面積が少なくなり、
紙の収縮を押えようとする力が急激に減少するからであ
る。さらに、半田レジスト膜やメツキレシスト膜を形成
するときにはレジスト膜焼き付けによって100数十度
に熱されるため、その熱によって紙がさらに縮小するか
らである。Conventionally, however, wiring boards manufactured in this manner have had the disadvantage that the entire board shrinks during the subsequent etching process or when forming a solder resist or Menki resist film, resulting in errors in pattern alignment. In particular, there was the problem that the film thickened (shrank) during etching, and also gradually shrunk when forming a solder resist film or a mesochyresist film. The reason for the shrinkage of the entire board is that paper mixed with resin is stacked in multiple layers and copper foil is pressed from both the top and bottom surfaces.
Due to the presence of the copper foil, the paper itself cannot be shrunk even when heat is applied from the outside, and when it is etched afterwards, the area of the copper foil decreases due to etching.
This is because the force that tries to suppress the shrinkage of the paper rapidly decreases. Furthermore, when a solder resist film or a metal resist film is formed, the resist film is baked to a temperature of 100-odd degrees, and the paper further shrinks due to the heat.
このように従来の配線用の祇フェノール基板や祇エポキ
シ基板を製造する方法では、回路形成のためのエツチン
グ時やレジストパターンを形成す、 るときに基板全体
が縮小するため、正確なパターンの位置合わせができず
、正確なパターン位置合わせをしようとすれば途中で何
回もパターン再位置合わせのための写真撮影等が必要で
あった。In this way, in the conventional method of manufacturing Mio phenol substrates and Mio epoxy substrates for wiring, the entire substrate shrinks during etching for circuit formation and when forming resist patterns, making it difficult to accurately position the pattern. If pattern alignment is to be performed accurately, it is necessary to take photographs to realign the patterns many times during the process.
(C)発明の目的
この発明の目的は、簡単な工程を付加することによって
上記の欠点を解消することのできる配線用基板の製造方
法を提供することにある。(C) Purpose of the Invention An object of the present invention is to provide a method for manufacturing a wiring board that can eliminate the above-mentioned drawbacks by adding simple steps.
(d1発明の構成および効果
この発明は、出発基材として紙を用い、この紙を略完全
に収縮するまで加熱し、次いで樹脂を混在させて上下両
面に銅箔を載せて加熱、加圧することを特徴する。(d1 Structure and effect of the invention This invention uses paper as a starting base material, heats the paper until it almost completely shrinks, then mixes resin, places copper foil on both the top and bottom, and heats and pressurizes the paper. It is characterized by
このように構成することでこの発明によれば、樹脂を混
在させる前に紙を略完全に収縮するまで加熱するため、
上下両面に銅箔を載せて加熱、加圧するときに紙が伸び
きった状態になっていない。即ち、紙が略完全に収縮し
た状態でその上下両面に銅箔が接着されることになる。With this configuration, according to the present invention, the paper is heated until it almost completely shrinks before being mixed with the resin.
When copper foil is placed on both the top and bottom and heated and pressurized, the paper is not fully stretched. In other words, the copper foil is bonded to both the upper and lower surfaces of the paper in a substantially completely shrunk state.
したがって、後のエツチング工程において基板が収縮す
ることがな(、また半田レジスト工程やメッキレジスト
工程においても基板が収縮することがない。それ故、エ
ツチング時やレジスト膜を形成するときに正確なパター
ン位置合わせを行うことができ、途中でパターンの再位
置合わせのための写真撮影等が不要となる利点がある。Therefore, the substrate will not shrink in the subsequent etching process (and will not shrink in the soldering resist process or plating resist process. Positioning can be performed, and there is an advantage that there is no need to take photographs or the like to realign the pattern midway.
tel実施例
第1図はこの発明に係る祇フェノール基板製造方法の一
部を示す図である。TELE EXAMPLE FIG. 1 is a diagram showing a part of the method for manufacturing a phenol substrate according to the present invention.
図において、ローラ1に巻回されたシート状の祇2は駆
動ローラ20によって前方に搬送され、加熱器21を経
てローラ3の位置へ搬送される。In the figure, a sheet-shaped rug 2 wound around a roller 1 is conveyed forward by a driving roller 20, passed through a heater 21, and is conveyed to a position of a roller 3.
ローラ3の後方は、第2図に示す装置と同様であって樹
脂槽5,6に浸積されて乾燥工程へと搬送されていく。The rear part of the roller 3 is similar to the apparatus shown in FIG. 2, and the resin is immersed in resin tanks 5 and 6 and transported to the drying process.
駆動ローラ20からローラ3の間ではシート状の紙2が
U字状に垂れ下がる状態に保持される。このU字状の状
態の保持はホトセンサ22と駆動ローラ20を制御する
駆動ローラ制御部23によって制御される。祇2がセン
サ22の位置に届いていないときには、駆動ローラ制御
部23によって駆動ローラ20による祇2の搬送量を増
加させる。また紙2がセンサ22の位置を越えたときに
は駆動ローラ20による祇2の搬送量を減少させる。こ
のような制御を連続して行うことにより、U字形状をし
だ祇2の最下位置はセンサ22の位置に一致する。駆動
ローラ20とローラ3間において、このように祇2をU
字状に垂れ下がった状態にすることにより、祇2が加熱
器21を通過するとき十分に収縮する。即ち、加熱器2
1を通過するときに祇2に対してテンションが加わって
いないために紙白に内部応力が生じることなく熱によっ
て十分に収縮するようになる。尚、加熱器21の加熱温
度は100℃〜200℃程度が好ましい。また加熱器2
1はヒータを利用するものや熱風を放射する構造のもの
でもよ(、その他公知の手段で構成することができる。A sheet of paper 2 is held hanging down in a U-shape between the drive roller 20 and the roller 3. Maintaining this U-shaped state is controlled by the photosensor 22 and a drive roller control section 23 that controls the drive roller 20. When the bulge 2 has not reached the position of the sensor 22, the drive roller control unit 23 increases the amount of pupil 2 carried by the drive roller 20. Further, when the paper 2 exceeds the position of the sensor 22, the amount of conveyance of the paper 2 by the drive roller 20 is reduced. By continuously performing such control, the lowest position of the U-shaped shidagi 2 coincides with the position of the sensor 22. Between the drive roller 20 and the roller 3, the G2 is
By hanging down in the shape of a letter, when the gill 2 passes through the heater 21, it is sufficiently contracted. That is, heater 2
Since no tension is applied to the wire 2 when the paper passes through the paper 1, no internal stress is generated in the white paper, and it is able to sufficiently shrink due to heat. Note that the heating temperature of the heater 21 is preferably about 100°C to 200°C. Also heater 2
1 may use a heater or have a structure that radiates hot air (or may be configured by other known means).
以上のようにして樹脂を混在させる前に紙を加熱して略
完全に収縮させることにより、後にエツチングを行うと
きやレジスト膜を形成するときに基板が収縮するのを防
ぐことができる。By heating the paper to almost completely shrink it before mixing the resin as described above, it is possible to prevent the substrate from shrinking when etching is performed later or when a resist film is formed.
第1図はこの発明に係る製造方法の一部を説明する図で
ある。また第2図は従来の製造方法を説明する図、第3
図は出発基材として紙を用いた配線用基板の断面図であ
る。
2−紙、11.12−銅箔、21−加熱器。FIG. 1 is a diagram illustrating a part of the manufacturing method according to the present invention. Also, Fig. 2 is a diagram explaining the conventional manufacturing method, and Fig. 3 is a diagram explaining the conventional manufacturing method.
The figure is a cross-sectional view of a wiring board using paper as a starting base material. 2-paper, 11.12-copper foil, 21-heater.
Claims (1)
するまで加熱し、次いで樹脂を混在させて上下両面に銅
箔を載せて加熱、加圧することを特徴する配線用基板の
製造方法。(1) Manufacturing a wiring board using paper as a starting base material, heating the paper until it almost completely shrinks, then mixing resin with it, placing copper foil on the top and bottom surfaces, and heating and pressurizing it. Method.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60182635A JPS6241027A (en) | 1985-08-19 | 1985-08-19 | Manufacture of substrate for wiring |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60182635A JPS6241027A (en) | 1985-08-19 | 1985-08-19 | Manufacture of substrate for wiring |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6241027A true JPS6241027A (en) | 1987-02-23 |
Family
ID=16121736
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP60182635A Pending JPS6241027A (en) | 1985-08-19 | 1985-08-19 | Manufacture of substrate for wiring |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6241027A (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5222791A (en) * | 1975-08-14 | 1977-02-21 | Matsushita Electric Ind Co Ltd | Resister material |
-
1985
- 1985-08-19 JP JP60182635A patent/JPS6241027A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5222791A (en) * | 1975-08-14 | 1977-02-21 | Matsushita Electric Ind Co Ltd | Resister material |
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