JPS6240843B2 - - Google Patents
Info
- Publication number
- JPS6240843B2 JPS6240843B2 JP53049490A JP4949078A JPS6240843B2 JP S6240843 B2 JPS6240843 B2 JP S6240843B2 JP 53049490 A JP53049490 A JP 53049490A JP 4949078 A JP4949078 A JP 4949078A JP S6240843 B2 JPS6240843 B2 JP S6240843B2
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- raw ceramic
- powder
- ceramic sheet
- laminate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000000919 ceramic Substances 0.000 claims description 19
- 238000000034 method Methods 0.000 claims description 15
- 239000000203 mixture Substances 0.000 claims description 14
- 239000000843 powder Substances 0.000 claims description 11
- 239000011230 binding agent Substances 0.000 claims description 10
- 238000004519 manufacturing process Methods 0.000 claims description 9
- 238000000605 extraction Methods 0.000 claims description 8
- 238000005245 sintering Methods 0.000 claims description 8
- 239000003985 ceramic capacitor Substances 0.000 claims description 7
- 239000002184 metal Substances 0.000 claims description 6
- 229910052751 metal Inorganic materials 0.000 claims description 6
- 239000002003 electrode paste Substances 0.000 claims description 5
- 238000010030 laminating Methods 0.000 claims description 2
- 239000011521 glass Substances 0.000 description 3
- 150000002739 metals Chemical class 0.000 description 3
- 238000007606 doctor blade method Methods 0.000 description 2
- 238000001035 drying Methods 0.000 description 2
- 238000010304 firing Methods 0.000 description 2
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000002002 slurry Substances 0.000 description 2
- 239000002904 solvent Substances 0.000 description 2
- 239000004925 Acrylic resin Substances 0.000 description 1
- 229910001252 Pd alloy Inorganic materials 0.000 description 1
- 239000004372 Polyvinyl alcohol Substances 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 230000014759 maintenance of location Effects 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- KDLHZDBZIXYQEI-UHFFFAOYSA-N palladium Substances [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 1
- SWELZOZIOHGSPA-UHFFFAOYSA-N palladium silver Chemical compound [Pd].[Ag] SWELZOZIOHGSPA-UHFFFAOYSA-N 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 229920002037 poly(vinyl butyral) polymer Polymers 0.000 description 1
- 229920002451 polyvinyl alcohol Polymers 0.000 description 1
- 229910052573 porcelain Inorganic materials 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
Landscapes
- Ceramic Capacitors (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
Description
本発明は積層磁器コンデンサの製造方法に関
し、とくに積層磁器コンデンサの外部取出し用電
極焼付工程の生産性を著しく向上させる方法に関
する。
積層磁器コンデンサを製造する工程の中で、表
面に導電性ペーストを印刷したセラミツク生シー
トを含む複数枚のセラミツク生シートを積層圧着
し一体化して積層体となし、これを未焼成チツプ
に分断し、出来上つた未焼成チツプを焼成し、焼
結の完了したチツプに外部取り出し用電極を塗布
し、焼付ける工程がある。
この工程は焼結の終つたチツプが小さいために
外部取出し用電極を塗布する際、チツプを整列す
るのに非常に手間がかかり、自動化の努力もされ
ているが、焼結によつてチツプが反り、ゆがみな
どの変形を生じているため、自動機にうまくかか
らないものが多く、歩留を著しく低下させ、この
ために大量生産コスト低減がむずかしい状態にあ
つた。
本発明の目的は上記のような問題点を工程を変
更することによつて取り除き、大量生産が可能と
なり、大幅な工程短縮および歩留り向上に伴なう
大幅なコストダウンが可能となる積層磁器コンデ
ンサの製造方法を提供することにある。
すなわち本発明によれば、表面に導電性ペース
トを印刷したセラミツク生シートを複数枚積層し
てなる積層体を所定の形状に分断し、これに無機
結合剤としてセラミツク生シートと同一組成粉末
（共材）を含む金属電極ペーストを外部取り出し
用電極として塗布して積層体の焼結と外部取り出
し用電極の焼付けとを同時に行なうことを特徴と
する積層磁器コンデンサの製造方法が得られる。
これにより、電極焼付工程を省略し、焼結を行な
うまえに外部取出し用電極を塗布するため、チツ
プの変形がないため、自動機にかける場合、歩留
が著しく上昇し、ほぼ100％近い歩留が得られ、
大量生産、大幅なコストダウンが可能になつた。
以下実施例によつて本発明を詳細に説明する。
実施例 １
Pb（Fe2/3W1/3）O3−Pb（Fe1/2Nb1/2）
O3系組成物を主成分とする粉末をポリビニルア
ルコール系またはポリアクリル樹脂系バインダー
とともに溶媒中に分散しスラリー状とする。
これをドクターブレード法によつて30μｍ〜
200μｍ程度の厚さの均一なセラミツク生シート
にする。このセラミツク生シートを60mm×40mmの
矩形に打ち抜き、表面に導電性ペーストを用いて
印刷し、このセラミツク生シートを含む複数枚の
セラミツク生シートを積層圧着し、一体の積層体
となす。この積層を切断刃によつて分断し、未焼
成チツプを作る。
分断した未焼成チツプの取り出し電極側に、銀
パラジウム合金粉末と無機結合剤としてのセラミ
ツク生シートと同一組成粉末と混合した電極ペー
ストをデイツプ法により塗布する。塗布後80℃で
乾燥し、乾燥後、800〜1100℃の間の一定温度で
１時間焼結する。
焼結の終つた試料の外部取出し電極にリード線
をハンダ付し、誘電特性の測定を行なつた。その
結果を第１表に示す。
容量(c)および誘電損失（tanδ）は1KHzの交
流でキヤパシタンスブリツジを用いて求めた。
−30℃〜＋85℃の温度範囲で容量を測定し、＋
20℃における容量の値を基準とした時の容量の温
度安定度を測定した。
The present invention relates to a method for manufacturing a multilayer ceramic capacitor, and more particularly to a method for significantly improving the productivity of the process of baking external electrodes of a multilayer ceramic capacitor. In the process of manufacturing multilayer ceramic capacitors, multiple raw ceramic sheets, including raw ceramic sheets with conductive paste printed on their surfaces, are laminated and pressure bonded to form a laminate, which is then cut into unfired chips. There is a step of firing the completed unfired chip, applying an electrode for external extraction to the sintered chip, and baking it. This process requires a lot of effort to align the chips when applying the electrodes for external extraction because the chips after sintering are small, and efforts are being made to automate this process, but sintering makes the chips smaller. Due to warpage, distortion, and other deformations, many of these products do not work well with automatic machines, significantly reducing yields and making it difficult to reduce mass production costs. The purpose of the present invention is to eliminate the above-mentioned problems by changing the process, thereby making it possible to mass produce a multilayer porcelain capacitor that can significantly shorten the process and significantly reduce costs by improving yield. The purpose of this invention is to provide a method for manufacturing the same. That is, according to the present invention, a laminate formed by laminating a plurality of raw ceramic sheets with a conductive paste printed on the surface is cut into a predetermined shape, and a powder having the same composition as the raw ceramic sheet as an inorganic binder is added to the laminated body. There is obtained a method for manufacturing a multilayer ceramic capacitor, which is characterized in that a metal electrode paste containing a material) is applied as an electrode for external extraction, and sintering of the laminate and baking of the electrode for external extraction are performed simultaneously.
As a result, the electrode baking process is omitted and the electrode for external extraction is applied before sintering, so there is no deformation of the chip, so when it is run on an automatic machine, the yield rate increases significantly, approaching 100%. Retention is obtained,
Mass production and significant cost reductions have become possible. The present invention will be explained in detail below with reference to Examples. Example 1 Pb(Fe 2/3 W 1/3 )O 3 −Pb(Fe 1/2 Nb 1/2 )
A powder containing an O 3 composition as a main component is dispersed in a solvent together with a polyvinyl alcohol-based or polyacrylic resin-based binder to form a slurry. This is 30μm ~ by doctor blade method.
Make a uniform raw ceramic sheet with a thickness of about 200μm. This raw ceramic sheet is punched out into a rectangle of 60 mm x 40 mm, the surface is printed with a conductive paste, and a plurality of raw ceramic sheets, including this raw ceramic sheet, are laminated and pressure-bonded to form an integral laminate. This laminated layer is divided by a cutting blade to produce unfired chips. An electrode paste made of a mixture of silver-palladium alloy powder, raw ceramic sheet as an inorganic binder, and powder of the same composition is applied to the extraction electrode side of the divided unfired chip by the dip method. After coating, it is dried at 80°C, and after drying, it is sintered at a constant temperature between 800 and 1100°C for 1 hour. A lead wire was soldered to the external electrode of the sample after sintering, and the dielectric properties were measured. The results are shown in Table 1. Capacitance (c) and dielectric loss (tanδ) were determined using a capacitance bridge at 1KHz alternating current. Capacity is measured in the temperature range of -30℃ to +85℃, +
The temperature stability of the capacitance was measured based on the capacitance value at 20°C.
【表】
実施例 ２
Pb（Fe2/3W1/3）O3−Pb（Zn1/3Nb2/3）
O3系組成物を主成分とする粉末をポリビニルブ
チラール系バインダーとともに溶媒中に分散し、
スラリー状とする。
これをドクターブレード法によつて30μｍ〜
200μｍ程度の厚さの均一なセラミツク生シート
にする。このセラミツク生シートを60mm×40mmの
矩形に打ち抜き、表面に導電性ペーストを用いて
印刷し、このセラミツク生シートを含む複数枚の
セラミツク生シートを積層圧着し、一体の積層体
となす。この積層体を切断刃によつて分断し、未
焼成チツプを作る。
分断した未焼成チツプの取り出し電極側に銀粉
末に無機結合剤としてのセラミツク生シートと同
一組成粉末を含ませた電極ペーストをデイツプ法
により塗布する。塗布後80℃で乾燥し、乾燥後
800℃〜900℃の間の一定温度で１時間焼結する。
焼結の終つた試料の外部取り出し電極にリード
線をハンダ付けし、誘電特性の測定を行なつた。
その結果を第２表に示す。測定条件は実施例１と
同じ条件である。[Table] Example 2 Pb (Fe 2/3 W 1/3 ) O 3 −Pb (Zn 1/3 Nb 2/3 )
A powder mainly composed of an O 3 composition is dispersed in a solvent together with a polyvinyl butyral binder,
Make into a slurry. This is 30μm ~ by doctor blade method.
Make a uniform raw ceramic sheet with a thickness of about 200μm. This raw ceramic sheet is punched out into a rectangle of 60 mm x 40 mm, the surface is printed with a conductive paste, and a plurality of raw ceramic sheets, including this raw ceramic sheet, are laminated and pressure-bonded to form an integral laminate. This laminate is divided by a cutting blade to produce green chips. An electrode paste containing silver powder and a powder having the same composition as the raw ceramic sheet as an inorganic binder is applied to the electrode side of the separated unfired chip by the dip method. After application, dry at 80℃, and after drying
Sinter at a constant temperature between 800°C and 900°C for 1 hour. A lead wire was soldered to the external electrode of the sample after sintering, and the dielectric properties were measured.
The results are shown in Table 2. The measurement conditions are the same as in Example 1.
【表】
第１表および第２表から明らかなように容量は
充分大きく、誘電損失が小さく、容量の温度変化
率も実用上の規格を充分満足しており、本発明の
製造方法によつて得られた積層磁器コンデンサは
実用に充分耐えうるものである。
なお、参考までに示した無機結合剤としてガラ
スフリツトを使用した試料番号６、７、15、16は
いずれも共材を無機結合剤として使用した試料と
同一容量が出るように設計したにもかかわらず、
容量は1/2程度しか出ず誘電損失も大きな値を示
している。これはガラスフリツドが焼成中にチツ
プ内部に拡散し、誘電体の組成を変化させたため
と推定される。また、参考試料として従来の方法
で製造した試料番号８、９、17、18の特性も、本
発明の製造方法による試料と同一容量が出るよう
に設計したにもかかわらず、容量が2/3程度しか
出ておらず、さらにtanδも大きな値を示してい
る。これも外部電極を焼付ける際に外部電極ペー
スト中に含まれるガラスフリツトがチツプ内に拡
散し、誘電体の組成を変化させたためと考えられ
る。
以上のように本発明はセラミツク生シートと同
一組成物を電極の無機結合剤として使用すること
によつて、誘電体を変質させることなく外部取出
し電極の焼付けと積層体の焼結を同時に行うこと
に成功したものである。
なお、無機結合剤としてのセラミツク生シート
と同一組成粉末の含有量が１重量パーセント以上
40重量パーセント以下のときは外部取出し電極と
誘電体チツプとの密着力が強く、さらに焼付けた
電極に対する半田付け性も非常に優れている。同
一組成粉末の含有量が１重量パーセントを下回る
と外部取出し電極としての密着力が非常に弱くな
り、40重量パーセントを越えると半田付け性が悪
くなる。また本発明における上記同一組成粉末の
含有量は１〜40重量パーセントの範囲であれば良
く、好ましくは５〜40重量パーセントの範囲に選
ばれることが望まれる。
なお外部電極材料としては上記電極以外にも
Pt、Pd、Au単体またはこれらの金属とAgとの４
種類の金属の中から二つ以上を選択して得られる
種々の合金を用いて同様の実験を行なつたが実施
例に示したのと同等の結果を得た。[Table] As is clear from Tables 1 and 2, the capacitance is sufficiently large, the dielectric loss is small, and the temperature change rate of capacitance satisfies practical standards. The obtained multilayer ceramic capacitor is sufficiently durable for practical use. For reference, sample numbers 6, 7, 15, and 16, which used glass frit as an inorganic binder, were all designed to have the same capacity as samples that used a common material as an inorganic binder. ,
The capacitance is only about 1/2, and the dielectric loss is also large. This is presumed to be because the glass frit diffused into the chip during firing and changed the composition of the dielectric. In addition, the characteristics of sample numbers 8, 9, 17, and 18, which were manufactured by the conventional method as reference samples, were designed to have the same capacity as the samples manufactured by the manufacturing method of the present invention, but the capacity was 2/3 In addition, tanδ also shows a large value. This is also thought to be because the glass frit contained in the external electrode paste diffused into the chip when the external electrodes were baked, changing the composition of the dielectric. As described above, the present invention uses the same composition as the raw ceramic sheet as an inorganic binder for the electrode, thereby simultaneously baking the external electrode and sintering the laminate without deteriorating the dielectric. It was a success. In addition, the content of powder with the same composition as the raw ceramic sheet as an inorganic binder is 1% by weight or more.
When it is 40% by weight or less, the adhesion between the external electrode and the dielectric chip is strong, and the solderability to the baked electrode is also very good. If the content of the powder of the same composition is less than 1% by weight, the adhesion as an external electrode becomes extremely weak, and if it exceeds 40% by weight, the solderability deteriorates. Further, the content of the above-mentioned powder having the same composition in the present invention may be in the range of 1 to 40 weight percent, preferably in the range of 5 to 40 weight percent. In addition to the above electrodes, external electrode materials can also be used.
Pt, Pd, Au alone or these metals and Ag
Similar experiments were conducted using various alloys obtained by selecting two or more metals from among various types of metals, and results equivalent to those shown in the Examples were obtained.
Claims (1)
シートを複数枚積層してなる積層体を所定の形状
に分断し、無機結合剤としてセラミツク生シート
と同一組成粉末を含有する金属電極ペーストを外
部取出し用電極として塗布し、前記積層体の焼結
と外部取出し用電極の焼付けとを同時に行なうこ
とを特徴とする積層磁器コンデンサの製造方法。 ２ 前記金属ペーストに含まれる前記セラミツク
生シートと同一組成粉末が１重量パーセントから
40重量パーセントであることを特徴とする特許請
求の範囲第１項記載の積層磁器コンデンサの製造
方法。[Scope of Claims] 1 A laminate made by laminating a plurality of raw ceramic sheets with conductive paste on the surface is cut into a predetermined shape, and a metal containing a powder having the same composition as the raw ceramic sheet as an inorganic binder is cut into a predetermined shape. A method for manufacturing a multilayer ceramic capacitor, characterized in that an electrode paste is applied as an electrode for external extraction, and sintering of the laminate and baking of the electrode for external extraction are performed simultaneously. 2 The metal paste contains powder with the same composition as the raw ceramic sheet from 1% by weight.
40% by weight, the method for manufacturing a multilayer ceramic capacitor according to claim 1.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4949078A JPS54140959A (en) | 1978-04-25 | 1978-04-25 | Method of producing laminated ceramic capacitor |
| US06/203,700 US4325763A (en) | 1978-04-25 | 1980-11-03 | Method of manufacturing ceramic capacitors |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4949078A JPS54140959A (en) | 1978-04-25 | 1978-04-25 | Method of producing laminated ceramic capacitor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS54140959A JPS54140959A (en) | 1979-11-01 |
| JPS6240843B2 true JPS6240843B2 (en) | 1987-08-31 |
Family
ID=12832585
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4949078A Granted JPS54140959A (en) | 1978-04-25 | 1978-04-25 | Method of producing laminated ceramic capacitor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS54140959A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04184281A (en) * | 1990-11-19 | 1992-07-01 | Sankyo Seiki Mfg Co Ltd | Magnetic sensor |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS592305A (en) * | 1982-06-28 | 1984-01-07 | Tdk Corp | Electric parts having external terminal |
| JPS6047411A (en) * | 1983-08-25 | 1985-03-14 | 東光株式会社 | Method of forming electrode of laminar ceramic electronic part |
| JPS60107818A (en) * | 1983-11-16 | 1985-06-13 | 太陽誘電株式会社 | Method of producing laminated porcelain condenser |
| JPH0777085B2 (en) * | 1989-02-28 | 1995-08-16 | 株式会社村田製作所 | Ferrite chip parts |
| JPH02288317A (en) * | 1989-04-28 | 1990-11-28 | Toko Inc | Manufacture of laminated inductor |
| JPH0614495B2 (en) * | 1990-05-09 | 1994-02-23 | 東光株式会社 | Method for manufacturing laminated electronic component |
| JP2584393B2 (en) * | 1992-09-18 | 1997-02-26 | ティーディーケイ株式会社 | Method for manufacturing electric component having external terminal |
| JP6470228B2 (en) | 2016-05-24 | 2019-02-13 | 太陽誘電株式会社 | Multilayer ceramic capacitor |
| JPWO2023002889A1 (en) * | 2021-07-20 | 2023-01-26 | ||
| CN117423549B (en) * | 2023-10-18 | 2024-05-14 | 广东微容电子科技有限公司 | MLCC and MLCC manufacturing method for improving raw inverted adhesive sheet |
-
1978
- 1978-04-25 JP JP4949078A patent/JPS54140959A/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04184281A (en) * | 1990-11-19 | 1992-07-01 | Sankyo Seiki Mfg Co Ltd | Magnetic sensor |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS54140959A (en) | 1979-11-01 |
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