JPS6236568B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a sequence controller, and more specifically, it is equipped with a microprocessor, a memory, and a keyboard, a program is set in the memory by the keyboard, and when a step condition is met, the program is executed next. The present invention relates to a step-by-step sequence controller that uses a so-called "stoward program" method.

The present inventors set up and execute multiple series of programs in parallel, and linked a predetermined step of one series with a predetermined step of another series using an internal flag as a medium, thereby making it possible to communicate between different programs. We have proposed a sequence controller that can control program transitions arbitrarily and in accordance with the progress of phenomena. The present invention has been made in this regard.

An object of the present invention is to provide a step-by-step sequence controller that sets and executes multiple series of programs in parallel, and to provide a plurality of internal flags for controlling program transition between different series. To provide a sequence controller that displays the status using an input display lamp without providing a dedicated display lamp.

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a three-block parallel program according to the present invention will be described below with reference to the drawings.

FIG. 1 shows the configuration of a console front panel according to an embodiment of the present invention.

In the upper left corner is an input/internal flag indicator 1 that displays either the input signal or internal flag as a lamp.
An output display 2 for displaying the output signal with a lamp is provided at the upper right stage. There are 32 inputs and outputs numbered 01 to 32, and 16 internal flags numbered 33 to 48.The internal flag display also serves as the input display lamps numbered 01 to 16. are doing.

In the middle row, from the left, block display 3 displays the W, X, and Y blocks with lamps, step display 4 displays the step number numerically, TIM (time), CNT (count), AND, OR, JMP. (jump), RPT (repetition) SET, 2-OR/AND, etc., and the meaning of the three types of data A, B, and C for each operation are taught. A teaching board 6, data displays 7, 8, and 9 consisting of two-digit numerical displays that display the contents of operation data A, B, and C, and an operating status display that displays the operating status of the machine such as POWER and RUN. The lamps 10 are arranged in parallel. In addition, data display devices 7, 8, 9
The decimal point display indicates the reset state (NOT) of the internal flag.

A keyboard 11 is provided at the center of the lower stage. Types of keys include number keys 0 to 9, key to instruct timer "TIM", key to instruct counter "CNT", key to instruct AND logic "AND", key to instruct OR logic "OR", jump key. Key "JMP" to instruct repeat, key "RPT" to instruct repeat, key "SET" to instruct setting or resetting of internal flag, 2-AND or 2-OR
``2AND/OR'' key to instruct the end of the program, ``END'' key to instruct the end of the program, ``NOP'' key to instruct the operation to stop when an external interrupt occurs, ``NOT'' key to instruct the reversal, ``NOT'' key to instruct the writing of data. Key to instruct "W", key "OUT" to instruct output, key "RSET" to instruct process set, key "ON" to instruct output ON, key "OFF" to instruct output OFF, internal flag status ``IR'' key to confirm the block, ``BLC'' key to change the block.
-INC" is available. In addition, the above “ON” and “OFF”
Each "IR" key is an externally connected cassette tape recorder's operation key "VERI", "REC", and "PLAY".
It is also used as.

A mode changeover switch 12 is provided at the lower right end. The modes selected by this switch 12 are "program mode" and "lock mode".
There are three types of "monitor mode". The program mode is used when setting a program from the keyboard 11 into the built-in memory. Lock mode is a mode used when executing control as a sequence controller, and only the "IR" key on the keyboard functions effectively. The monitor mode is a mode used to monitor the contents of a program during control execution, and only the "IR" and "BLG-ING" keys on the keyboard function effectively.

In the figure, the external control input selection switch 13 is normally located in the center and is a return type switch that can be turned up or down only while being pressed with a finger, and can be used to select start, step, reset, or output.
ON-OFF can be selected. Also, terminal 1
4 is a terminal for externally connecting a cassette type digital magnetic tape deck.

FIG. 2 shows the electrical configuration of the embodiment of the present invention. The entire device consists of a microprocessor 21 and a bus line 22 connected to the microprocessor, with various module circuits and various memories connected thereto.

Each input signal from the keyboard 11 is converted into a code signal, temporarily stored in the key input interface 24, and sent to the data bus 221 by operating the "W" key. The display device 25 is the first
As explained in the figure, it is composed of an input/internal flag display 1, an output display 2, a block display 3, a step display 4, an operation display 5, and data displays 7, 8, and 9. Each of these displays is driven and controlled by a display interface 26 which takes in data from a data bus 221 in accordance with control signals from an address bus 222.

32 input terminals I ₁ to _{I 32} are input module 27
are connected to the input module 27 and are sequentially scanned by a data selector built into the input module 27, and the selected signals are sent to the data bus 221 and sent to the CPU 2.
1. The data selector is controlled by address bus 222.

Output signals sent from the sequence controller to the controlled object are outputted to 32 output terminals O ₁ to O ₃₂ via the output module 28 . The output module 28 has a built-in latch circuit with a 32-bit capacity corresponding to each output terminal line, and continues to maintain its output state until the step condition is satisfied. The output module 28 is controlled by the address bus 222 and operates by taking in signals from the data bus 221.

Further, a tape deck interface 34 for externally connecting an audio cassette-type magnetic tape is connected to the bus line 22, and a connector 1 having a REC terminal and a PLAY terminal on the operation panel is connected to the bus line 22.
4 is provided.

The memory consists of a system program area 29, a user program area 30, and a working area 31. The system program area 29 consists of read-only memory;
Various routine programs executed in cooperation with the CPU 21 are permanently stored. The user program area 30 is made up of a random access memory, and is an area that can be written or changed using the keyboard 11, and is made up of three program areas W, X, and Y, which will be described later. The working area 31 also consists of random access memory, and is connected to the user program area 30 to W,
It consists of an area for extracting and temporarily storing only the program contents of the step being executed in each block X and Y, and internal flags Nos. 33 to 48.
The CPU 21 performs output control based on these contents. Note that the internal flags are controlled by programming and are used as step conditions in the same way as the inputs _I1 to _I32 .

The structure of the program command words stored in the user program area 30 is shown in FIG. This is an 8-bit instruction code 301 indicating the type of operation, SET-A, SET- indicating the step condition.
For the code 302 of 3 x 8 bits consisting of B, SET-C and 32 output terminals, it indicates whether the control command to be output after the step condition is satisfied is "ON" or "OFF". It consists of a 32-bit output setting code 303.

The user program area 30 is composed of an area for storing a plurality of program command words shown in FIG. 3, and an example of the overall configuration is shown in FIG. 4. That is, it is composed of W, X, Y3 blocks, and each block is composed of 85 steps from step 01 to step 85.

The external control input 33 is composed of a block selection input and a control input, and these inputs are combined so that each block can be operated from the outside. "Block W""BlockX" as block selection input
There is a ``block Y'' and control inputs include ``reset'', ``stop'', ``step'', ``start'', and ``process stop''. The selected signal is sent to the data bus 221 and taken into the CPU 21. FIG. 7 shows a diagram of the connection terminals arranged on the back surface of the controller, together with external contacts 34...34. The functions of each input will be explained below.

When the "reset" input turns ON, operation stops and all outputs are turned OFF, the display device displays the contents of step 0, the contents of various counters return to 0, and all internal flag states are reset. .

When the "stop" input turns ON, operation stops at the step being executed and all outputs turn OFF. However, the internal state is preserved as is. When the "start" input is turned ON, operation starts according to the program from the step being displayed. If the steps are different for each block, operation starts from each different step. When the "process stop" input is turned ON, the process counter stops advancing at the step being executed, and the output status, counting timer status, etc. are maintained. Each time the "step" input is turned ON, the process counter is incremented by one step, and the display contents, output status, etc. change accordingly. However, the contents of the timer and counter during counting are cleared at the same time as the next step.

An outline of the configuration of the CPU 21 is shown in FIG. A commercially available microprocessor can be used for this.

The CPU 21 includes a timing and control unit 211 including a clock generator, and an instruction decoder 21.
2. Program counter 2 for sending address signals to the instruction register 213, arithmetic unit 214, accumulator 215, and address bus 222.
16, an address buffer 217, a group of other registers 218, a data buffer 219 for sending and receiving data to and from a data bus 221, etc., and each register group 218 stores each program step of the sequence controller. Process step counter 2 defined for each block
24. Clock counter 225 for each block;
Each block includes a counting counter 226 for counting the number of input pulse signals, and a block counter 227 consisting of a ternary ring for outputting WXY block control signals. Data bus 221 consists of 8 lines, and address bus 222 consists of 16 lines.

Next, how the contents of the instruction words of the user program shown in FIG. 3 are determined depending on the type of operation will be explained with reference to FIG. 6.

In the case of the "TIM" command for setting time, as shown in FIG. 6A, minutes are set in SET-A, seconds in SET-B, and 1/10 second in SET-C. Therefore,
You can freely set the time from 0 to 99 minutes 59 seconds 9.

In the case of the "CNT" command that sets the count value, the 6th
As shown in FIG. B, the input terminal number is specified in SET-A, and the count value is set in the four digits SET-B to SET-C. Therefore, a maximum of 9999 can be set.

In the case of the logical operation "AND" instruction, as shown in Figure 6C, input terminal numbers are specified for SET-A, SET-B, and SET-C, and the signal "1" arrives at all input terminals. When this happens, the step condition is satisfied.

For logical operation "OR" instruction, SET-A,
Input terminal numbers are designated for SET-B and SET-C, and the step condition is satisfied when a signal "1" arrives at any one input terminal.

In the case of jump "JMP" command, as shown in Figure 6D, the step condition is satisfied when the input signal of the input terminal number specified in SET-A becomes "1", and then Jump to the specified step. In this command, SET-C and output setting area are not used.

In the case of a repeat "RPT" command, as shown in FIG. 6E, the number of repetitions to be repeated is initially set in SET-A, and the step number to be jumped next during repetition is set in SET-B. Also running CPU21
Under the control of , the contents of SET-A are decremented by -1 each time it is repeated. In this command,
SET-C and output setting area are not used.

In the case of an "END" command indicating the end of the program, the program immediately jumps to the step designated by SET-A, as shown in FIG. 6F. especially,
If the designated step of SET-A is number 0 or 1, the program will continue to start. In this command, SET-B, SET-C, and output setting areas are not used.

For the "RET" instruction that specifies return,
Jumps to the original step that was being executed immediately before the external interrupt occurred. In this instruction, Figure 6G
As shown in , none of SET-A, B, C and output setting areas are used.

In the case of a "NOP" instruction that instructs a non-operation, nothing is executed in that step and the process immediately proceeds to the next step. This is useful for steps that are no longer needed due to program changes. Therefore, in the case of this command, none of SET-A, B, C and output setting areas are used, as shown in FIG. 6H.

Negative logic operation "NOT" instruction is not used alone, but "AND", "OR", "CNT", "JMP", "SET"
It is used in conjunction with other commands related to input such as, and is used to modify the input signal. That is, the sixth
As shown in FIG. 1, the input states "1" or "0" of the input terminal numbers designated as SET-A, B, and C are inverted and logically operated.

In the case of the "SET" command that sets internal flags according to input conditions, as shown in Figure 6 J,
Specify the input terminal number in SET-A, SET-B,
Specify the internal flag number in SET-C.
When used in conjunction with "NOT", it becomes a command to reset the internal flag, and the decimal point of data display 8 or 9 lights up to display this.

Interrupt acceptance processing is performed by specifying one of the input terminals I ₁ to I ₃₂ and the step to jump to, without providing any particular interrupt input terminal. In other words, if "JMP" shown in Figure 6D is set in step 00 of each block, when a signal comes to the input specified in SET-A, it will jump to the step specified in SET-B, and the jump will be Interrupt programs preset after the previous step are executed preferentially.

FIG. 8 shows an excerpt of the main part of a program sheet for WXY, 3-block parallel operation according to the above embodiment, and FIG. 9 shows an explanatory diagram of its operation.

Link operations between blocks are performed by using the state of internal flags as step conditions for each block. When the input condition of SET-A is 00 in the "SET" command, SET-B, SET are unconditionally
-The internal flag specified by C is set or reset. Therefore, when internal flags 33 and 34 are set at step a of block W, the AND logic of step 1 of block Step forward to
Three blocks proceed in parallel. When internal flag No. 33 is reset by the "SET" command at step c of block Similarly, when internal flag No. 34 is reset by the "SET" command at step d of block Y, it is reset at step e of block W.
The AND logic is established and the program of block Y is integrated into W.

In the lock mode during operation, as long as any block of WXY is operating, "RUN" on the lamp indicator 10 is lit, and when the mode changeover switch 12 is switched to monitor mode during operation, it is not selected. The ``RUN'' lamp lights up only when the block that is in operation, that is, the block whose lamp on the block display 3 is lit, is in operation, so operate the ``BLC-INC'' key in sequence to change the block selection, and then The operating blocks can be individually recognized. Furthermore, since the data displays 7, 8, and 9 display the step numbers of blocks W, X, and Y being executed, the execution steps of all three blocks can be recognized at the same time.

Using such a link function, three blocks can be continuously connected and operated in series. In this case, the display contents of the data displays 7, 8, and 9 are, for example, assuming that both WX blocks are at the 10th step of the Y block after all programs have been completed.
"85, 85, 10" is displayed, and it can be recognized from this display that the Y block is being executed.

Furthermore, if it is desired to start each block W, X, and Y at the same time, the external control inputs can be used to turn on each of the block W, block X, block Y, and start inputs.

Key operations in the program mode mainly consist of block settings, step settings, operation settings, output settings, and write operations. Block setting is performed by pressing the "BLC-INC" key until the block display 3 displays the desired block. To set a step, the desired step is called up by pressing the "REST" key and then entering a two-digit number using the numeric keys. To set the operation, as explained in conjunction with Figure 6, after operating the operation keys, use the number keys to select SET-A,
This is done by entering two digits each for SET-B and SET-C, and the "NOT" key is added if necessary. Output settings are performed by operating the "OUT" key, then entering the output number you want to turn on using the numeric keys, and then pressing the "ON" key.

The system program is configured so that when an "ON" or "OFF" key is operated, the output number set immediately before it is incremented by +1. Therefore, for example, as shown in Figure 10A, the output number 03, 04,
If you want to set 06 and 07 to ON, press the "OUT" key, the "03" key, and then the "ON" key, as shown in Figure B of the same figure.
"ON""OFF""ON""ON" sequentially 03, 04, 05,
Simply operate the output settings for numbers 06 and 07 using the keys.
Output settings can be made without having to press numeric keys each time.

After confirming the program thus set on the display device 25, if the program is as desired, the contents are written into the user program area by pressing the "W" key. By repeating this operation, a user program is created step by step.

In the lock mode, when a start input is received, the program is started, instructions transferred to the working area are decoded, and operations are executed for each block according to step conditions. When the step condition is satisfied in any block, the program contents of that block are replaced with those of the next step.
The process counter related to the block increments by +1. However, in the case of non-sequential steps such as "JMP", "RET", and "RPT", the contents of the process counter are replaced with the next step number specified by the command, and the process jumps to that step.

When monitor mode is selected, a monitor routine program is entered. Monitor operation is “P”
-SET" key followed by the desired step number, and ends by returning mode selection switch 12 to the lock mode.
Even while the monitor mode is selected and various operations are performed, the calculations of the sequence controller continue to be executed. The monitor display is maintained until the mode selection switch 12 is returned to the lock mode.

If you want to display the status of internal flags, use the ``IR'' key on the keyboard. This key "IR" has the function of instructing the setting of internal flags in the program mode, and when this key is pressed in the monitor mode, the 16 lamps at the bottom of the input display 1 will indicate the internal flags Nos. 33 to 48. Display the status of. When the key "IR" is not pressed, all the lamps on the input display 1 display the input conditions.

According to the present invention, a single sequence controller can control a plurality of control objects while relating them to each other.

[Brief explanation of the drawing]

1 to 10 are drawings related to an embodiment of the present invention, in which FIG. 1 is an external front view, FIG. 2 is a block diagram of an electric circuit, and FIG. 3 is stored in the user program area 30. FIG. 4 is a diagram showing the step configuration of the user program area 30, and FIG.
6 is a block diagram showing the configuration of the CPU 21. FIG. 6 is a diagram showing an example of the contents of the instruction word shown in FIG. The figure is an excerpt of the main part of a program sheet when a plurality of blocks are operated in parallel, FIG. 9 is an explanatory diagram of the operation of the program shown in FIG. 8, and FIG. 10 is an explanatory diagram of the operation of output setting. 1... Input and internal flag display, 2... Output display, 3... Block display, 11... Keyboard, 21... CPU, 29... System program area, 30... User program area,
31... Working area.

Claims (1)

[Claims] 1. A plurality of input signal terminals, a plurality of output signal terminals, a program memory that stores data specifying the type of operation, step conditions, and output command data for each process step; A sequence controller is equipped with a keyboard for writing operation types, data values, etc. into the program memory, and a central processing unit, and the program advances to the next step when step conditions are met. a plurality of process counters for counting process steps; a user program memory area for writing the program contents for each process step of the plurality of blocks;
A plurality of internal flags whose states are controlled by the program and whose states serve as stepping conditions for the program are provided, a plurality of input indicators corresponding to each of the plurality of input signal terminals, and a plurality of internal flags corresponding to each of the plurality of input signal terminals; Key to instruct flag display (IR key)
When the key is not pressed, the input signal is displayed on the input display, and when the key is pressed, the state of the internal flag is displayed on all or part of the input display. A step-by-step sequence controller characterized by the following configuration. 2. Indicate the step number of the user program by using numbers that do not overlap with each other for the input number and internal flag number, and attach the above input number near one side of the input display, and the above number near the other side of the input display. 2. The step-by-step sequence controller according to claim 1, wherein an internal flag number is assigned.