JPS6236285Y2 - - Google Patents
Info
- Publication number
- JPS6236285Y2 JPS6236285Y2 JP1982169759U JP16975982U JPS6236285Y2 JP S6236285 Y2 JPS6236285 Y2 JP S6236285Y2 JP 1982169759 U JP1982169759 U JP 1982169759U JP 16975982 U JP16975982 U JP 16975982U JP S6236285 Y2 JPS6236285 Y2 JP S6236285Y2
- Authority
- JP
- Japan
- Prior art keywords
- ferrite
- integrated circuit
- glass
- emi
- chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 229910000859 α-Fe Inorganic materials 0.000 claims description 24
- 239000011521 glass Substances 0.000 claims description 6
- 239000011248 coating agent Substances 0.000 description 3
- 238000000576 coating method Methods 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- 230000007257 malfunction Effects 0.000 description 3
- 238000007789 sealing Methods 0.000 description 3
- 238000010521 absorption reaction Methods 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 230000035699 permeability Effects 0.000 description 2
- 229920000642 polymer Polymers 0.000 description 2
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229920006332 epoxy adhesive Polymers 0.000 description 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
- 239000000696 magnetic material Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 239000011148 porous material Substances 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 239000000565 sealant Substances 0.000 description 1
- 229910052596 spinel Inorganic materials 0.000 description 1
- 239000011029 spinel Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Landscapes
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
Description
【考案の詳細な説明】 この考案は集積回路の技術分野に属する。[Detailed explanation of the idea] This invention belongs to the technical field of integrated circuits.
集積回路装置（以下ICと略する。）の高密度
化、低電力化に伴ない、IC内部で扱う信号レベ
ルは高周波、低信号レベル化する傾向にあり、今
後、この傾向は増々大きくなる。 As integrated circuit devices (hereinafter abbreviated as ICs) become more densely packed and consume less power, the signal levels handled inside the ICs tend to be higher frequency and lower signal levels, and this trend will continue to grow in the future.
ところで、従来、電子機器のノイズ対策は、シ
ールドの採用、ノイズフイルタ素子の結合等によ
り行なわれてきた。 By the way, noise countermeasures for electronic devices have conventionally been taken by employing shields, coupling noise filter elements, and the like.
しかしながら、ICがマイクロコンピユータの
ように高度に集積化されると、ICそのものが一
つのユニツトとなり、その結果、電気・磁気ノイ
ズ（以下EMIと略する。）に対し、従来のノイズ
対策は不充分となる。というのは、IC内部のリ
ード線が、それがたとえ短かくても、アンテナの
作用をすることにより、マイクロ波、ミリ波レベ
ルのEMIをピツクアツプする。そうすると、IC
が誤動作する。 However, when an IC becomes highly integrated like a microcomputer, the IC itself becomes a single unit, and as a result, conventional noise countermeasures are insufficient for electrical and magnetic noise (hereinafter abbreviated as EMI). becomes. This is because the lead wire inside the IC, even if it is short, acts as an antenna and picks up EMI at the microwave and millimeter wave level. Then, IC
malfunctions.
この考案は前記事情に鑑みてなされたものであ
り、集中的強電界、強磁界に対する耐久性を有
し、誤動作のおそれのないICを提供することを
目的とするものである。 This invention was made in view of the above-mentioned circumstances, and aims to provide an IC that has durability against concentrated strong electric fields and strong magnetic fields and is free from malfunction.
次にこの考案の一実施例を示す。 Next, an example of this invention will be shown.
図面に示すように、この考案の一実施例である
集積回路装置は、ICチツプ１をフエライト片２
ａ，２ｂで上下に挟むように包み込み、フエライ
ト片２ａとフエライト片２ｂとの間隙部よりIC
チツプ１のリード端子３を露出させると共に、前
記間隙部にシール部材４を充填してなる構成を有
する。ここで使用するフエライトは例えば化学式
XFe2O4のスピネル構造をもつた磁性体で大きい
電気抵抗を示すものをいう。 As shown in the drawing, an integrated circuit device which is an embodiment of this invention includes an IC chip 1 and a ferrite piece 2.
Wrap it up and down between a and 2b, and insert the IC from the gap between the ferrite piece 2a and the ferrite piece 2b.
It has a structure in which the lead terminals 3 of the chip 1 are exposed and the gap is filled with a sealing member 4. The chemical formula of the ferrite used here is
A magnetic material with a spinel structure of XFe 2 O 4 that exhibits high electrical resistance.
フエライト片２ａ，２ｂは、ICチツプ１を囲
繞してシールドすることができれば良いのである
から、その形状について特に限定はない。また、
フエライト片２ａ，２ｂは、EMIに対するシール
ド効果を奏する必要があるので、その透磁率は数
100から数10000程度であるのが好ましい。さら
に、フエライト片２ａ，２ｂは、その表面をガラ
スでコートしておくのが好ましい。ガラスをコー
トしておくと絶縁抵抗を向上させることができ、
シヨート事故を防止することができる。つまり、
Mn−Zn系の高透磁率材料の場合、固有抵抗が低
く、そのため他の電子部品と接触すると電気的に
シヨートしてしまう。さらにICはその微細構造
のために湿気の吸収を特に嫌うが、フエライトは
他の焼結体の中でも特に気孔が多く、吸湿性に劣
るという欠点があり、そのままではICの封止体
として使用することに難点がある。上記フエライ
ト表面にガラスコーテイングを施すことによつて
絶縁性と吸湿性の改善が図れるわけである。 There is no particular limitation on the shape of the ferrite pieces 2a and 2b, as long as they can surround and shield the IC chip 1. Also,
The ferrite pieces 2a and 2b need to have a shielding effect against EMI, so their magnetic permeability is several
The number is preferably about 100 to several 10,000. Furthermore, it is preferable that the surfaces of the ferrite pieces 2a and 2b be coated with glass. Coating the glass can improve insulation resistance,
Shooting accidents can be prevented. In other words,
In the case of Mn-Zn-based high magnetic permeability materials, the resistivity is low, so if they come into contact with other electronic components, they will be electrically shot. Furthermore, ICs are particularly averse to absorbing moisture due to their fine structure, but ferrite has the disadvantage that it has more pores than other sintered bodies and has poor moisture absorption properties, so it cannot be used as is as an IC sealant. There is a problem with this. By applying glass coating to the surface of the ferrite, insulation and moisture absorption can be improved.
シール部材４は、フエライト片２ａ，２ｂ間に
水分が浸入するのを防止するためであり、高分子
系接着剤あるいは高分子系の粘着剤たとえばエポ
キシ系の接着剤を用いることができる。なお、シ
ール部材４は、フエライト片２ａとフエライト片
２ｂとの間隙にスキ間なくシールしておくのが好
ましいことはいうまでもない。 The seal member 4 is for preventing moisture from entering between the ferrite pieces 2a and 2b, and may be made of a polymer adhesive or a polymer adhesive such as an epoxy adhesive. It goes without saying that it is preferable that the sealing member 4 seals the gap between the ferrite piece 2a and the ferrite piece 2b without any gap.
以上のようにICチツプ１をフエライト片２
ａ，２ｂで挟んでおくと、フエライト片２ａ，２
ｂが、周囲のEMIを反射ないし吸収するので、内
部のICがEMIにより誤動作するのを防止するこ
とができる。 As shown above, connect IC chip 1 to ferrite piece 2.
When sandwiched between a and 2b, ferrite pieces 2a and 2
Since b reflects or absorbs surrounding EMI, it is possible to prevent the internal IC from malfunctioning due to EMI.
以上、この考案の一実施例について詳述した
が、この考案は前記実施例に限定されるものでは
なく、この考案の要旨の範囲内で適宜に変形して
実施することができるのはいうまでもない。 Although one embodiment of this invention has been described in detail above, this invention is not limited to the above embodiment, and it goes without saying that it can be implemented with appropriate modifications within the scope of the gist of this invention. Nor.
変形例として、たとえば、フエライト板に貼着
したプリント基板上にICを印刷技術により配設
し、次いで前記プリント基板上に他のフエライト
板を貼着してなる集積回路装置が挙げられる。 An example of a modified example is an integrated circuit device in which an IC is disposed by printing technology on a printed circuit board attached to a ferrite board, and then another ferrite board is attached to the printed circuit board.
また、ICをシールドするフエライトは筒状の
筐体であつてもよい。 Furthermore, the ferrite that shields the IC may be a cylindrical casing.
以上のように、この考案によると、フエライト
でICをシールドしていので集中的強電界、強磁
界によりノイズをピツクアツプし、誤動作するの
を防止することができ、信頼性の高い集積回路装
置とすることができる。 As described above, according to this invention, since the IC is shielded with ferrite, it is possible to pick up noise due to concentrated strong electric and magnetic fields and prevent malfunctions, resulting in a highly reliable integrated circuit device. be able to.
特に最もノイズの影響を受け易いICの表裏面
にフエライトを配置しているのでその効果は大き
い。しかもフエライトの表面をガラスコーテイン
グしているため絶縁抵抗が高くなり電気的シヨー
ト事故等も発生せず信頼性の高い装置が得られ
る。更にガラスコーテイングにより耐湿性の向上
も図れる。 This is especially effective because ferrite is placed on the front and back surfaces of the IC, which are most susceptible to noise. Furthermore, since the surface of the ferrite is coated with glass, the insulation resistance is high, and electrical shoot accidents do not occur, making it possible to obtain a highly reliable device. Furthermore, moisture resistance can be improved by glass coating.
図面はこの考案の一実施例を示す断面斜視図で
ある。
１……ICチツプ、２ａ，２ｂ……フエライト
片、３……リード端子、４……シール部材。
The drawing is a cross-sectional perspective view showing an embodiment of this invention. 1...IC chip, 2a, 2b...ferrite piece, 3...lead terminal, 4...sealing member.
Claims (1)
いて、フエライトは集積回路の少なくとも表裏面
を覆う如く配置されてなり、該フエライトは、そ
の表面がガラスコーテイングされていることを特
徴とする集積回路装置。 An integrated circuit device in which an integrated circuit is shielded with ferrite, wherein the ferrite is arranged to cover at least the front and back surfaces of the integrated circuit, and the surface of the ferrite is coated with glass.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16975982U JPS5974735U (en) | 1982-11-09 | 1982-11-09 | integrated circuit device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16975982U JPS5974735U (en) | 1982-11-09 | 1982-11-09 | integrated circuit device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5974735U JPS5974735U (en) | 1984-05-21 |
| JPS6236285Y2 true JPS6236285Y2 (en) | 1987-09-16 |
Family
ID=30370785
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16975982U Granted JPS5974735U (en) | 1982-11-09 | 1982-11-09 | integrated circuit device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5974735U (en) |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57157147U (en) * | 1980-11-22 | 1982-10-02 |
-
1982
- 1982-11-09 JP JP16975982U patent/JPS5974735U/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5974735U (en) | 1984-05-21 |
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