JPS6234421A - Circuit for discriminating pull-in of phase-locked loop - Google Patents

Abstract

PURPOSE:To make the margin of the smoothing potential difference between a locked condition and unlocked condition larger, by making a smoothing voltage of a detecting output after converting the output into an electric current. CONSTITUTION:A detecting output appears at an output terminal 21 after it is differentially amplified by transistors Q1 and Q2 and converted into an electric current by a current mirror circuit composed of transistors Q3 and Q4. Between the output terminal 21 and an earth line, a capacitor C1 and resistance R2 having bias potential E are connected and the bias potential E sets the DC potential of the output terminal 21 when no input signal exists to the bases of the transistors Q1 and Q2. Therefore, even if the switching margin is expanded by providing a DC range switching means on the output side of a lock/unlock discriminating circuit 20, no inconvenience occurs and an accurate discriminating signal can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a phase-locked loop pull-in discrimination circuit that uses a phase-locked loop and is used in a detection circuit.

[Technical background of the invention]

In general, in a phase-locked loop circuit, the synchronization characteristics and steady-state characteristics are in a contradictory relationship.In other words, when the pull-in range of the phase-locked loop circuit is widened and the synchronization speed is increased, the noise bandwidth of the oscillation output becomes wider. Steady-state characteristics deteriorate.

FIG. 2 shows a nine-wave detection circuit using this type of phase-locked loop circuit.

The amplitude modulated signal is supplied to a quadrature phase detector 2 forming a phase-locked loop circuit 10 .

The phase locked loop circuit 10 reproduces the carrier wave of the amplitude modulated signal using the voltage controlled oscillator 4.

In other words, the quadrature phase detector 2 converts the amplitude modulated signal and the oscillation output (carrier wave) of the voltage controlled oscillator 40 into the 90° phase shifter 5.
The phase-shifted signal is input and quadrature phase detection is performed. The detection output obtained by this detection is supplied to the oscillation frequency control terminal of the voltage controlled oscillator 4 via the lag lead filter 3.

As a result, the phase-locked loop circuit 1° operates in phase synchronization with the carrier wave of the amplitude modulated signal, and obtains an oscillation output as a reproduced carrier wave.

The oscillation output is supplied to the in-phase phase detector 6 together with the amplitude modulated signal and used to demodulate the amplitude modulated signal. The demodulated output of the in-phase phase detector 6, that is, the detection output is
It is led out to the output terminal 7 and also supplied to the lock/unlock discrimination circuit 8.

The lock/unlock discriminating circuit 8 observes the DC level of the detection output, and can determine whether the phase-locked drug circuit IQ is in a phase-locked state or an unlocked state.

In explaining the lock/unlock determination circuit 8, we will first explain the purpose of the lock/unlock determination circuit 8, and then explain how the lock/unlock determination circuit 8 detects lock/unlock by observing the DC level of the detection output. Explain the principle of what can be determined.

(,) Reason for providing the lock/unlock determination circuit 8.

The phase-locked loop circuit 1o must have a wide pull-in range with respect to frequency fluctuations of the input signal, while when extracting a carrier wave, the noise band bias must be narrow. Here, the loop gain of the phase-locked loop is 1, the value of the resistor 3a of the lag lead filter 3 is R, the value of the capacitor 3b is C1, and the sum of the resistors 3a and 3tl is R.
2, pull-in range ωp, noise band @BL
is approximately the following formula % Formula % Therefore, ωl'1=51-1- 1 bubble in range ωp is contrary to reducing the noise band @BL.

Therefore, the lock/unlock discrimination circuit 8 determines that the phase-locked loop is in the locked state, and makes the transformer and resistor 3e of the filter 3 conductive to reduce the value of the resistor R2. It is being considered to narrow the BL.

(-Next, we will discuss the lock/unlock determination principle.

Now, let us consider the case where a television signal is received and the signal is detected as a video signal.

The amplitude modulated signal is (Acwωt+1)a+sQ+at
Then, (ωC: frequency of carrier wave, ω: modulation frequency.

A...Constant: o < 1) Perform in-phase detection), and the demodulated output is (Acosωt+1)0ωctxgωct" 2 (
AoasGJt+1 ) (1+oas2ωat)...
(1) If the frequency component twice the carrier wave is removed, the DC level of the detection output will always be higher than the DC level when no signal is input to the detector 6. Further, when detecting, if the phase of the carrier wave is rotated by 180' to make it inverted, the detection output becomes -2 (A cos ωt + 1), and the DC level when the detection output is smoothed is always lower than the DC level when there is no signal. Here, we will consider the former case of in-phase detection. An example of the detection output at that time is shown in FIG. 3(a). When the synchronization is off, the in-phase phase detector 6 works as a frequency converter and outputs a signal with a frequency difference between the amplitude modulated signal and the oscillation output, which is passed through a low-pass filter and smoothed. The DC level is expressed as (1+Acosωt)cm(ab
et Xcos(ωa+Δω)t=(1+Accs
ωt) (cos(Δω) t + crs (2ωe+Δ
ω)t)... (2) (Δω...frequency difference between amplitude modulated signal and oscillation output), and the average value of equation (2) is O. Further, this case is referred to as "beat output time".

Next, when the synchronization state is achieved and the common mode detection output is obtained,
As described above, the DC level is higher than when the detection output is a single output. Therefore, by detecting this DC level voltage difference, it is possible to perform lock/unlock determination, control the transistor 3m of the lag lead filter 3, and switch the time constant.

[Problems with background technology]

In the lock/unlock discriminating circuit 8 described above, erroneous detection may occur when detecting the average potential of the detection output.

That is, when the modulation signal is other than a sine wave, the average potential of the detection output may not be -7 as described above, even though the phase closed loop is in a synchronous state. for example,
This is a case where a detection output as shown in FIG. 3(b) exists.

At this time, since the difference between the smoothed voltages during beat output and synchronization becomes small, malfunctions may occur due to variations in transistors and resistances. In particular, when the modulation signal is a video signal, the smoothed voltage value of its detection output fluctuates sharply, and if we try to make the smoothed potential difference correspond to the signal on the pan, the margin of this smoothed potential difference between lock and unlock times is It has to be quite small.

If the level of the detection output is increased, the difference in potential between lock and unlock after smoothing will increase, and the merge ratio can be expanded. 1. However, in actual circuits, which are integrated, there are constraints on the dynamic range of the detector and the next-stage circuit, and the maximum amplitude of the detected output is limited. Therefore, the range in which the margin can be changed according to the type of modulation signal is also restricted. Furthermore, when synchronously detecting a television intermediate frequency signal, a high-gain amplifier is often installed on the input side and integrated on the same chip, and if the amplitude of the detection output is increased, this will wrap around the input and cause oscillation. becomes more likely to occur.

[Purpose of the invention]

This invention was made to deal with the above-mentioned circumstances, and can expand the smoothed voltage difference between the detection output when the phase-locked loop is in the locked state and the unlocked state. It is an object of the present invention to provide a phase-locked loop pull-in discrimination circuit that does not cause unnecessary oscillation even if the margin for obtaining lock/unlock discrimination is switched and expanded.

[Summary of the invention]

For example, as shown in FIG. 1, this invention converts the detected output, which is a demodulated signal, into a current change using a current converter such as transistors Q1 to Q4, and smoothes it using a Contin-9-C1 to convert it into a DC voltage. This achieves the above objectives.

[Embodiments of the invention]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows an embodiment of the present invention, and the difference from the configuration in FIG. 2 is a lock/unlock determination circuit 200. Therefore, the other parts are given the same numbers as in FIG.

The detection output demodulated by the in-phase detector 6 is supplied to the bases of transistors Ql and C2 of the lock/unlock determination circuit 20. The emitters of transistors Ql and Q2 are commonly connected to the ground line through a resistor R1,
The collector of transistor Q is connected to transistor Q3. Q
4 and the emitter of transistor Q3. Further, the collector of transistor Q2 is connected to the emitter of transistor Q4.

The collectors of transistors Qj and Q4 are connected to the power supply line.

As a result, the detected output is transmitted from transistor Q1. The signal is differentially amplified by Q2, converted into a current by a current mirror circuit of transistors Q3 and C4, and applied to output terminal 2. A capacitor C is connected between the output terminal 21 and the ground line.
is connected to a resistor R2 which also has a bias potential E.
is also connected.

The voltage at the terminal 21 changes depending on whether the phase-locked loop circuit 10 is locked or unlocked. Therefore, if the voltage in the locked state is VJ and the voltage in the unlocked state is v2, then the reference voltage with a voltage value of (vx + V2)/2 and the terminal 2
By comparing the voltages of 1 to 1, a signal for determining the locked state and unlocked state can be obtained. Bias potential E is applied to transistor Ql.

This is for setting the DC potential of the output terminal 2I when there is no input signal to the base of C2.

According to the invention described above, the detected output is converted into current, then converted into voltage, and smoothed. Therefore, if the potential after smoothing is within the dynamic range of the capacitor C and the next-stage comparison section, a discrimination output can be obtained. Therefore, it is not necessary to amplify the detection output itself and forcefully set it at full scale within the dynamic range of the discrimination circuit.

As a result, according to this circuit, the margin of the difference in smoothed voltage between the locked state and the unlocked state can be increased without manipulating the amplitude of the detection output. Furthermore, since the detected output is often converted into a voltage with a large amplitude, oscillations do not occur on the input side.

In particular, when the detection output is directly smoothed to obtain the smoothed potential difference between the locked state and the unlocked state, the above smoothed potential difference margin is used when processing a video signal in which the smoothed voltage fluctuates greatly even in the locked state. I can't get it big. Therefore, if the detection output is amplified and smoothed, the detection output wraps around to the input side and generates an oscillation i.

Therefore, in order to solve this problem, the present invention first converts the detection output into a current to obtain a DC voltage. Even if the range is switched, this DC voltage has no relation to the amplitude of the detected output (AC). There is no problem in enlarging the output terminal 21 of the lock/unlock discriminating circuit 20, and an accurate discrimination signal can be obtained even if the ), but in addition,
This output terminal 21 may be provided with a range switching means and a comparison circuit.

〔Effect of the invention〕

As explained above, according to the present invention, when a detection output is used to determine whether the phase-locked loop is locked or unlocked in a demodulation circuit using a phase-locked loop, the detection output is By smoothing the current to 1 after current conversion, it is possible to provide a phase-locked loop pull-in discrimination circuit that can increase the margin of the smoothed 1 level difference between the locked state and the unlocked state.

[Brief explanation of the drawing]

Figure 1 is a circuit diagram showing the implementation of this invention, Figure 2 is a circuit diagram of a conventional noodle detection circuit using a phase-locked loop, and Figure 3 explains the operation of the circuit in Figure 2. 0 is a signal waveform diagram shown in FIG.
~Q4...Transistor, C1...Capacitor, R
2...Resistance.

Claims (1)

[Claims] A phase-locked loop having an oscillator to which an amplitude modulated signal is supplied and obtains an oscillation output phase-synchronized with the carrier wave of this signal; and a phase-locked loop having an oscillator that is supplied with an amplitude modulated signal and obtains an oscillation output that is phase-synchronized with the carrier wave of this signal; A smoothing capacitor and a load resistor are connected in parallel to the output terminal of a current conversion section that converts the detected output into a change in current, and the phase-locked loop is locked to the output terminal. What is claimed is: 1. A phase-locked loop pull-in discriminating circuit, comprising discriminating means for obtaining a DC voltage for discriminating whether the phase-locked loop is in the unlocked state or the unlocked state.