JPS6230558B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a time-division channel initialization system, and more particularly to the initialization of a time switch (also referred to as a speech memory) and a holding memory in a time-division channel.

Generally, as a time division communication path, for example, a space switch is connected between two time switches, and the so-called T-S is configured to control these time switches and space switches according to the contents of a holding memory. - T-shaped communication paths are known. Thus, a temporal switch and a spatial switch are each a type of memory. In a T-S-T type channel, data from the input highway is randomly input to the first time switch according to information in the holding memory and read out from the first time switch sequentially by a counter in the holding memory. . The read data is input to the spatial switch and spatially switched according to the contents of the holding memory. The second time switch sequentially captures the switched data into the holding memory by a counter, and the captured data is read out randomly according to the contents of the holding memory. In this way, the input highway data is exchanged in time.

The contents of the first time switch and the holding memory, which are memories, are uncertain data at the time of power-on, failure recovery, or completion of a pseudo-normal test. For this reason, the initial configuration behavior of these memories,
That is, it is necessary to clear these memories or write to all addresses in these memories.

According to the conventional initialization method, the first time switch and the holding memory are initialized at the same time. Therefore, even if only the time switch needs to be initialized, such as at the end of a pseudo-normal test, it is necessary to initialize both the time switch and the holding memory and then rewrite the holding memory. There were problems in that it was complicated and required a long time for initial settings.

The present invention avoids the above-mentioned problems in the conventional system, and its purpose is to enable initial setting of only the time switch in a time-division channel, thereby reducing the time required for initial setting.

In order to achieve the above object, the present invention provides a time switch, a space switch, a holding memory for controlling input of data to the time switch and the space switch, and initializing the time switch and the holding memory. In a time-sharing communication path comprising a control device to be set, and a control section for interfacing between the control device and the time switch, the spatial switch, and the holding memory, the control device is configured to set the initial setting to the control section. A signal and a selection signal are sent, and depending on the selection signal, the control section gives the initial setting signal only to the time switch that requires initial setting, or simultaneously gives the initial setting signal to the time switch and the holding memory. This is a time-division channel initial setting method characterized by the following.

Embodiments of the present invention will be described below based on the drawings.

FIG. 1 is a block diagram showing one embodiment of a T-S-T type time division communication path applied to the present invention.
In FIG. 1, the control section 1 receives an initialization signal via its first input line, or order line 14, and a selection signal via its second input line, or selection signal line 15. Initialization signals and selection signals are sent from a control device (not shown). The initial setting signal is a signal that initializes the storage contents of the first time switch 2 and/or the holding memory 3, and the selection signal causes the initial setting operation to be performed only for the first time switch 2 or for the first time switch 2. This is a signal that determines whether to perform the operation on both the time switch 2 and the holding memory 3. The first and second outputs of the control section 1 are connected to a time switch 2 and a holding memory 3 via initialization signal lines 4 and 5, respectively. The output of the holding memory 3 is connected to a first time switch 2 and a second time switch 6. First time switch 2
The output of the spatial switch 8 is connected to the input of the spatial switch 8, and the output of the spatial switch 8 is connected to the input of the second temporal switch 6. The spatial switch 8 is controlled by a second holding memory 9.

The operation of the time division communication path of FIG. 1 is as follows.

Data sent from the input highway 7 is randomly written to the first time switch 2 according to the storage contents of the holding memory 3, and sequentially written to the first time switch 2 by a counter (not shown) in the holding memory 3. is read out from the time switch 2 to the space switch 8. The data taken into the spatial switch 8 is subjected to spatial switching according to the stored contents of the second holding memory 9. The output data from the spatial switch 8 is sequentially written to the second time switch 6 by the counter in the first holding memory 3, and then output randomly according to the contents of the first holding memory 3. Sent to Highway 10.

When the system recovers from a fault or when the power is turned on, the storage contents of the holding memories 3 and 9 and the time switches 2 and 6 are uncertain, so in this case, the time switches cannot be changed from the control device. A selection signal is input to the control unit 1 via the selection signal line 15 for initializing both the storage memory and the holding memory.

In addition, a pseudo-normal test may be performed in this system, but in this case, data that violates the parity rule is intentionally input from the input highway 7 and the system is tested. However, even after this pseudo-normal test is completed, erroneous data that violates the parity law remains in the time switch 2. When data is read out sequentially from the first time switch 2 to the spatial switch 8 in this state, erroneous data is detected at a fault monitoring point in the communication path and is regarded as a device fault. This error data will be updated and returned to the normal state the next time a normal line is connected and a call is made, but generally this time is long, so in order to return to the normal state immediately after the pseudo-normal test, it is necessary to It is necessary to initialize the time switch 2 of 1. That is, if the first holding memory 3 is also initialized at this time, a problem arises in that the call path, signal path, etc. that are set at that time are disconnected. Therefore, only the first time switch 2 has to be initialized. In order to initialize only the first time switch 2, a selection signal for initializing only the first time switch 2 may be input from the control device to the control section.

FIG. 2 is a block diagram showing in detail the control unit 1, first time switch 2, and first holding memory 3 in the communication path shown in FIG. In FIG. 2, the control unit 1 receives an initial setting signal from a control device (not shown) via an order signal line 14 and selects which selection circuit (in the illustrated example, one set of selection circuits, time switches, holding memories, etc.). (Although only the communication path configuration is shown, the order development unit 11 identifies whether to hand it over to a communication path system, for example, which is divided into modules such as a communication path system.)
and receives the initial setting signal from the order expansion unit 11 via the internal signal line 13 to the first input, and receives the selection signal from the control device via the selection signal line 15 to the second input.
The selection circuit 12 receives the input of the time switch 2 and determines whether to initialize only the time switch 2 or initialize both the time switch 2 and the holding memory 3. Time switch 2 and holding memory 3 each include initial setting circuits 21 and 31 and memories 22 and 32. The selection signal input from the control device to the selection circuit 12 via the selection signal line 15 is, for example, a logic "1" or logic "0" signal, and if it is logic "1", the initial setting of only the time switch 2 is performed. If the logic is “0”, hold memory 3
Initial settings for both the time switch 2 and time switch 2 are made. For example, when an initial setting signal is input only to the initial setting circuit 21 in the time switch 2, the initial setting circuit 21 controls the address and data for the memory 22, thereby updating the contents of the memory 22 and initializing it. Ru. time switch 2
When the initial setting signal is input to the initial setting circuits 21 and 31 of both the storage memory 3 and the holding memory 3, both memories 22 and 32 are initialized.

In the above description of the embodiment of the present invention, control for two memory groups has been described, but even more memory groups can be controlled by increasing the number of bits of the selection signal input to the selection circuit.
Initial settings can be made with any combination.

According to the present invention, it is possible to initialize the time switch independently, so even if the time switch is returned to the normal state immediately after a pseudo-normal test, there is no need to rewrite the retention memory, reducing the time required for initialization. .

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of a T-S-T type time-division communication path applied to the present invention, and FIG. 2 is a detailed block diagram of a part of the communication path shown in FIG. be. 1...Control unit, 2...First time switch, 3
...First holding memory, 4, 5...Initial setting signal line, 6...Second time switch, 7...Input highway, 8...Space switch, 9...Second holding memory, 10... ...Output highway, 11...Order development section, 12...Selection circuit, 21, 31...Initial setting circuit, 22, 32...Memory.

Claims (1)

[Claims] 1 A time switch, a space switch, a holding memory that controls data input/output to the time switch and the space switch, a control device that initializes the time switch and the holding memory, and a control device, the time switch, and the In a time-division channel equipped with a controller for interfacing between a spatial switch and the holding memory, the controller sends an initial setting signal and a selection signal to the controller, and responds to the selection signal. A time-division channel initialization method, characterized in that the control section applies the initialization signal only to a time switch that requires initialization, or simultaneously to the time switch and the holding memory.