JPS62296510A - Formation of compound semiconductor thin film and apparatus therefor - Google Patents

Formation of compound semiconductor thin film and apparatus therefor

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Publication number
JPS62296510A
JPS62296510A JP14092086A JP14092086A JPS62296510A JP S62296510 A JPS62296510 A JP S62296510A JP 14092086 A JP14092086 A JP 14092086A JP 14092086 A JP14092086 A JP 14092086A JP S62296510 A JPS62296510 A JP S62296510A
Authority
JP
Japan
Prior art keywords
substrate
compound semiconductor
film
thin film
semiconductor thin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14092086A
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Japanese (ja)
Other versions
JP2642096B2 (en
Inventor
Hideo Sugiura
杉浦 英雄
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Nippon Telegraph and Telephone Corp
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Nippon Telegraph and Telephone Corp
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Priority to JP61140920A priority Critical patent/JP2642096B2/en
Publication of JPS62296510A publication Critical patent/JPS62296510A/en
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Publication of JP2642096B2 publication Critical patent/JP2642096B2/en
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Abstract

PURPOSE:To form a compound semiconductor film with good reproducibility by providing a pair of vapor phase reaction chambers to be independently closed, and a semiconductor substrate replacing chamber or passage having a pair of gate valves for opening or closing between the pair of vapor phase reaction chambers. CONSTITUTION:Vapor growth chambers 22, 23 are independently provided for purifying the surface of an Si substrate 24 and for growing an Si film on the substrate. Further, a semiconductor substrate replacing chamber 21 or passage having a pair of gate valves 32, 33 for opening or closing therebetween is interposed between the chamber 22 and the chamber 23 to move a susceptor 25 for placing the substrate between the chambers 22 and 23 without contacting it with an atmospheric air. Thus, a compound semiconductor film having excellent crystallinity can be formed with good reproducibility.

Description

【発明の詳細な説明】 3、発明の詳細な説明 (発明の属する技術分野) 本発明はシリコン基板上にシリコン薄膜およびGaAs
 、GaPなどのm−v族化合物あるいはCdSなどの
■−■族化合物等からなる化合物半導体薄膜を形成する
ための方法および装置に関する。
Detailed Description of the Invention 3. Detailed Description of the Invention (Technical Field to which the Invention Pertains) The present invention provides a silicon thin film and GaAs film on a silicon substrate.
The present invention relates to a method and apparatus for forming a compound semiconductor thin film made of an m-v group compound such as GaP, or a ■-■ group compound such as CdS.

(従来の技術) 近年、シリコン半導体基板上にGaAs、GaPなどの
化合物半導体の薄膜を形成する技術が大きく注目されて
いる。この技術の目指すところはシリコン半導体の特長
と化合物半導体の持つそれぞれの特長を相補的に融合す
ることによって、従来なかった新しい機能素子を創造し
ようとするものである。例えばシリコン(St)基板上
にGaAs膜を形成することにより多機能化を目指した
光−電子集積回路の実現、化合物半導体太陽電池とSt
太陽電池の多接合化により高効率で低コストの太陽電池
の実現等である。
(Prior Art) In recent years, a technique for forming a thin film of a compound semiconductor such as GaAs or GaP on a silicon semiconductor substrate has attracted much attention. The goal of this technology is to create new functional devices that have not existed before by complementary fusion of the features of silicon semiconductors and the respective features of compound semiconductors. For example, the realization of multifunctional opto-electronic integrated circuits by forming a GaAs film on a silicon (St) substrate, compound semiconductor solar cells and St.
These include the realization of highly efficient and low-cost solar cells by increasing the number of junctions in solar cells.

ところで、従来、81基板上へのGaAsなどの化合物
半導体薄膜の形成には、主として、有機金属熱分解気相
成長(MOCVD)法が用いられてきた。これはMOC
VD法のもつ優れた膜厚、膜組成の制御性ならびに量産
性のためである。しかしながら、これまでSi基板上に
鏡面でAPB (antiphase boundar
y)を含まない化合物半導体薄膜を形成するうえでの再
現性は著しく乏しく、決して確立された技術と首える状
況ではなかった。その主要な原因は、Si基板上への化
合物半導体のエピタキシャル成長に適したMOCVD装
置が開発さ扛ていなかったためである。つまり、従来は
、このような異種基板上エピタキシャル成長も通常の同
種基板上エピタキシャル成長用の装置を用いて行われて
いた。その結果、以下に述べるような重要な問題があっ
た。
Incidentally, conventionally, metal organic pyrolysis vapor deposition (MOCVD) has been mainly used to form a compound semiconductor thin film such as GaAs on an 81 substrate. This is MOC
This is because the VD method has excellent film thickness, controllability of film composition, and mass production. However, until now APB (antiphase boundary) has been deposited on a Si substrate with a mirror surface.
The reproducibility in forming a compound semiconductor thin film that does not contain y) is extremely poor, and the situation has never been comparable to established techniques. The main reason for this is that no MOCVD apparatus suitable for epitaxial growth of compound semiconductors on Si substrates has been developed. In other words, conventionally, such epitaxial growth on a different type of substrate has been performed using a normal apparatus for epitaxial growth on a similar type of substrate. As a result, there were important problems as described below.

第3図は、従来の縦形反応管方式のMOCVD装置の構
成図であって、1は81基板交換室、2は成長室、3は
カーがンサセグタ、4はSt基板、5は反応生成付着物
である。このようにSl基板交換室1と成長室2との二
室構成にすることにより、SI基板交換に伴なう成長室
2への酸素や水分の持込みが軽減され、良質のエピタキ
シャル成長膜が得られる。Si基板上への化合物半導体
薄膜形成の重要なポイントは、酸化物などの存在しない
清浄な81基板表面を実現することである。このような
81基板表面の清浄化は、通常、水素ガス中でSt基板
を1.000°0程度の高温に加熱する方法が用いられ
ている。第3図の装置を用いての、St基板表面清浄化
処理を含む化合物半導体薄膜の成ジは、以下のような順
序で行われていた。その第一は、サセプタ3の9焼処理
である。これり、前の成長によってサセプタ3表面に付
着した化合物半導体を除去するもので、サセプタ3を成
長室2の所定の位置に配置し水素ガスを成長室2に導入
しながら1,000℃以上に加熱する。この処理によっ
て、サセプタ3表面に付着していた化合物半導体が分解
除去される。次はsi基板4の装填と表面清浄化処理で
ある。St基板交換口よりsi基板4を81基板交換室
1内のサセプタ3上にのせ、Sl基板交換室1を真空排
気し、続いて、成長室2も真空排気したのち、サセプタ
3を成長室2の所定の位置に配置する。
FIG. 3 is a configuration diagram of a conventional vertical reaction tube type MOCVD apparatus, in which 1 is an 81-substrate exchange chamber, 2 is a growth chamber, 3 is a carburetor segment, 4 is an St substrate, and 5 is a reaction product deposit. It is. By having a two-chamber configuration of the SI substrate exchange chamber 1 and the growth chamber 2 in this way, the introduction of oxygen and moisture into the growth chamber 2 due to SI substrate exchange is reduced, and a high-quality epitaxially grown film can be obtained. . An important point in forming a compound semiconductor thin film on a Si substrate is to achieve a clean 81 substrate surface free from oxides and the like. To clean the surface of the 81 substrate, a method is usually used in which the St substrate is heated to a high temperature of about 1.000°0 in hydrogen gas. The formation of a compound semiconductor thin film including the St substrate surface cleaning treatment using the apparatus shown in FIG. 3 was performed in the following order. The first is the 9-year firing treatment of the susceptor 3. This is to remove the compound semiconductor that has adhered to the surface of the susceptor 3 due to the previous growth.The susceptor 3 is placed at a predetermined position in the growth chamber 2, and while hydrogen gas is introduced into the growth chamber 2, the temperature is raised to 1,000°C or higher. Heat. Through this treatment, the compound semiconductor adhering to the surface of the susceptor 3 is decomposed and removed. Next is loading of the Si substrate 4 and surface cleaning treatment. Place the Si substrate 4 on the susceptor 3 in the 81 substrate exchange chamber 1 through the St substrate exchange port, evacuate the Sl substrate exchange chamber 1, then evacuate the growth chamber 2, and then move the susceptor 3 into the growth chamber 2. place it in the specified position.

次に、成長室2に水素ガスを導入しながら、サセプタ3
を加熱して81基板4の温度を1,000℃まで上げる
(基板加熱処理)。
Next, while introducing hydrogen gas into the growth chamber 2, the susceptor 3
is heated to raise the temperature of the 81 substrate 4 to 1,000° C. (substrate heat treatment).

(従来技術の問題点) しかし、上述の如き従来の化合物半導体薄膜形成方法お
よび装置は以下のような問題があった。
(Problems with Prior Art) However, the above-described conventional compound semiconductor thin film forming method and apparatus have the following problems.

すなわち、成長室2の内壁には前の成長反応で発生した
反応生成付着物5が存在し、これは、サセプタ3の9焼
処理のときに一部分解除去されるが、加熱される温度が
低いために大部分にSi基板4の清浄化処理のときにも
残存している。この残存した反応生成付着物5の成分は
、合成された化合物半導体のほかに有機金属そのものや
有機金属と■族元素の水素化物などとの中間反応生成物
である。これらの一部Fist基板4の清浄化処理のと
きにもサセプタ3からの輻射熱により分解し、成長室2
内を標うことにな9、加熱によって酸化物が除去され清
浄化された活性なSi基板4の表面に付着し汚染する。
That is, on the inner wall of the growth chamber 2, there is a reaction product deposit 5 generated in the previous growth reaction, and this is partially decomposed and removed during the 9-baking treatment of the susceptor 3, but the heating temperature is low. Therefore, most of the particles remain even during the cleaning process of the Si substrate 4. The components of this remaining reaction product deposit 5 include, in addition to the synthesized compound semiconductor, the organic metal itself, and intermediate reaction products between the organic metal and the hydride of group (I) elements. Some of these are also decomposed by the radiant heat from the susceptor 3 during the cleaning process of the Fist substrate 4, and the growth chamber 2
Specifically, oxides adhere to and contaminate the surface of the active Si substrate 4 which has been removed and cleaned by heating.

これらの汚染物はStとの間で化学結合によって結ばれ
、1,000℃程度の温度では除去されない。次の段階
はSi基板4上への化合物半導体の成長であるが、この
ような表面汚染物のある81基板4の上に化合物半導体
を成長させた場合、これらの汚染物が核発生の原因とな
るために、鏡面膜は得られず、また、成長膜はAPR(
antl−phase boundary)を含むこと
になる。成長室2内6一 の反応生成付着物5の量や付層の仕方は、膜成長の回数
や成長時のガスの流れ方によって異なるものであり、よ
って、81基板4の清浄化処理時に分解、標流するもの
の量も異なる。つまシ、St基板4の表面汚染の程度は
成長の度に異っていることになり、表面汚染のない時に
は、 APRのない鏡面膜が得られることもあるが、そ
の再現性は著しく低くかった。
These contaminants are chemically bonded to St and cannot be removed at temperatures of about 1,000°C. The next step is the growth of a compound semiconductor on the Si substrate 4, but if the compound semiconductor is grown on the 81 substrate 4 with such surface contaminants, these contaminants may be the cause of nucleation. Therefore, a specular film cannot be obtained, and the grown film has an APR (
antl-phase boundary). The amount of reaction product deposits 5 in the growth chamber 2 and the way they are layered vary depending on the number of film growths and the flow of gas during growth. , the amount of signposts also differs. Finally, the degree of surface contamination of the St substrate 4 differs with each growth, and when there is no surface contamination, a mirror-like film without APR may be obtained, but the reproducibility is extremely low. Ta.

そのほか、S1素子上に化合物半導体素子を作製する場
合、従来はまず、81基板上に81膜を形成するなどし
てSt素子を作製し、そののちいったんSl基板を大気
にさらしたのち、別の装置を用いて81累子上に化合物
半導体膜を形成して化合物半導体素子を作製するという
こともおこなわれているが、その場合、上述のように化
合物半導体膜の形成直前に81基板を1,000°0以
上に加熱して清浄化する必要がある。しかし、このよう
な高温処理によJ) si素子が劣化するという問題が
生じ、また、たとえS1素子がこのような高温処理に耐
えたとしても従来のMOCVD装置では上述の如き表面
汚染の問題があるため、いずれにしてもAP13’i含
まない化合物半導体膜全再現性良く形成することは不可
能であった。
In addition, when producing a compound semiconductor element on an S1 element, conventionally, an 81 film was first formed on an 81 substrate to produce an St element, and then the Sl substrate was exposed to the atmosphere and then another It is also possible to fabricate a compound semiconductor device by forming a compound semiconductor film on the 81 layer using a device, but in this case, as described above, the 81 substrate is heated by 1, It is necessary to clean it by heating it to over 000°0. However, such high-temperature treatment causes the problem of deterioration of the Si element, and even if the S1 element can withstand such high-temperature treatment, conventional MOCVD equipment still suffers from the above-mentioned surface contamination problem. Therefore, in any case, it was impossible to form a compound semiconductor film that does not contain AP13'i with good reproducibility.

(問題点を解決するための手段) 本発明は上記事情に鑑みてなされたものであって、81
基板の表面汚染の問題を解決し、St基板上に81薄膜
および化合物半導体薄膜を高品質で再現性よく形成する
方法および装置を提供することを目的とする。
(Means for solving the problems) The present invention has been made in view of the above circumstances, and includes 81
The present invention aims to solve the problem of surface contamination of a substrate and provide a method and apparatus for forming an 81 thin film and a compound semiconductor thin film on an St substrate with high quality and good reproducibility.

本発明は上記問題点を解決するための手段として、第1
に81基板の表面清浄化と81基板上への61膜の成長
用に独立の気相成長炉を設けることにより、化合物半導
体薄膜を形成する際のSt基板上の酸化物などの表面汚
染の問題の解決を図ったものである。第2に81気相成
長室と化合物半導体気相成長室との間に、これらとの間
を開閉するための一対のf−)バルブを有する半導体基
板交換室又は通路を介在させることによル、これら成長
室の間’に81基板會載置したサセプタが外気に触れる
ことなく移動し得るようにし、St累子の高温処理によ
る劣化、APRの発生等問題の解決を図ったものである
The present invention provides a first method for solving the above problems.
By providing an independent vapor phase growth furnace for cleaning the surface of the 81 substrate and growing the 61 film on the 81 substrate, the problem of surface contamination such as oxides on the St substrate when forming compound semiconductor thin films can be solved. This is an attempt to solve the problem. Second, by interposing a semiconductor substrate exchange chamber or passageway between the 81 vapor phase growth chamber and the compound semiconductor vapor phase growth chamber, which has a pair of f-) valves for opening and closing between them. The susceptor placed between these growth chambers is made to be able to move without being exposed to the outside air, thereby solving problems such as deterioration of St crystals due to high temperature treatment and generation of APR.

以下、本発明を図示の一実施例を参照して説明する。Hereinafter, the present invention will be explained with reference to an illustrated embodiment.

(実施例) 第1図は本発明の化合物半導体薄膜の形成方法に用いら
れる装置の一実施例を示すものであって、第2図は第1
図の装置を上から見たときの模式図である。これら図中
、21は半導体基板交換室、22はS1工ピタキシヤル
成長反応室(以下、第1の反応室と略記する)、23は
化合物半導体薄膜成長用の有機金属熱分解炉(以下、第
2の反応室と略記する)、24はSl基板、25はサセ
プタ、26および27はサセプタ移動治具、28は真空
ポンプ、29,30.31はガス導入管、32おxびs
sB、ダートパルプ、34および35は高周波加熱コイ
ル、36はガス排気ポンプである。
(Example) FIG. 1 shows an example of the apparatus used in the method of forming a compound semiconductor thin film of the present invention, and FIG.
FIG. 2 is a schematic diagram of the device shown in the figure, viewed from above. In these figures, 21 is a semiconductor substrate exchange chamber, 22 is an S1 pitaxial growth reaction chamber (hereinafter referred to as the first reaction chamber), and 23 is an organometallic pyrolysis furnace for compound semiconductor thin film growth (hereinafter referred to as the second 24 is an Sl substrate, 25 is a susceptor, 26 and 27 are susceptor moving jigs, 28 is a vacuum pump, 29, 30.31 is a gas introduction pipe, 32 and s
sB is dirt pulp, 34 and 35 are high frequency heating coils, and 36 is a gas exhaust pump.

次に、この装置を用いてSi基板24上にSt薄膜を成
長し、さらにその上にGaAs薄膜を成長する例につい
て説明する。
Next, an example will be described in which this apparatus is used to grow a St thin film on the Si substrate 24, and further to grow a GaAs thin film thereon.

9一 実施例1 まず、舘1の反応室22内において、サセプタ25を十
分に空焼きしたのち、サセプタ25を半導体基板交換室
21に移した。次に脱脂処理を施したSi基板24を半
導体基板交換室21内のサセプタ25にセットしたのち
、この交換室内をポンプ28により排気し真空にすると
ともに、第1の反応室22も真空に排気した。ついで、
ダートパルプ32を開き移動治具26を用いてサセプタ
25を第1の反応室22に移したのち再びダートパルプ
32を閉じ、ついでガス導入管29より、たとれば水素
ガスで5優に希釈したHCtガスを流しながらサセプタ
25およびS!基板24を高周波加熱コイル34を用い
て1100”Oで10分間加熱した。
91 Example 1 First, the susceptor 25 was sufficiently air-baked in the reaction chamber 22 of the ship 1, and then the susceptor 25 was transferred to the semiconductor substrate exchange chamber 21. Next, the degreased Si substrate 24 was set in the susceptor 25 in the semiconductor substrate exchange chamber 21, and the exchange chamber was evacuated using the pump 28 to create a vacuum, and the first reaction chamber 22 was also evacuated. . Then,
After opening the dart pulp 32 and moving the susceptor 25 to the first reaction chamber 22 using the moving jig 26, the dart pulp 32 was closed again, and then the mixture was diluted with hydrogen gas, for example, to 50% through the gas introduction pipe 29. Susceptor 25 and S! while flowing HCt gas! The substrate 24 was heated at 1100''O for 10 minutes using the high frequency heating coil 34.

この操作によ)S1基板24表面の酸化物は完全に除去
され、かつSi基板24表面がたとえば約0.3μmエ
ツチングされるため、非常に清浄な81表面が形成でき
た。このエツチング工程終了後、Si基板24を115
0°0に加熱し、その状態でガス導入管29よシH7を
10t/分、および5Ict4ヲ20#IlZ分の流量
で20分間導入し、たとえは厚さ6μm、比抵抗100
Ω口の81膜を成長した(この成長したSt膜は実に検
査の結果、転位や積層欠陥が全く見られず、このことか
ら極めて清浄な81基板24表面上に81膜が成長した
ことが示唆された)。この81膜成長工程の間に半導体
基板交換室21にH2ガスを217分の流量で流すとと
もに、第2の反応室23を真空排気したのち、H2ガス
を217分の流量にてガス導入管30よシ流し、この交
換室21と第2の反応室23をH2ガス雰囲気の状態に
保持した。
By this operation, the oxide on the surface of the S1 substrate 24 was completely removed, and the surface of the Si substrate 24 was etched, for example, by about 0.3 μm, so that a very clean surface 81 could be formed. After completing this etching process, the Si substrate 24 is
Heat to 0°0, and in that state, introduce H7 through the gas introduction pipe 29 at a flow rate of 10t/min and 5Ict4 to 20#IlZ for 20 minutes.
An 81 film with a Ω mouth was grown (this grown St film showed no dislocations or stacking faults at all as a result of inspection, which suggests that the 81 film was grown on the extremely clean surface of the 81 substrate 24). ). During this 81 film growth process, H2 gas is flowed into the semiconductor substrate exchange chamber 21 at a flow rate of 217 minutes, and after the second reaction chamber 23 is evacuated, H2 gas is passed through the gas introduction pipe 30 at a flow rate of 217 minutes. The exchange chamber 21 and the second reaction chamber 23 were kept in a H2 gas atmosphere.

前述の81膜成長終了後、Sl基板24を200℃以下
に降温し、ついでダートパルプ32を開きサセプタ25
を上記交換室21に移したのちダートパルプ32を閉じ
た。次にダートパルプ33を開き、移動治具27を用い
てサセプタ25を第2の反応室23に移したのちf−)
バルブ33を閉じた。このようなサセプタ25の移動の
間において、81基板24は非常に高純度のH2ガス雰
囲気中を搬送されるため、成長させたSt膜表面が汚染
されたり、酸化される危険は全くない。
After the above-mentioned 81 film growth is completed, the temperature of the Sl substrate 24 is lowered to 200° C. or less, and then the dirt pulp 32 is opened and the susceptor 25 is
was transferred to the exchange chamber 21, and then the dart pulp 32 was closed. Next, open the dart pulp 33, move the susceptor 25 to the second reaction chamber 23 using the moving jig 27, and then f-)
Valve 33 was closed. During such movement of the susceptor 25, the 81 substrate 24 is transported in a very high purity H2 gas atmosphere, so there is no risk that the surface of the grown St film will be contaminated or oxidized.

次に第2の反応室23内にガス導入管30よりH2ガス
を317分、A s H5を10m11分の流量で流し
、同時に排気ポンプ16を用いて第2の反応室23を0
.1気圧に保ちながら高周波加熱コイル35を用いてサ
セプタ25を450°0に加熱した。この状態で20°
0に保ったトリエチルガリウム中をバブルさせたH2ガ
スを50m/!/分の割合でガス導入管30から導入し
、前記の成長させたSt模膜上約150XのGaAs膜
を成長させた(低温成長膜)。
Next, H2 gas was flowed into the second reaction chamber 23 from the gas introduction pipe 30 for 317 minutes, and A s H5 was flowed at a flow rate of 10 ml and 11 minutes, and at the same time, the exhaust pump 16 was used to pump the second reaction chamber 23 to zero.
.. The susceptor 25 was heated to 450°0 using the high frequency heating coil 35 while maintaining the pressure at 1 atm. 20° in this state
50 m/! of H2 gas bubbled through triethyl gallium kept at 0. A GaAs film of approximately 150× was grown on the grown St model film (low temperature grown film).

次にサセプタ25を700°0まで昇温し、前記のバブ
ルさせたH2ガスに加えて100 ppm濃度のSiH
4を3rnl1分の割合で同時に1時間流した(高温成
長膜)。そののち加熱を止め、400℃以下になった時
点でA m H3とH2ガスの供給を止めた。このよう
に低温および高温の2段階でGaAsのエピタキシャル
成長をおこなう理由は鏡面の膜を得るための操作であり
、本発明の主旨である清浄な81表面へのGaA−膜の
成長に不可欠な操作ではない。このようにして得られ九
GaAa膜の厚さは2.5μmであ夛、溶融KOHな用
いたエッチぎット検査の結果、直径2インチの81基板
全面に亘って1つのAPRも発生していないことが確認
された。さらに、とのGaAs膜のキャリア濃度はI 
X 10”cm−3、移動度は室温で7,000cIr
L2/V、 Sであり、GaAs基板上に成長させたG
aj)v膜のものと較べ何んら遜色のないことが確認さ
れた。
Next, the temperature of the susceptor 25 is raised to 700°0, and in addition to the bubbled H2 gas, SiH with a concentration of 100 ppm is added.
4 was simultaneously flowed for 1 hour at a rate of 3rnl/min (high temperature growth film). Thereafter, the heating was stopped, and when the temperature reached 400°C or lower, the supply of A m H3 and H2 gas was stopped. The reason why GaAs epitaxial growth is performed in two stages, low temperature and high temperature, is to obtain a mirror-like film, and this is not an essential operation for growing a GaA film on a clean 81 surface, which is the gist of the present invention. do not have. The thickness of the nine GaAa films thus obtained was 2.5 μm, and as a result of an etch test using molten KOH, one APR was not generated over the entire surface of the 81 substrate with a diameter of 2 inches. It was confirmed that there was no such thing. Furthermore, the carrier concentration of the GaAs film with is I
X 10”cm-3, mobility is 7,000cIr at room temperature
L2/V, S, and G grown on a GaAs substrate
aj) It was confirmed that there was no inferiority compared to that of the V membrane.

なお、GaA1膜の成長後、81基板24で蔽われてい
ないサセプタ25の一部に多結晶GaAsが付着するが
、上述の第1の反応室22内でのサセプタ25の空焼き
を十分におこなうことにより、この付着したGaAs多
結晶を完全に除去できた。
Note that after the growth of the GaA1 film, polycrystalline GaAs will adhere to the part of the susceptor 25 that is not covered by the 81 substrate 24, but the susceptor 25 should be thoroughly baked in the first reaction chamber 22 as described above. As a result, this adhered GaAs polycrystal could be completely removed.

上記と同様の操作でSt模膜上のGaAs膜の成長を1
0回試みたところGaAsの膜厚、移動度のバラツキは
5チ以内であって、極めて再現性が良く、かつAPRの
ない鏡面のGaA−膜が得ら扛た。
The growth of the GaAs film on the St mock film was performed by the same operation as above.
After 0 attempts, the variation in GaAs film thickness and mobility was within 5 inches, and a mirror-like GaA film with extremely good reproducibility and no APR was obtained.

実施例2 第1図の装置を用いて、St太陽電池とGaAs太陽電
池を1つの81基板上に積層するいわゆるモノリシック
カスケード型太陽電池の作製例を説明する。
Example 2 An example of manufacturing a so-called monolithic cascade type solar cell in which a St solar cell and a GaAs solar cell are laminated on one 81 substrate will be described using the apparatus shown in FIG.

n型S1基板を脱脂洗浄した稜、実施例1と同一手順に
より第1の反応室22に入れ、HCtガスを用いてSi
基板表面をエツチングした。その後、H2を101/分
、5tcz4を201114/分、180 ppmのフ
ォスフインを11//分の流量で20分間流し、つづい
てフォスフインのみの供給を止め、かわりに1100p
pのジボランを10扉l/分の流量で5分間導入した。
The edge of the n-type S1 substrate after degreasing and cleaning was placed in the first reaction chamber 22 according to the same procedure as in Example 1, and Si was heated using HCt gas.
The surface of the substrate was etched. After that, H2 was flowed at a flow rate of 101/min, 5tcz4 at 201114/min, and 180 ppm phosphine at a flow rate of 11/min for 20 minutes, then the supply of only phosphine was stopped, and 1100 p/min was supplied instead.
p of diborane was introduced for 5 minutes at a flow rate of 10 doors l/min.

この結果、n型81基板24上に厚さ6μmのn型S1
膜(キャリヤ濃度1017σ−3)、つづいて厚さ1、
5 fimのp型S1膜(l 918m−’ )が形成
され、その後、実施例1と同様な手順でサセプタ25を
第2反応室23に移した。まず450℃に加熱した状態
でトリエチルガリウムC50m11分)とシラン(30
R1/分)を2分間流し、つづいて両者の流量を保った
ままサセプタ25を700℃に昇温し、約1時間流した
。この時点でシランの供給のみを止め、1000 pp
mのジメチルジンクを200m1Z分の流量で10分流
した。これによって厚さ2.5μmのn型GaAs膜(
10cIIt)、その上に厚さ0.4pmのp型GaA
s膜(5x 10”cTL−3)が形成される。さらに
、サセプタ25を800°0に昇温するとともに、トリ
メチルアルミニウム(−15°0保温、H2流′M′1
2m1Z分)を10分間流し、最後にトリメチルアルミ
ニウムの供給を止め、トリエチルガリウムとジメチルジ
ンクのみを2分間流した。
As a result, an n-type S1 with a thickness of 6 μm is placed on the n-type 81 substrate 24.
film (carrier concentration 1017σ-3), followed by a thickness of 1,
A p-type S1 film (1918m-') of 5 fim was formed, and then the susceptor 25 was moved to the second reaction chamber 23 in the same manner as in Example 1. First, while heating to 450℃, add triethyl gallium C (50ml for 11 minutes) and silane (30ml).
R1/min) was flowed for 2 minutes, and then the temperature of the susceptor 25 was raised to 700° C. while maintaining both flow rates, and the flow was continued for about 1 hour. At this point, only the supply of silane was stopped, and 1000 pp.
ml of dimethyl zinc was flowed for 10 minutes at a flow rate of 200 ml/Z. This results in a 2.5 μm thick n-type GaAs film (
10cIIt), on which a 0.4 pm thick p-type GaA
s film (5x 10"cTL-3) is formed.Furthermore, the temperature of the susceptor 25 is raised to 800°0, and trimethylaluminum (-15°0 heat retention, H2 flow 'M'1
2ml/Z) was flowed for 10 minutes, and finally the supply of trimethylaluminum was stopped and only triethylgallium and dimethylzinc were flowed for 2 minutes.

これによって前記pn接合を含むGaA@膜上に厚さ0
、5 μmのp型At、)、B G&o、z Aaと厚
さ0.174mのGaAs膜が積層された。前者は太陽
光を照射する際の窓層、後者は電極用のキャップ層とし
て用いた。
As a result, a thickness of 0 is formed on the GaA@ film including the pn junction.
, 5 μm p-type At, ), B G&o, z Aa and a 0.174 m thick GaAs film were laminated. The former was used as a window layer for irradiating sunlight, and the latter was used as a cap layer for electrodes.

こうして作製した太陽電池は、波長0.3〜1.1μm
の光に反応する分光感度特性を示し、かつ、2vの開放
端電圧が得られたことから、2つの太陽−池が有機的に
作用していることが確かめられた。
The solar cell produced in this way has a wavelength of 0.3 to 1.1 μm.
It was confirmed that the two solar ponds were working organically since the solar cell exhibited spectral sensitivity characteristics that reacted to light of 2.0 V, and an open-circuit voltage of 2 V was obtained.

(発明の効果) 以上詳述したように、本発明は複合半導体薄膜を形成す
るに際し、まずSt基板上にSt膜を気相成長させ、こ
れを高純度のH2ガス雰囲気に保った状態でGaA@成
長室に搬送するようにしたから81表面の汚染物の問題
を完全に解決でき、結晶性の優れた化合物半導体薄膜を
再現性良く作製することが可能となった。
(Effects of the Invention) As described in detail above, when forming a composite semiconductor thin film, the present invention first grows a St film on a St substrate in a vapor phase, and then grows a GaA film while maintaining it in a high purity H2 gas atmosphere. By transporting the film to the growth chamber, the problem of contaminants on the 81 surface was completely solved, and it became possible to produce a compound semiconductor thin film with excellent crystallinity with good reproducibility.

なお、上記実施例ではSt基板上にドーパントを含まな
いS1膜を形成した例について説明したが、このS1膜
成長中にドーパント材料(たとえばPH3゜B2H6等
)を流すことにより、81膜中にpn接合を形成し、そ
のよりなS1膜上にpn接合を有するGaAs膜あるい
はAtGaA@膜を積層することによりS1素子と化合
物半導体素子なモノリシックに積層した素子、例えば多
接合太陽電池を作製することができる。
In the above example, an example was explained in which an S1 film not containing a dopant was formed on an St substrate. By forming a junction and laminating a GaAs film or an AtGaA@ film having a pn junction on the S1 film, it is possible to fabricate a monolithically laminated element such as an S1 element and a compound semiconductor element, such as a multijunction solar cell. can.

さらに、上述の如くサセプタが外気に触れることなく、
2つの成長炉(第1および第2の反応室)の間を自由に
往来できるため、化合物半導体膜上にさらにS1膜を気
相成長させた多層構造の素子を作製することもできる。
Furthermore, as mentioned above, the susceptor does not come into contact with the outside air,
Since it is possible to freely move back and forth between the two growth furnaces (first and second reaction chambers), it is also possible to fabricate an element with a multilayer structure in which an S1 film is further vapor-phase grown on a compound semiconductor film.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例に係わる半導体薄膜の製造装
置の模式図、第2図は第1図の装置を上から見九ときの
模式図、第3図は従来の半導体薄膜製造装置の模式図で
ある。 1・・・81基板交換室、2・・・成長室、3・・・カ
ーボンサセプタ、4・・・81基板、5・・・反応付着
物、2I・・・半導体基板交換室、22・・・第1の反
応室、23・・・第2の反応室、24・・・Sl基板、
25・・・サセプタ、26.27・・・サセプタ移動治
具、28・・・真空ポンプ、29,30.31・・・ガ
ス導入管、32,33・・・ff−)パルプ%34.3
5・・・高周波加熱コイル、36・・・排気ポンプ。 出願人代理人  弁理士 鈴 江 武 彦第1図
FIG. 1 is a schematic diagram of a semiconductor thin film manufacturing apparatus according to an embodiment of the present invention, FIG. 2 is a schematic diagram of the apparatus shown in FIG. 1 viewed from above, and FIG. 3 is a conventional semiconductor thin film manufacturing apparatus. FIG. DESCRIPTION OF SYMBOLS 1...81 substrate exchange chamber, 2... Growth chamber, 3... Carbon susceptor, 4...81 substrate, 5... Reaction deposit, 2I... Semiconductor substrate exchange chamber, 22...・First reaction chamber, 23... Second reaction chamber, 24... Sl substrate,
25...Susceptor, 26.27...Susceptor moving jig, 28...Vacuum pump, 29,30.31...Gas introduction pipe, 32,33...ff-) Pulp% 34.3
5... High frequency heating coil, 36... Exhaust pump. Applicant's agent Patent attorney Takehiko Suzue Figure 1

Claims (4)

【特許請求の範囲】[Claims] (1)シリコン基板表面の異質物を除去する清浄化工程
と;該基板上にケイ素の水素化物あるいは塩素化物を主
成分とする原料ガスを導入して、その熱分解反応により
該基板上にシリコン膜をエピタキシャル成長させる工程
と;ついで該基板を水素雰囲気にて保たれた経路を介し
て化合物半導体成長室に導き、さらに同じく該成長室内
に導入された周期律表第II族あるいは第III族元素を含
む有機金属および第VI族あるいは第V族元素水素化物の
熱分解により前記エピタキシャル成長シリコン膜上に化
合物半導体薄膜をエピタキシャル成長させる工程とを具
備してなることを特徴とする化合物半導体薄膜の形成方
法。
(1) A cleaning process to remove foreign matter from the surface of the silicon substrate; introducing a raw material gas containing silicon hydride or chloride as a main component onto the substrate, and causing a thermal decomposition reaction to cause silicon to form on the substrate. A step of epitaxially growing a film; then, the substrate is introduced into a compound semiconductor growth chamber via a path maintained in a hydrogen atmosphere, and a Group II or III element of the periodic table is introduced into the growth chamber. A method for forming a compound semiconductor thin film, comprising the step of epitaxially growing a compound semiconductor thin film on the epitaxially grown silicon film by thermal decomposition of an organic metal and a Group VI or Group V element hydride.
(2)化合物半導体薄膜のエピタキシャル成長を低温つ
いで高温の2段階に分けておこなう特許請求の範囲第1
項記載の化合物半導体薄膜の形成方法。
(2) Claim 1, in which the epitaxial growth of a compound semiconductor thin film is performed in two stages: low temperature and high temperature.
A method for forming a compound semiconductor thin film as described in .
(3)シリコン膜のエピタキシャル成長工程をドーパン
トガスを含む雰囲気中でおこなう特許請求の範囲第1項
記載の化合物半導体薄膜の形成方法。
(3) The method for forming a compound semiconductor thin film according to claim 1, wherein the epitaxial growth step of the silicon film is performed in an atmosphere containing a dopant gas.
(4)排気口、半導体装置基板を保持するためのサセプ
タ導入手段、加熱機構、原料ガス導入口をそれぞれ有し
、独立して閉塞可能な一対の気相反応室と;該一対の気
相反応室間に介在し、これらとの間を開閉するための一
対のゲートバルブを有する半導体基板交換室又は通路と
を具備し、該半導体基板交換室又は通路を介して前記気
相反応室間を前記サセプタが外気に触れることなく移動
し得るようにしたことを特徴とする化合物半導体薄膜の
形成装置。
(4) a pair of gas-phase reaction chambers each having an exhaust port, a susceptor introduction means for holding a semiconductor device substrate, a heating mechanism, and a raw material gas introduction port, and which can be closed independently; the pair of gas-phase reaction chambers; A semiconductor substrate exchange chamber or a passageway is provided between the chambers and has a pair of gate valves for opening and closing between the chambers, and the gas phase reaction chambers are connected through the semiconductor substrate exchange chamber or passageway. A compound semiconductor thin film forming apparatus characterized in that a susceptor can be moved without coming into contact with outside air.
JP61140920A 1986-06-17 1986-06-17 Method of forming compound semiconductor thin film Expired - Lifetime JP2642096B2 (en)

Priority Applications (1)

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JP61140920A JP2642096B2 (en) 1986-06-17 1986-06-17 Method of forming compound semiconductor thin film

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Application Number Priority Date Filing Date Title
JP61140920A JP2642096B2 (en) 1986-06-17 1986-06-17 Method of forming compound semiconductor thin film

Publications (2)

Publication Number Publication Date
JPS62296510A true JPS62296510A (en) 1987-12-23
JP2642096B2 JP2642096B2 (en) 1997-08-20

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0263118A (en) * 1988-08-29 1990-03-02 Nec Corp Surface treatment and its apparatus
JPH04137613A (en) * 1990-09-28 1992-05-12 Handotai Process Kenkyusho:Kk Method and apparatus for manufacture of semiconductor device
KR20140014216A (en) * 2011-04-07 2014-02-05 나스프 Iii/V 게엠베하 Method for producing a iii/v si template
US9595438B2 (en) 2011-09-12 2017-03-14 Nasp Iii/V Gmbh Method for producing a III/V Si template

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62128518A (en) * 1985-11-29 1987-06-10 Matsushita Electric Ind Co Ltd Vapor growth equipment

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62128518A (en) * 1985-11-29 1987-06-10 Matsushita Electric Ind Co Ltd Vapor growth equipment

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0263118A (en) * 1988-08-29 1990-03-02 Nec Corp Surface treatment and its apparatus
JPH04137613A (en) * 1990-09-28 1992-05-12 Handotai Process Kenkyusho:Kk Method and apparatus for manufacture of semiconductor device
KR20140014216A (en) * 2011-04-07 2014-02-05 나스프 Iii/V 게엠베하 Method for producing a iii/v si template
JP2014511815A (en) * 2011-04-07 2014-05-19 エヌアーエスペー スリー/ヴィー ゲーエムベーハー III / VSi Template Manufacturing Method
US9595438B2 (en) 2011-09-12 2017-03-14 Nasp Iii/V Gmbh Method for producing a III/V Si template

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