JPS62288955A - Information transmission system - Google Patents

Abstract

PURPOSE:To transmit information without reducing its quantity independently of the unit code system of a transmission line by storing bit parts which cannot be transmitted by the transmission line and transmitting information at every time when the certain quantity of information which can be transmitted by the transmission line is stored. CONSTITUTION:A control circuit 12 requests an 8-bit information processor 1 to transmit 8-bit information continuously 7 times, and the processor 1 continuously transmits 8-bit information 7 times through an 8-bit bus 5 in response to every request. An information transmission equipment 2 divides received 8-bit information into a 7-bit part and a one-bit part, and the 7-bit part is inputted to a transmission circuit 11 and is transmitted to a reception equipment 3 successively, and the one-bit part is stored in a shift register 10 successively. Next, the circuit 12 inputs 7 one-bit parts stored in the register 10 to the circuit 11 and they are transmitted to the equipment 3. These procedures are repeated to continue information transmission. Thus, equipments or transmission lines different in unit code system can be used.

Description

[Detailed Description of the Invention] 3. Detailed Description of the Invention [Field of Industrial Application] The present invention relates to an information transmission method in an information processing system.

[Conventional technology]

If you try to transmit information using a unit code system that is larger than the unit code system used on the transmission path, for example, when performing international communication, information in a 6-unit code system will be sent via a transmission path with a 5-unit code system. If you try to
As shown in the 13th line of page 9, it is common to convert a 6-unit code into a 5-unit code and transmit it.

[Problems to be Solved by the Invention] The above-mentioned conventional technology has a problem in that the codes that can be converted are limited.

An object of the present invention is to transmit information without losing the amount of information, regardless of the unit code system of the transmission path.

[Means for solving problems]

The above object is achieved by storing bits that cannot be transmitted on the transmission path and transmitting them every time a certain amount that can be transmitted on the transmission path is accumulated.

[Effect]

The information to be transmitted is divided into bit parts that can be transmitted over the transmission path and bit parts that cannot be transmitted, and the bit parts that can be transmitted are transmitted sequentially first, and the bit parts that cannot be transmitted are stored, and the fixed amount that can be transmitted over the transmission path is determined. The content is transmitted each time it is accumulated, and on the receiving side, the bits that are transmitted first and can be transmitted are stored in sequence, and a certain amount of bits that are transmitted later and cannot be transmitted are stored. When the information is transmitted, the two are combined together and the information is reproduced, so there will be no missing information.

〔Example〕

Hereinafter, one embodiment of the present invention will be described based on the drawings.

FIG. 1 explains the whole of this embodiment, and FIG.
3 are diagrams showing the operation of this embodiment.

In FIG. 1, an 8-bit information processing device 1 is connected to an information transmitting device [2] via an 8-bit bus 5 and a control line 8, and the information transmitting device 2 is connected to an information receiving device 3 via a 7-bit transmission line 6. The information receiving device 6 is connected to an 8-bit bus 7 by a control line 9.

The 8-bit information processing device 1 transmits 8-bit information to the 8-bit information processing device 4 via the 7-bit transmission path 6.

FIG. 2 explains a method of converting 8-bit information outputted from the 8-bit information processing device 1 into 7-bit information and transmitting it to the information receiving and transmitting device 3 via the 7-bit transmission line 6. 8-bit information processing device g! ! 1 starts transmitting 8-bit information, the control circuit 1 sends notification of the start of transmission using the control line 8.
Contact 2. The control circuit 12 establishes preparations for information transmission with the information receiving device 3 via the transmitting circuit 11 in accordance with a determined transmission protocol. When the preparation is established, the control circuit 12 requests the 8-bit information processing device f1 to transmit 8-bit information seven times in succession, and the 8-bit information processing device 1 sends seven 8-bit information via the 8-bit bus 5 for each request. Send bit information continuously. In the information transmission device 2, the 8-bit information transmitted from the 8-bit bus 5 is divided into a 7-bit part and a 1-bit part, and the 7-bit part is input as is to the transmitting circuit 11, and the information is sequentially transmitted through the 7-bit transmission line 6. The data is transmitted to the receiving device 6, and the 1-bit portion is sequentially stored in the shift register 10. When the transmission of the seven 7-bit parts is completed, the seven 1-bit parts have been stored in the shift register 10, and the control circuit 12 then transfers the seven 1-bit parts stored in the shift register 10. is input to the transmitting circuit 11 and transmitted to the information receiving device 3 through the 7-bit transmission line 6. By repeating the steps mentioned above,
Continue transmitting information.

8 for the 8-bit information processing device 1 from the control circuit 12
In response to a bit information transmission request, when the transmission information ends, the 8-bit information processing device 1 notifies the control circuit 12 of the end of the transmission information using the control line 8. The control circuit 12 is
When receiving notification of the end of the transmission information, the contents of the shift register 10 at that time are input to the transmitting circuit 11 and transmitted to the information receiving/transmitting station B, after which procedures for terminating the information transmission are carried out according to the established transmission protocol. At this time, although the shift register 10 does not necessarily store seven 1-bit parts, it is transmitted as is.

FIG. 3 explains a method for converting 7-bit information transmitted from the 8-bit information processing device 1 via the 7-bit transmission path 6 into 8-bit information and transmitting it to the 8-bit information processing device 4. . As described in the explanation of FIG. 2, preparations for starting information transmission are made between the control circuit 15 and the information transmission device 2 via the receiving circuit 13 according to a predetermined protocol. When preparations for information transmission are established, seven 7-bit portions of information are successively transmitted through the 7-bit transmission path 6, and then seven 1's stored in the shift register 10 are transmitted.
The bit part is transmitted. Subsequently, seven 7-bit portions of information and seven 1-bit portions are transmitted, and by repeating this, information transmission is performed. The transmitted 7-bit information is divided into eight pieces by the control circuit 15 and input into the buffer circuits 16 and 17 alternately. The buffer circuit 16 and the buffer circuit 17 are constituted by the same circuit, and are similarly controlled by the control circuit 15. Therefore, the internal circuit of the buffer circuit 17 is omitted in FIG. 3, and the detailed explanation of the operation of the buffer circuit 17 is also omitted. The first seven of the eight pieces of 7-bit information input to the buffer circuit 16 are sequentially stored in the register group 18 consisting of seven registers A1 to A7 under the control of the control circuit 15, and then stored in the register B19. 7
Each time bit information is input, its contents are stored.
Finally, eight pieces of 7-bit information are stored in the register group 18 and register B 19 in the order in which they were input. Therefore,
Seven consecutive 7-bit parts are stored in the register group 18, and seven 1-bit parts accumulated in the shift register 10 are stored in the register B19. The next eight pieces of 7-bit information to be transmitted are controlled by the control circuit 15.
The signal is input to the buffer circuit 17 using the same procedure as the buffer circuit 16. When 7-bit information is input to the buffer circuit 17, the buffer circuit 16 simultaneously reads the contents of the register group 18 in the order of A1 to A7, and reads the contents of the register B19 as input to the shift register 10. Read each bit one by one in order, and read out the 7-bit part and 1 bit.
Seven pieces of 8-bit information are generated by combining the bit parts, and inputted to the bus switching circuit 14. The bus switching circuit 14 is controlled by a control circuit 15, and when the transmitted 7-bit information is input to the buffer circuit 16, it selects the output of the buffer circuit 17, and when the transmitted 7-bit information is input to the buffer circuit 17, it selects the output of the buffer circuit 17. The output of the circuit 16 is selected and 8-bit information is transmitted to the 8-bit information processing device 4 through the 8-bit bus 7. Information transmission between the information receiving device 5 and the 8-bit information processing device 4 is controlled by a control circuit 15 using a control line 9. When the information receiving device 3 receives the final 7-bit information, the control circuit 15 performs a procedure for terminating the information transmission with the information transmitting device 2 via the receiving circuit 16 according to a predetermined protocol. When the final 7-bit and node information is received, the buffer circuit 16 is selected,
When the final 7-bit information is stored in register A5 and register B19 of register group 18, control circuit 15 inputs all output signals of buffer circuit 17 to bus switching circuit 14 and transmits them to 8-bit information processing device 4. Also, switch the bus switching circuit 14 to the buffer circuit 16, and register group 1
At the same time, the contents of the register B1 are read out in the order of A1-A4 in the order in which they were input to the shift register 10, and the 7-bit part and the 1-bit part are combined to form 4 pieces of 8-bit information. The generated data is transmitted to the 8-bit information processing device 4, and the information transmission from the 8-bit information processing device 1 to the 8-bit information processing device 4 is completed.

In the above embodiment, only the information transmission from the 8-bit information processing device 1 to the 8-bit information processing device 4 was explained.
By adding an information receiving device to the 8-bit information processing device 1 and adding an information transmission device to the 8-bit information processing device 4, it is also possible to transmit information from the 8-bit information processing device 4 to the 8-bit information processing device 1. It is.

Furthermore, in the above embodiment, the information output from the 7-bit transmission line 6 can be output and stored on 7 units of paper tape.

〔Effect of the invention〕

According to the present invention, devices or transmission paths with different unit code systems can be used, so that devices or transmission paths can be used effectively.

[Brief explanation of the drawing]

FIG. 1 is an overall diagram of an embodiment of the present invention, FIG. 2 is an explanatory diagram showing an information transmission method in the embodiment shown in FIG. 1,
FIG. 6 is an explanatory diagram showing a method of receiving information in the embodiment shown in FIG. 5...8 bit bus, 6...7 bit transmission line, 7...
...8-bit bus, 10. -, shift register, 16・
...Buffer circuit, 17...Buffer circuit, 18...
・Register group, 19...Register B0

Claims (1)

[Claims] 1. From an information processing device whose input/output processing unit is N bits to another device via an information transmission system whose transmission unit is (N-n) bits (n is an integer between 1 and N/2), In an information transmission method that transmits one or more pieces of consecutive N-bit information to an N-bit information processing device, the N-bit information output from the N-bit information processing device is (N-n)
It is divided into a bit part and an n-bit part, and the (N-n) bit part is sequentially input to the (N-n) bit information transmission system, and the n-bit part is sequentially accumulated, so that M×n≦N-n
Define an integer M satisfying An information transmission method characterized by transmitting information as input into a system.