JPS622870A - Semiconductor switch element input controller - Google Patents

Abstract

PURPOSE:To stop that a plurality of semiconductor switch elements simultaneously become ON by connecting a voltage sensor between the terminals of the elements which should not become simultaneously ON. CONSTITUTION:A semiconductor switch element S2 is OFF when the output signal of a voltage sensor PT2 for detecting whether the element S2 is OFF or not is a high level Vh2, and an AND gate G1 turns ON a semiconductor switch element S1 by the input of the high level Vh2 and a drive signal V1. When the element S1 becomes ON, a voltage between the terminals becomes a low level of substantially zero, and the output of a voltage sensor PT1 becomes a low level of substantially zero. The output of low level of the sensor PT1 is input to an AND gate G2. Accordingly, an ON signal is not input to the element S2.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a semiconductor switch element input control circuit used for train control, press control, etc. in railways. When controlling, the voltage between the terminals of the semiconductor switch element is detected by a voltage sensor, and when there is an output from this voltage sensor.

By supplying an on signal to other semiconductor switching elements that do not belong to the voltage sensor through the AND gate,
This makes it possible to prevent failures caused by a plurality of semiconductor switch elements.

Conventional technology For example, in press control, when a motor is operated in forward and reverse directions, conventionally, as shown in FIG.
In series with the falling contact IMR+ of the reverse control relay IMR.
(The contact that is closed when relay IMR is de-energized) is connected, while the falling contact IMRI of forward control relay INF is connected in series with reverse control relay IMR to form a relay control circuit. It is. As shown in FIG. 6, when the forward rotation control relay II is energized, the signal is passed through its operating contacts INFI to lNF4, and when the reverse rotation control relay IMR is energized, its operating contacts IMR+ to IMR are energized. Main motor M through MR4
It is designed to run in forward and reverse directions.

Problems to be Solved by the Invention However, since the conventional relay control circuit described above is a contact type, there are various problems with the contact type.

For example, problems such as an increase in the size of the circuit configuration, deterioration of contacts, and the necessity of maintenance and inspection due to lifespan cannot be avoided.

Instead of a contact control relay, it is also possible to configure a non-contact R/conductor switch element input control circuit using electronic circuit elements, such as a flip or flop circuit, but the interlock may not be established in the event of a short-circuit failure. That is, in a normal circuit configuration, there are problems such as the input terminal being short-circuited in the event of a circuit failure and fail-safe performance cannot be ensured, and it cannot be easily replaced.

Means for Solving the Problems In order to solve the problems of the prior art as described below, the present invention provides a circuit for controlling a plurality of semiconductor switch elements so that they are not turned on at the same time. It is characterized by comprising a voltage sensor connected therebetween, and an AND gate that supplies an on signal to another semiconductor switch element to which the voltage sensor does not belong when there is an output from the voltage sensor.

According to the present invention, a voltage sensor connected between the terminals of a plurality of semiconductor switch elements that should not be turned on at the same time detects the presence or absence of a short circuit in the semiconductor switch elements, and when there is an output from this voltage sensor, It is possible to configure a semiconductor switch element input control circuit that can reliably prevent a plurality of semiconductor switch elements from being turned on simultaneously by driving other semiconductor switch elements through the AND gates.

The voltage sensor and AND gate are configured so that the output is zero in the event of a failure. By doing so, it is possible to prevent the semiconductor switch elements from being turned on simultaneously in the event of a circuit failure of the voltage sensor and the AND gate, thereby ensuring fail-safe performance.

Figure 1 on the real male side is a block diagram of a semiconductor switch element input control circuit according to the present invention. In Figure 0, Sl and S2 are semiconductor switch elements, RL+ and RL2 are loads such as motors, and PT+ and PT2 are voltages. Sensor, G1 and G7
is an and gate.

When one of the loads RL+ and RL is excited,
They are interlocked so that the other is not energized. In order to ensure this interlock operation, the semiconductor switches 1 and 2 are not allowed to be turned on at the same time.

The semiconductor switch element St, 52 is generally.

It is a two-terminal or four-terminal semiconductor switching element with two main electrodes and a control pole, for example a unidirectional or bidirectional thyristor, or an optically coupled thyristor with an optically coupled element in the gate.

The voltage sensor P + is connected between the terminals of the semiconductor switch element l,
That is, it is connected between one electrode A and one electrode A. Voltage sensor PT2 is similarly connected between the main electrode A and the main '-π pole of semiconductor switch element S2. The voltage between the terminals of the semiconductor switch element Sl, 52 is at a low level approximately equal to zero when the conductor switch element St, s2 is on, but when it is off, the voltage between the terminals of the semiconductor switch element S1, S1, 52 increases to the drive power supply voltage V, The voltage sensor PT+ has a high level approximately equal to s.
, PT/ detects whether the semiconductor switch elements Fs+, S2 are on or off based on the change in the voltage between the terminals.

In this case, the voltage sensors PIT and PT2 are configured to produce a high-level output when the semiconductor switch elements Sl and S2 are off, and to produce a low-level output of approximately zero when they are on, and to prevent their own circuit failures. The configuration is such that the output is at a low level of approximately zero. Such voltage sensors PTI, PT2 are 1, for example, drive power supply voltage vS
In the case of AC, it can be realized by a photocoupler or piezoelectric transformer, and in the case of DC, it can be realized by configuring an oscillator whose power source is between the terminals A-. It was published in No. 59-083529.

Next, the ant game) G+ uses the high level voltage detection signal Vdz given from the voltage sensor 2 and the drive signal V+ for driving the load 3 as input conditions, and outputs the AND output from the semiconductor switch. It is designed to be supplied to the control electrode G of Ifi T-3+.In the same way, the AND gate G2 also uses the high level voltage detection signal Vhl obtained from the voltage sensor PT+ to drive the load RL2. The drive signal v2 is used as an input condition, and the AND output thereof is supplied to the semiconductor switch element S2.

In the circuit configuration shown in L, first, when the semiconductor switch element S1 is turned on before driving the load 3, the voltage sensor PT2 detects whether the semiconductor switch element S2 is turned off. 'When the output signal of the heavy pressure sensor PT2 is at the high level vh2, the semiconductor switching element S2 is in the OFF state, and the antagonal) G+
By inputting this high level Vh2 and the drive signal v1, the human power condition of the AND gate G1 is satisfied, and the logical product output turns on the conductor switch element Sl.

When the i-conductor switch element S1 is turned on, the voltage between its terminals becomes a low level of approximately zero, and the output of the voltage sensor PT also becomes a low level of approximately zero. This low level output signal of voltage sensor PT+ is input to AND gate G2. Therefore, even if the drive signal V2 is input, the 4-AND gate Gz remains closed because the input conditions are not satisfied, and no on signal is input to the semiconductor switch element S2. That is, an interlock is applied between the semiconductor switch elements 51-52 and the loads RL+-RL2.

Furthermore, if the semiconductor switching element S2 is in a short-circuited state due to a failure or an abnormality, the output of the voltage sensor PT2 will be at a low level, so when driving the load RL+, the drive signal Vt is input to the controller Even in this case, the input conditions for the input voltage G+ are not met, so the semiconductor switching element S1 will not turn on. Therefore, even if a short-circuit failure or the like occurs in the semiconductor switching element S2, the semiconductor switching element Sl, Failures caused by simultaneous excitation of S2 can be prevented.

When driving the load RL2, the semiconductor switching element S2 is turned on by the same circuit action as described above, and the load R2 is turned on.
At the same time as L2 is driven, the semiconductor switch element 31-
An interlock is applied between the load RL+-RL2 and the load RL+-RL2, and also prevents a short-circuit failure of the semiconductor switch element S1.

G1 and G2 mentioned above have a fail-safe circuit configuration in which the AND output becomes zero when their own circuits fail. Fail-safe construction of AND gate G+ and G2 is possible, for example, in Utility Model Application No. 55-79107 proposed by the present applicant.
This can be achieved using the No. 2 window comparator. FIG. 2 shows a specific example. In FIG. 2, the case of AND gate G+ is explained as an example, but AND gate G2 also has a similar circuit configuration. In Figure 2,
Transistors GII, Gl', and G13 constitute a two-man-operated AND operation oscillator, and drive signal v1 and voltage sensor PT? Simultaneous input with the voltage detection signal h2 from the transistor causes oscillation through the feedback resistor 0 due to the delay characteristics of the transistors GB and G13.This oscillation output is rectified by the rectifier circuit GI5, and the rectified output is connected to the diode GI& Self-maintenance is achieved by feeding back to the voltage detection signal input terminal side via the feedback loop f.

The rectifier circuit GI5 also includes, for example, "Transistor technology, 1
For example, as shown in FIG. 3, a capacitor G15c and a diode Glad are inserted in series between the input terminal G15a and the output terminal GI5b, and the capacitor G15c and diode G+5d
connection point, and the common line G+se with the diode G+sd
diode G15f and capacitor GISg between
By creating a circuit configuration in which these are connected to each other, fail-safe performance can be ensured.

Note that, as described above, the voltage sensors PTI and PT2 can be made fail-safe by using a photocoupler, a piezoelectric transformer, or the like.

FIG. 4 shows an example in which the semiconductor switch element input control circuit according to the present invention is applied to forward/reverse operation of a three-phase motor M.

The semiconductor switching elements S3 to S6 are composed of bidirectional thyristors with AC gates or composite elements that can be driven by DC input (for example, Solid, State, Relay, a product made by Saizu Risk and photocouplers). .

1 [In the case of rotation operation, ゛r: conductor switch element S3 turns on the ■ phase, and conductor switch element fsb turns on the U phase. In the case of reverse operation, phase switching between the V phase and the U phase is carried out by the half-quad switch elements S4 and S5, thus the semiconductor switch element -f S3
and switch S4. Semiconductor switch JFS5 and S6
These are switches that should not be turned on at the same time.

A: In order to prevent the conductor switch element S3 and the semiconductor switch JfS4 from being turned on simultaneously, voltage sensors P'h and PT4 are connected between the terminals of the semiconductor switch S= and Ss.
At the same time, the output of voltage sensor PT3 is supplied to the input terminal of AND gate G4, and voltage sensor PT
The output of a is supplied to the input terminal of an AND gate G3. AND gate G, one input terminal r
A drive signal Iu corresponding to the U phase is supplied to the gate G4, and a drive signal 1v corresponding to the V phase is supplied to the other input terminal of the AND gate G4.

Moreover, the semiconductor switch element S5 and the semiconductor switch element S
In order to prevent 6 from turning on simultaneously, voltage sensors PT5 and P are connected between the terminals of semiconductor switching elements SS and S6.
Tb are connected to each other, and the output of the voltage sensor PTs is supplied to the input terminal of the AND gate G6, and the output of the voltage sensor PT6 is supplied to the input terminal of the AND gate G5.

The other input terminal of the AND gate G5 is supplied with a drive signal Iv corresponding to the V phase, and the other input terminal of the AND gate G6 is supplied with a drive signal Iu corresponding to the U phase. It is supposed to be done.

To operate the motor M in normal rotation, the semiconductor switch element S
3.56, when turning on the conductor switch element S4
, S! The voltage sensor P determines whether l is off or not.
Detected by Ta, PTb.

The output signals of voltage sensors PTa and PTb are at high level V
h2, the semiconductor switch elements S4, S
s is in the off state, and the high level of the AND gates Ga and G6 and the human power of the drive signals Iu and Iv satisfies the human power conditions of the AND gates 1, G3, and G6.

Based on the AND output, semiconductor switch elements S3, S
6 is turned on.

When the conductor switch elements S3 and S6 are turned on, the main voltage between the terminals F and F becomes a low level of approximately zero, and the voltage sensor P'
h, the output of PTb also becomes a low level of approximately zero. The low level output signals of the heavy pressure sensors ρT3 and PTb are input to the analogues G4 and G5.

Therefore, the AND gates G4 and Gs are temporarily connected to the drive signal I
Even if u and Iv are input manually, the input conditions are not satisfied, so they remain closed, and no on signal is input to the semiconductor switching elements Sn, 35. In other words, 1. An interro 7 is applied between semiconductor switch elements S3-54 and S5-56.

In addition, if the semiconductor switch elements Ss and S5 are in a short-circuited state due to a failure or an abnormality, the voltage sensor PT3
, because the output of PTb becomes low level.

Even if the drive signals Iu and Iv are input to G3 and G6, the input conditions are not established, so the semiconductor switch element S
3. Sb is never turned on.

Therefore, even if a short-circuit failure occurs in semiconductor switch elements l-54 and s5, between semiconductor switch elements S3 and S5,
Failures caused by simultaneous short circuits between s-56 can be prevented.

When the motor M is operated in reverse, the U-phase semiconductor switch element S4 and the V-phase semiconductor switch element S5 are turned on by the same circuit action as described above, and at the same time as the motor M rotates in reverse, the semiconductor switch element S3-34 is turned on. .55=Sb
An inter-off is applied between the two, and also prevents failure in the event of a short-circuit failure of the semiconductor switching elements S3 and Sb.

Furthermore, in this embodiment, the inputs of the AND gates G3 to G6 are branched in parallel to OR circuits OR3 to OR6, and the OR outputs of the OR circuits OR3 to ORb are input to the AND gate GA. With such a circuit configuration, if a short circuit failure occurs in any one of the semiconductor switch elements 33 to S6,
On the condition that the drive signals Iu and Iv disappear, the AND output of the analog GA disappears, so that a short-circuit failure can be detected.

For example, if the conductor switch fs5 is turned on after the conductor switch fsb is turned off, the semiconductor switch When element S5 is on and the output of the next voltage sensor PT6 decreases, if the voltage detection signal, which is generated at a high level at times, is held by itself in the feedback loop f like the AND gate in Fig. 2. If the input to the AND gate is not instantaneous, it goes without saying that the fail-safe AND gate shown in FIG. 2, which does not include the feedback loop f, may be sufficient. If you need the second
The oscillation output shown in the figure may not be directly rectified, but may be inputted to the gates of the semiconductor switches S3 to S6 through transformer coupling, for example.

As mentioned above, a voltage sensor connected between the terminals of a plurality of semiconductor switching elements, which should not be turned on at the same time, detects the presence or absence of a short circuit in a conductive switching element,
When there is an output from this voltage sensor, it can drive other semiconductor switching elements through the AND gate, reliably preventing multiple semiconductor switching elements from turning on at the same time, unlike the case of contact relays. The circuit configuration is small, which reduces contact deterioration and shortens its lifespan.

It is possible to construct a highly reliable semiconductor switch element input control circuit that does not require relay maintenance inspection and replacement work.

Furthermore, as described in the embodiment, by configuring the voltage sensor and the AND gate so that the output is zero in the event of a failure, fail-safe performance in the event of a circuit failure of the voltage sensor and the AND gate can be ensured.

[Brief explanation of the drawing]

1 is a block diagram of a semiconductor switch element manual control circuit according to the present invention, FIG. 2 is a 1TL circuit diagram of an AND gate constituting the switch control circuit according to the present invention, and FIG. 3 is a block diagram of a semiconductor switch element manual control circuit according to the present invention. FIG. 4 is an electrical circuit diagram of a rectifier circuit constituting a gate, and FIG.
6 and 6 are diagrams showing a relay control circuit for forward and reverse rotation of a conventional three-phase motor M. S1 to S6...Path conductor switch element PT+ ~P
T6...e voltage sensor 61~G6...And gate "212J" Figure 1 Figure 2 Figure 3

Claims (4)

[Claims] (1) In a circuit that controls a plurality of semiconductor switching elements that should not be turned on at the same time, a voltage sensor connected between the terminals of the semiconductor switching elements, and when there is an output from this voltage sensor, the voltage sensor belongs to the circuit. 1. A semiconductor switch element input control circuit comprising: an AND gate that supplies an on signal to other semiconductor switch elements. (2) The semiconductor switch element input control circuit according to claim 1, wherein the voltage sensor and the AND gate have an output of zero in the event of a failure. (3) The semiconductor switch element input control circuit according to claim 1 or 2, wherein the voltage sensor is a photocoupler. (4) a plurality of OR circuits that logically OR the output of one of the voltage sensors and the input signal of the semiconductor switch element to which the voltage sensor belongs; and an AND gate that logically ANDs the outputs of the plurality of OR circuits; A semiconductor switch element input control circuit according to claim 1, 2, or 3, characterized in that the circuit comprises: