JPS62286753A - Character pattern data converting apparatus - Google Patents

Abstract

PURPOSE:To increase the number of display characters as much as possible, by converting a non-gradation character pattern having a large size into a gradation character pattern having a small size on the basis of a plurality of the dots constituting said non-gradation character pattern. CONSTITUTION:The gradation character pattern outputted from a lightness table 30 is once stored in a VRAM4 and sent to a CRT6 in sinchronous relation to a display synchronous signal to display a gradation character on the CRT6. Non-gradation character pattern 24X24 dots are converted into gradation character pattern data 12X12 dots to be outputed and a low resolving power CRT is used to make it possible to display more characters than usual while display quality is kept well. That is, gradation display utilizes that a high brightness part is displayed thickly and a low brightness part is displayed finely.

Description

[Detailed description of the invention] 3. Detailed description of the invention [Industrial application field] The present invention relates to a character pattern data conversion device.

[Prior art] For example, in a CRT of 1024 lines x 1024 dots,
When displayed using character pattern data of a 24×24 dot font, 42 characters can be displayed in one line. However, if character pattern data of a font with the same number of dots as above is used and displayed on a 200 line x 200 dot CRT, only eight characters can be displayed on one line.

In other words, if a high-resolution display device is used, a large number of characters can be displayed, but if a low-resolution display device is used, the number of characters that can be displayed is extremely small. However, even in this case, there is a desire to display as many characters as possible.

On the other hand, the conventional display controller has 640 lines x 20
Kanji characters are displayed in a 16x16 dot font pattern on a 0-dot screen, so 40 characters can be displayed horizontally.

On the other hand, on a screen of 512 lines x 2001', only 32 characters can be displayed horizontally.

If an attempt is made to replace a field that has conventionally been processed with a display device with a 640 line x 200 dot screen with a 512 line x 200 dot screen, there is a problem that the number of characters will be different and the same application software will not be usable.

Therefore, if a 12 x 12 dot font is displayed for a 512 line x 200 dot screen, the same application software will be used. but,
In this case, there is a problem that the character pattern cannot be sufficiently expressed with a 12×12 dot font without gradation.

[Purpose of the invention] The present invention has been made in view of the above circumstances.

It is an object of the present invention to provide a data conversion device that outputs character pattern data with a wide range of display information that allows the number of displayed characters to be increased as much as possible when a low-resolution display device is used.

[Summary of the Invention] The present invention provides a method for increasing the number of characters that can be displayed as much as possible when using a low-resolution display device. The dots are converted into a small-sized gradation character pattern, and this gradation character pattern is displayed.

[Embodiments of the invention] FIG. 1 is a block diagram showing an embodiment of the present invention.

A character pattern data conversion device 1 is provided between a font ROM (character generator) 2 and a common bus 3, and includes a #Ji1 circuit 10 and an address counter 11.
, shift registers 21 and 22, and a brightness table 30. The entire system consists of 4 VRAMs (video RAM), 5 CRTCs (CRT controllers),
RT6, CPU7, ROM8, and RAM9 are provided.

First, the font ROM2 stores a large number of character pattern data of a 24x24 dot font, and stores each character in 72
It is stored as byte data. Figure 2 shows that -
As an example, a display example of "a" is shown.

Incidentally, FIG. 3 is a diagram showing the data format of the font ROM 2.

The control circuit 10 outputs a clock and a control signal, and controls and executes loading/shifting of the shift register and counting of the address counter.

Each of the shift registers 21 and 22 is an 8-bit register, and each time the control circuit 10 inputs one clock, the shift registers 21 and 22 shift 2 bits at a time, and shift 4 times. Based on this, new data is loaded from the font ROM 2. 'The address counter 11 operates under the control of the above control signal and clock, and counts when the shift registers 21 and 22 load data, but does not count when the shift registers 2x and 'z shift data. It is something.

The brightness table 30 receives pattern data for 2 dots (4 dots in total) from each of the shift registers 21 and 22, and generates character pattern data having a predetermined gradation according to the pattern data for 4 dots in total. In other words, the brightness table 30 is a ROM that uses 4-dot pattern data as a 4-bit address.The brightness table in the brightness table 30 is shown in FIG.

Incidentally, the VRAM 4 is a matrix display memory, and is capable of specifying at least eight gradations of brightness for each display dot.

Next, the operation of the above embodiment will be explained.

Here, a case will be described in which the 24×24 dot character pattern data shown in FIG. 2 is converted to the 12×12 dot character pattern data (having gradations) shown in FIG.

First, the CPU 7 receives the address counter 1 via the bus 3.
1, the first address of the character pattern data for "a" is set. First, a conversion operation is performed corresponding to the 1-byte horizontal data in the first row (0th row) at the top left of the screen in FIG. 2 and the 1-byte horizontal data below it (1st row).

When the above address is set in the address counter 11, the font ROM 2 becomes DO data, that is, BO-
7, 8O-6+ Bo-s, -0°””, B
11-1.

Outputs Bo-o 8-bit data. This data is
This is 8-bit data on the left of the 0th row in FIG. Then, since the control circuit IO outputs a clock with the control signal set to 1, the shift register 21 loads the 8-bit data.

Then, the address counter 11 is incremented by one.

Then, with the next clock, the shift register 22 loads the 8-bit data, and the phono)
ROM2 stores the next 8-bit data D1, that is, 8-bit data B17, B1-6, B+-s,
=・”...+ B+-+, B+-o (This data is the 8-bit data on the left in the first stage in FIG. 2) is output, and the shift register 21 loads this data. .And address counter 1
1 is incremented by 1.

After that, the shift register 21 outputs the first two bits BG-0, 8O-1 by the clock output after the control circuit 10 sets the control signal to O, and the shift register 21 outputs the first two bits BG-0, 8O-1.
are the first two pitches) B+-o.

B1-1 is output, and these 4 bits of data are sent to the brightness table 30, and gradation character pattern data is output based on the table shown in FIG. In the above case, the outputs of the shift registers 21 and 22 (i oo
, i oI, i to , i ++) are all “0
”, the gradation character pattern data becomes rOJ.

Then, the next clock output from the control circuit 1O causes the shift register 21 to move the next two bits BO-2, BO-
3, and the shift register 22 also outputs the next 2 bits)
B1-2 and B1-3 are output, and these 4 bits of data are sent to the brightness table 30, and based on the table shown in FIG. 4, character pattern data with gradation is output. In the above case as well, shift register 21.22
The output of (ioo.

i 011 i Io , i ++) are all rOj, so the character pattern data with one gradation becomes "0".

After that, when the control circuit IO outputs a clock, the shift register 21 outputs no-4 and Bo-s, and the shift register 22 outputs Bl-a and B+-s, and based on these 4 bits of data, The character pattern data with gradation is output, and the shift register 21 is set to BO-6 by the fourth clock.

BO-7 is output, and the shift register 22 is B16.

B +-r is output, and based on these 4 bits of data, gradation character pattern data "0.01O10" is generated.
is output.

By the above operation, 1 next to the top left corner (0th row) of the screen will be displayed.
The conversion operation corresponding to the byte data and the horizontal 1-byte data below it (first stage) is completed.

Next, a conversion operation corresponding to the horizontal 1-byte data below it (second stage) and the horizontal 1-byte data below it (third stage) is performed.In this case, first, the control signal from the control circuit 10 , font ROM2 is D2 data, that is, B2
-7, B2-6.

B2-5 ,......* B2-1 +
After outputting the 8-bit data of B2-0 and setting the control signal to 1, the shift register 21 loads the 8-bit data with the clock. Then, address 7 of the address counter 11 is incremented by 1, and the 8-bit data is transferred to the shift register 22 by the next clock.
At the same time, the font ROM2 loads the next 8-bit data D3, that is, 8-bit data Bz 1 , B3
6, B5-5,...

B5-1 and B5-0 are output, and the shift register 21 loads this data.

Then, similarly to the conversion operation for the data in the 0th and 1st rows, the shift registers 21 and 22 each output 2 bits, and based on the output data, the #4 degree table 30 converts the gradated character pattern data. "Olo, Olo"
Output.

Next, a conversion operation corresponding to the horizontal 1-byte data in the fourth row and the horizontal 1-byte data in the fifth row is performed.

In this case, the control signal from the control circuit 10 causes the phono ROM2 to contain D4 data, that is.

B4-7, B4-6, B4-5 +”
°0. B4-1. B4-.

8-bit data is output and loaded into the shift register 21. Then, the shift register 22 loads the above 8-bit data, and the font ROM 2 loads the next 8-bit data.
Bit data D5, that is, 8-bit data B5-7
, 85-6, Bs-5,...

B5-+ and Bs-o are output, and the shift register 21 loads this data. Then, in the same way as the conversion operation for the data in the 0th and 1st stages, the shift register 2
1.22 outputs 2 bits each, and based on the output data, the brightness table 30 outputs gradation character pattern data "O12, 4, 4".

After that, repeat the above operation in the 6th step, 7th step, etc.
Repeat this until the conversion operations in the 22nd and 23rd stages are completed, return to the 0th and 1st stages, perform the conversion operation on the central 1 byte data in Figure 2, and after that,
A conversion operation is performed on 1 byte of data on the right side in FIG.

The result of converting one character "a" in this way is shown in FIG. In this figure, the numbers in the frame indicate the gradation. However, regarding the gradation "O",
The number 0 is omitted.

The gradation character pattern data output from the brightness table 30 is temporarily stored in the VRAM 4, and this stored gradation character pattern data is sent to the CRT 6 in synchronization with the display synchronization signal, and the gradation data is displayed on the CRTS. The characters with are displayed.

Further, in the above embodiment, character pattern data of 24×24 dots without one gradation is converted into character pattern data of 12×12 dots with one gradation and output. As a result, more characters than usual can be displayed using a low-resolution CRT while maintaining good display quality. In other words, the gradation display utilizes the fact that high brightness areas are displayed thickly and low brightness areas are displayed thinly. Therefore, according to the present invention, 1
This makes it easier to achieve richer expression than display without gradation.

Note that character pattern data without gradation is 24X2
Fonts other than 4 dots may be used. Further, the character pattern data with gradation may be converted to a display dot number other than 12×12 dots. By selecting the number of shift register stages and the number of bits to shift, you can convert to any font size. In other words, 1m≧s, n≧t
In the case of
t cannot be satisfied at the same time), and can be converted into character pattern data and output.

Specifically, although the above embodiment performs conversion based on 24x24 bits, it is also possible to use pattern data whose original data is 16x16 bits or 32x32 bits. On the other hand, based on 24x24 bits, it is also possible to convert pattern data of 12x12 bits, 8x12 bits, 12x8 bits, and 8x8 bits.

Further, in the above embodiment, after performing the above conversion, the CRT
However, in addition to CRT, it may be applied to other display devices such as LCD and plasma, and it may also be output by a printer or the like in addition to one display device.

When trying to achieve the same result as the above invention, that is, a gray scale font pattern using a dedicated ROM, designing the dedicated mask ROM and font pattern itself is complicated and not easy, and the cost of hardware increases.

[Effects of the Invention] According to the present invention, it is possible to output character pattern data that can increase the number of displayed characters when a low-resolution display device is used, and the original phonotonoku turn can also be used. have

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention. FIG. 2 is a chart showing an example of 24×24 dot character pattern data (unranked 2g1). FIG. 3 is a diagram showing the data format of the phono ROM in the above embodiment. FIG. 4 is a diagram showing a brightness table in the above embodiment. FIG. 5 is a diagram showing an example in which the character pattern data shown in FIG. 2 is converted into character pattern data with gradation. 1...Character pattern data conversion device, 2...Font ROM, 11...Address counter, 21.22...Shift register, 30...Brightness table. Patent applicant: ASCII Co., Ltd., 1″i Daichi, agent: Makoto Amino Figure 2 Non-gradation character pattern data (2,4 x 24 dots) 1 byte on the left 1 byte in the center 1 byte on the right Figure 4 Brightness table

Claims (1)

[Claims] Character pattern data of m×n dots without gradation is converted into s×t dots with gradation (m≧s, n≧t, where m=s,
n=t never holds true at the same time. ) A character pattern data conversion device that converts the data into character pattern data and outputs the converted character pattern data.